[PATCH v2 00/28] arm: semihosting: Cleanups and new features

[PATCH v2 00/28] arm: semihosting: Cleanups and new features

[Sean Anderson]

This cleans up the semihosting code and adds the following new features:

- hostfs support (like sandbox)
- support for being used as a SPL boot device
- serial device support
- falling back to normal drivers if semihosting is disabled

The main device affected by these changes is vexpress64, so I'd appreciate
if Andre (or anyone else) could try booting.

These changes are motivated by bringup for ls1046a. When forcing JTAG
boot, this device disables most communication peripherals, including
serial and ethernet devices. This appears to be fixed in later
generation devices, but we are stuck with it for now. Semihosting
provides an easy way to run a few console commands.

The patches in this series are organized as follows:

0-4: rST conversions and other documentation updates
5-9: Semihosting cleanups
10-14: Filesystem support (including SPL boot device)
15-16: Serial support
16: Documentation update
17: JTAG boot support for LS1046A
19-25: Semihosting fallback
26-28: DM puts support

The last two groups of patches are "bonus;" the first 17 patches stand
on their own. The last two groups could be broken out as separate
series, but I have kept them in this one to help with my sanity (and not
have to deal with too many outstanding series).

This series depends on [1]. Patch 17 depends on [2].

[1] https://lore.kernel.org/u-boot/CACRpkdZ+9fmNjC_mvrbPa9-iuTQVd8UkJ7Zpe7cL0c5vZygsVw@mail.gmail.com/T/
[2] https://lore.kernel.org/u-boot/20220222183840.1355337-2-sean.anderson@seco.com/

Changes in v2:
- Document debug uart
- Make CONFIG_SPL_SEMIHOSTING depend on SPL
- Compile arch/arm/lib/semihosting.o in SPL
- Rebase on Andre's series
- Fix typos in commit message
- Fix baud numbers being off by 10
- Rename non-DM driver struct to match format of other drivers
- Add migration instructions for smhload
- Add semihosting fallback implementation
- Add implementation of puts for DM

Sean Anderson (28):
  doc: Convert semihosting readme to rST
  nxp: ls1046ardb: Convert README to rST
  doc: ls1046ardb: Expand boot mode section
  doc: ls1046ardb: Document debug uart
  arm: smh: Add semihosting entry to MAINTAINERS
  arm: smh: Export semihosting functions
  arm: smh: Use numeric modes for smh_open
  arm: smh: Return errno on error
  arm: smh: Document functions in header
  arm: smh: Add some file manipulation commands
  spl: Add semihosting boot method
  fs: Add semihosting filesystem
  cmd: fdt: Use start/size for chosen instead of start/end
  arm: smh: Remove smhload command
  arm: smh: Add some functions for working with the host console
  serial: Add semihosting driver
  doc: smh: Update semihosting documentation
  ls1046ardb: Add support for JTAG boot
  arm64: Save esr in pt_regs
  arm64: Save spsr in pt_regs
  arm64: Import some ESR and SPSR defines from Linux
  arm: smh: Add option to detect semihosting
  arm: Catch non-emulated semihosting calls
  serial: smh: Initialize serial only if semihosting is enabled
  arm64: ls1046a: Support semihosting fallback
  serial: dm: Add support for puts
  serial: sandbox: Implement puts
  serial: smh: Implement puts for DM

 MAINTAINERS                             |   5 +
 arch/arm/Kconfig                        |  47 +++-
 arch/arm/cpu/armv8/exceptions.S         |   9 +-
 arch/arm/cpu/armv8/fsl-layerscape/spl.c |   3 +
 arch/arm/include/asm/esr.h              | 343 ++++++++++++++++++++++++
 arch/arm/include/asm/proc-armv/ptrace.h |  75 ++++++
 arch/arm/include/asm/spl.h              |   1 +
 arch/arm/include/asm/u-boot-arm.h       |   7 +-
 arch/arm/lib/Makefile                   |   2 +-
 arch/arm/lib/interrupts_64.c            |  80 ++++--
 arch/arm/lib/semihosting.c              | 230 ++++++++--------
 arch/arm/mach-imx/imx8m/soc.c           |   4 +-
 board/freescale/ls1046ardb/MAINTAINERS  |   1 +
 board/freescale/ls1046ardb/README       |  76 ------
 board/freescale/ls1046ardb/ls1046ardb.c |  11 +
 cmd/fdt.c                               |   6 +-
 common/spl/Makefile                     |   1 +
 common/spl/spl_semihosting.c            |  71 +++++
 disk/part.c                             |   4 +-
 doc/README.semihosting                  |  38 ---
 doc/board/nxp/index.rst                 |   1 +
 doc/board/nxp/ls1046ardb.rst            | 191 +++++++++++++
 doc/usage/index.rst                     |   1 +
 doc/usage/semihosting.rst               |  73 +++++
 drivers/serial/Kconfig                  |  22 ++
 drivers/serial/Makefile                 |   1 +
 drivers/serial/sandbox.c                |  21 +-
 drivers/serial/serial-uclass.c          |  27 +-
 drivers/serial/serial.c                 |   2 +
 drivers/serial/serial_semihosting.c     | 168 ++++++++++++
 fs/Makefile                             |   1 +
 fs/fs.c                                 |  20 ++
 fs/semihostingfs.c                      | 115 ++++++++
 include/configs/ls1046ardb.h            |   2 +
 include/configs/vexpress_aemv8.h        |  10 +-
 include/fs.h                            |   1 +
 include/semihosting.h                   | 149 ++++++++++
 include/semihostingfs.h                 |  21 ++
 include/serial.h                        |  19 ++
 39 files changed, 1581 insertions(+), 278 deletions(-)
 create mode 100644 arch/arm/include/asm/esr.h
 delete mode 100644 board/freescale/ls1046ardb/README
 create mode 100644 common/spl/spl_semihosting.c
 delete mode 100644 doc/README.semihosting
 create mode 100644 doc/board/nxp/ls1046ardb.rst
 create mode 100644 doc/usage/semihosting.rst
 create mode 100644 drivers/serial/serial_semihosting.c
 create mode 100644 fs/semihostingfs.c
 create mode 100644 include/semihosting.h
 create mode 100644 include/semihostingfs.h

-- 
2.25.1

[PATCH v2 01/28] doc: Convert semihosting readme to rST

[Sean Anderson]

This converts the semihosting readme to rST. I have tried to make only
cosmetic changes, but I did fix up the first link (which was broken).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

(no changes since v1)

 doc/usage/index.rst                           |  1 +
 .../semihosting.rst}                          | 35 +++++++++++--------
 2 files changed, 21 insertions(+), 15 deletions(-)
 rename doc/{README.semihosting => usage/semihosting.rst} (53%)

diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index 964d761e13..569da2bdd1 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -11,6 +11,7 @@ Use U-Boot
    netconsole
    partitions
    cmdline
+   semihosting
 
 Shell commands
 --------------
diff --git a/doc/README.semihosting b/doc/usage/semihosting.rst
similarity index 53%
rename from doc/README.semihosting
rename to doc/usage/semihosting.rst
index f382d0131e..ed16e4d582 100644
--- a/doc/README.semihosting
+++ b/doc/usage/semihosting.rst
@@ -1,35 +1,40 @@
-SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2014 Broadcom Corporation.
- */
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2014 Broadcom Corporation.
+
+Semihosting
+===========
 
 Semihosting is ARM's way of having a real or virtual target communicate
 with a host or host debugger for basic operations such as file I/O,
-console I/O, etc. Please see
-http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0471c/Bgbjjgij.html for more information.
+console I/O, etc. Please see `Arm's semihosting documentation
+<https://developer.arm.com/documentation/100863/latest/>`_ for more
+information.
 
 For developing on armv8 virtual fastmodel platforms, semihosting is a
 valuable tool since it allows access to image/configuration files before
 eMMC or other NV media are available.
 
 There are two main ARM virtual Fixed Virtual Platform (FVP) models,
-Versatile Express (VE) FVP and BASE FVP (See
-http://www.arm.com/products/tools/models/fast-models/foundation-model.php)
+`Versatile Express (VE) FVP and BASE FVP
+<http://www.arm.com/products/tools/models/fast-models/foundation-model.php>`_.
 The initial vexpress64 u-boot board created here runs on the VE virtual
 platform using the license-free Foundation_v8 simulator. Fortunately,
 the Foundation_v8 simulator also supports the BASE_FVP model which
 companies can purchase licenses for and contain much more functionality.
-So we can, in u-boot, run either model by either using the VE FVP (default),
-or turning on CONFIG_BASE_FVP for the more full featured model.
+So we can, in U-Boot, run either model by either using the VE FVP (default),
+or turning on ``CONFIG_BASE_FVP`` for the more full featured model.
 
-Rather than create a new armv8 board similar to armltd/vexpress64, add
-semihosting calls to the existing one, enabled with CONFIG_SEMIHOSTING
-and CONFIG_BASE_FVP both set. Also reuse the existing board config file
+Rather than create a new armv8 board similar to ``armltd/vexpress64``, add
+semihosting calls to the existing one, enabled with ``CONFIG_SEMIHOSTING``
+and ``CONFIG_BASE_FVP`` both set. Also reuse the existing board config file
 vexpress_aemv8.h but differentiate the two models by the presence or
-absence of CONFIG_BASE_FVP. This change is tested and works on both the
+absence of ``CONFIG_BASE_FVP``. This change is tested and works on both the
 Foundation and Base fastmodel simulators.
 
-The semihosting code adds a command:
+Loading files
+-------------
+
+The semihosting code adds a "hostfs"::
 
   smhload <image> <address> [env var]
 
-- 
2.25.1

[PATCH v2 02/28] nxp: ls1046ardb: Convert README to rST

[Sean Anderson]

This converts the readme for this board to rST. I have tried not to
change any semantics from the original (though I did convert MB to M).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

(no changes since v1)

 board/freescale/ls1046ardb/MAINTAINERS |   1 +
 board/freescale/ls1046ardb/README      |  76 -------------------
 doc/board/nxp/index.rst                |   1 +
 doc/board/nxp/ls1046ardb.rst           | 100 +++++++++++++++++++++++++
 4 files changed, 102 insertions(+), 76 deletions(-)
 delete mode 100644 board/freescale/ls1046ardb/README
 create mode 100644 doc/board/nxp/ls1046ardb.rst

diff --git a/board/freescale/ls1046ardb/MAINTAINERS b/board/freescale/ls1046ardb/MAINTAINERS
index efdea22bde..3c8cfe720d 100644
--- a/board/freescale/ls1046ardb/MAINTAINERS
+++ b/board/freescale/ls1046ardb/MAINTAINERS
@@ -14,3 +14,4 @@ F:	configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
 F:	configs/ls1046ardb_SECURE_BOOT_defconfig
 F:	configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
 F:	configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
+F:	doc/board/nxp/ls1046ardb.rst
diff --git a/board/freescale/ls1046ardb/README b/board/freescale/ls1046ardb/README
deleted file mode 100644
index 90c44f4bce..0000000000
--- a/board/freescale/ls1046ardb/README
+++ /dev/null
@@ -1,76 +0,0 @@
-Overview
---------
-The LS1046A Reference Design Board (RDB) is a high-performance computing,
-evaluation, and development platform that supports the QorIQ LS1046A
-LayerScape Architecture processor. The LS1046ARDB provides SW development
-platform for the Freescale LS1046A processor series, with a complete
-debugging environment. The LS1046A RDB is lead-free and RoHS-compliant.
-
-LS1046A SoC Overview
---------------------
-Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1046A
-SoC overview.
-
- LS1046ARDB board Overview
- -----------------------
- - SERDES1 Connections, 4 lanes supporting:
-      - Lane0: 10GBase-R with x1 RJ45 connector
-      - Lane1: 10GBase-R Cage
-      - Lane2: SGMII.5
-      - Lane3: SGMII.6
- - SERDES2 Connections, 4 lanes supporting:
-      - Lane0: PCIe1 with miniPCIe slot
-      - Lane1: PCIe2 with PCIe x2 slot
-      - Lane2: PCIe3 with PCIe x4 slot
-      - Lane3: SATA
- - DDR Controller
-     - 8GB 64bits DDR4 SDRAM. Support rates of up to 2133MT/s
- -IFC/Local Bus
-    - One 512 MB NAND flash with ECC support
-    - CPLD connection
- - USB 3.0
-    - one Type A port, one Micro-AB port
- - SDHC: connects directly to a full SD/MMC slot
- - DSPI: 64 MB high-speed flash Memory for boot code and storage (up to 108MHz)
- - 4 I2C controllers
- - UART
-   - Two 4-pin serial ports at up to 115.2 Kbit/s
-   - Two DB9 D-Type connectors supporting one Serial port each
- - ARM JTAG support
-
-Memory map from core's view
-----------------------------
-Start Address	 End Address	 Description		Size
-0x00_0000_0000 - 0x00_000F_FFFF  Secure Boot ROM	1MB
-0x00_0100_0000 - 0x00_0FFF_FFFF  CCSRBAR		240MB
-0x00_1000_0000 - 0x00_1000_FFFF  OCRAM0			64KB
-0x00_1001_0000 - 0x00_1001_FFFF  OCRAM1			64KB
-0x00_2000_0000 - 0x00_20FF_FFFF  DCSR			16MB
-0x00_7E80_0000 - 0x00_7E80_FFFF  IFC - NAND Flash	64KB
-0x00_7FB0_0000 - 0x00_7FB0_0FFF  IFC - CPLD		4KB
-0x00_8000_0000 - 0x00_FFFF_FFFF  DRAM1			2GB
-0x05_0000_0000 - 0x05_07FF_FFFF  QMAN S/W Portal	128M
-0x05_0800_0000 - 0x05_0FFF_FFFF  BMAN S/W Portal	128M
-0x08_8000_0000 - 0x09_FFFF_FFFF  DRAM2			6GB
-0x40_0000_0000 - 0x47_FFFF_FFFF  PCI Express1		32G
-0x48_0000_0000 - 0x4F_FFFF_FFFF  PCI Express2		32G
-0x50_0000_0000 - 0x57_FFFF_FFFF  PCI Express3		32G
-
-QSPI flash map:
-Start Address    End Address     Description		Size
-0x00_4000_0000 - 0x00_400F_FFFF  RCW + PBI		1MB
-0x00_4010_0000 - 0x00_402F_FFFF  U-Boot			2MB
-0x00_4030_0000 - 0x00_403F_FFFF  U-Boot Env		1MB
-0x00_4040_0000 - 0x00_405F_FFFF  PPA			2MB
-0x00_4060_0000 - 0x00_408F_FFFF  Secure boot header
-				 + bootscript		3MB
-0x00_4090_0000 - 0x00_4093_FFFF  FMan ucode		256KB
-0x00_4094_0000 - 0x00_4097_FFFF  QE/uQE firmware	256KB
-0x00_4098_0000 - 0x00_40FF_FFFF  Reserved		6MB
-0x00_4100_0000 - 0x00_43FF_FFFF  FIT Image		48MB
-
-Booting Options
----------------
-a) QSPI boot
-b) SD boot
-c) eMMC boot
diff --git a/doc/board/nxp/index.rst b/doc/board/nxp/index.rst
index 63956287c5..4514b8951b 100644
--- a/doc/board/nxp/index.rst
+++ b/doc/board/nxp/index.rst
@@ -13,6 +13,7 @@ NXP Semiconductors
    imx8qxp_mek
    imxrt1020-evk
    imxrt1050-evk
+   ls1046ardb
    mx6sabreauto
    mx6sabresd
    mx6ul_14x14_evk
diff --git a/doc/board/nxp/ls1046ardb.rst b/doc/board/nxp/ls1046ardb.rst
new file mode 100644
index 0000000000..4bfeaa93dd
--- /dev/null
+++ b/doc/board/nxp/ls1046ardb.rst
@@ -0,0 +1,100 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+LS1046ARDB
+==========
+
+The LS1046A Reference Design Board (RDB) is a high-performance computing,
+evaluation, and development platform that supports the QorIQ LS1046A
+LayerScape Architecture processor. The LS1046ARDB provides SW development
+platform for the Freescale LS1046A processor series, with a complete
+debugging environment. The LS1046A RDB is lead-free and RoHS-compliant.
+
+LS1046A SoC Overview
+--------------------
+Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1046A
+SoC overview.
+
+LS1046ARDB board Overview
+-------------------------
+- SERDES1 Connections, 4 lanes supporting:
+
+  - Lane0: 10GBase-R with x1 RJ45 connector
+  - Lane1: 10GBase-R Cage
+  - Lane2: SGMII.5
+  - Lane3: SGMII.6
+
+- SERDES2 Connections, 4 lanes supporting:
+
+  - Lane0: PCIe1 with miniPCIe slot
+  - Lane1: PCIe2 with PCIe x2 slot
+  - Lane2: PCIe3 with PCIe x4 slot
+  - Lane3: SATA
+
+- DDR Controller
+
+  - 8GB 64bits DDR4 SDRAM. Support rates of up to 2133MT/s
+
+- IFC/Local Bus
+
+  - One 512 MB NAND flash with ECC support
+  - CPLD connection
+
+- USB 3.0
+
+  - one Type A port, one Micro-AB port
+
+- SDHC: connects directly to a full SD/MMC slot
+- DSPI: 64 MB high-speed flash Memory for boot code and storage (up to 108MHz)
+- 4 I2C controllers
+- UART
+
+  - Two 4-pin serial ports at up to 115.2 Kbit/s
+  - Two DB9 D-Type connectors supporting one Serial port each
+
+- ARM JTAG support
+
+Memory map from core's view
+----------------------------
+
+================== ================== ================ =====
+Start Address      End Address        Description      Size
+================== ================== ================ =====
+``0x00_0000_0000`` ``0x00_000F_FFFF`` Secure Boot ROM  1M
+``0x00_0100_0000`` ``0x00_0FFF_FFFF`` CCSRBAR          240M
+``0x00_1000_0000`` ``0x00_1000_FFFF`` OCRAM0           64K
+``0x00_1001_0000`` ``0x00_1001_FFFF`` OCRAM1           64K
+``0x00_2000_0000`` ``0x00_20FF_FFFF`` DCSR             16M
+``0x00_7E80_0000`` ``0x00_7E80_FFFF`` IFC - NAND Flash 64K
+``0x00_7FB0_0000`` ``0x00_7FB0_0FFF`` IFC - CPLD       4K
+``0x00_8000_0000`` ``0x00_FFFF_FFFF`` DRAM1            2G
+``0x05_0000_0000`` ``0x05_07FF_FFFF`` QMAN S/W Portal  128M
+``0x05_0800_0000`` ``0x05_0FFF_FFFF`` BMAN S/W Portal  128M
+``0x08_8000_0000`` ``0x09_FFFF_FFFF`` DRAM2            6G
+``0x40_0000_0000`` ``0x47_FFFF_FFFF`` PCI Express1     32G
+``0x48_0000_0000`` ``0x4F_FFFF_FFFF`` PCI Express2     32G
+``0x50_0000_0000`` ``0x57_FFFF_FFFF`` PCI Express3     32G
+================== ================== ================ =====
+
+QSPI flash map
+--------------
+
+================== ================== ================== =====
+Start Address      End Address        Description        Size
+================== ================== ================== =====
+``0x00_4000_0000`` ``0x00_400F_FFFF`` RCW + PBI          1M
+``0x00_4010_0000`` ``0x00_402F_FFFF`` U-Boot             2M
+``0x00_4030_0000`` ``0x00_403F_FFFF`` U-Boot Env         1M
+``0x00_4040_0000`` ``0x00_405F_FFFF`` PPA                2M
+``0x00_4060_0000`` ``0x00_408F_FFFF`` Secure boot header 3M
+                                      + bootscript
+``0x00_4090_0000`` ``0x00_4093_FFFF`` FMan ucode         256K
+``0x00_4094_0000`` ``0x00_4097_FFFF`` QE/uQE firmware    256K
+``0x00_4098_0000`` ``0x00_40FF_FFFF`` Reserved           6M
+``0x00_4100_0000`` ``0x00_43FF_FFFF`` FIT Image          48M
+================== ================== ================== =====
+
+Booting Options
+---------------
+- QSPI boot
+- SD boot
+- eMMC boot
-- 
2.25.1

[PATCH v2 03/28] doc: ls1046ardb: Expand boot mode section

[Sean Anderson]

This adds some additional info about booting from different sources,
including the correct switch positions.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

(no changes since v1)

 doc/board/nxp/ls1046ardb.rst | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/doc/board/nxp/ls1046ardb.rst b/doc/board/nxp/ls1046ardb.rst
index 4bfeaa93dd..c73516c070 100644
--- a/doc/board/nxp/ls1046ardb.rst
+++ b/doc/board/nxp/ls1046ardb.rst
@@ -95,6 +95,17 @@ Start Address      End Address        Description        Size
 
 Booting Options
 ---------------
-- QSPI boot
-- SD boot
-- eMMC boot
+
+NB: The reference manual documents the RCW source with the *least-significant
+bit first*.
+
+QSPI boot
+^^^^^^^^^
+
+This is the default. ``{ SW5[0:8], SW4[0] }`` should be ``0010_0010_0``.
+
+SD boot and eMMC boot
+^^^^^^^^^^^^^^^^^^^^^
+
+``{ SW5[0:8], SW4[0] }`` should be ``0010_0000_0``. eMMC is selected only if
+there is no SD card in the slot.
-- 
2.25.1

[PATCH v2 04/28] doc: ls1046ardb: Document debug uart

[Sean Anderson]

This adds some instructions for enabling the debug uart, including the
correct address and clock rate.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- New

 doc/board/nxp/ls1046ardb.rst | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/doc/board/nxp/ls1046ardb.rst b/doc/board/nxp/ls1046ardb.rst
index c73516c070..e4499a13fb 100644
--- a/doc/board/nxp/ls1046ardb.rst
+++ b/doc/board/nxp/ls1046ardb.rst
@@ -109,3 +109,12 @@ SD boot and eMMC boot
 
 ``{ SW5[0:8], SW4[0] }`` should be ``0010_0000_0``. eMMC is selected only if
 there is no SD card in the slot.
+
+Debug UART
+----------
+
+To enable the debug UART, enable the following config options::
+
+    CONFIG_DEBUG_UART_NS16550=y
+    CONFIG_DEBUG_UART_BASE=0x21c0500
+    CONFIG_DEBUG_UART_CLOCK=300000000
-- 
2.25.1

[PATCH v2 05/28] arm: smh: Add semihosting entry to MAINTAINERS

[Sean Anderson]

These files are spread all over the tree, so just use a regex. Orphaned
for now, since this is more of a "one-off" series. Though I'll be happy
to review patches.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
Liviu or Andre, perhaps you should be listed here as well?

(no changes since v1)

 MAINTAINERS | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index fb171e0c68..751a996cf7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1148,6 +1148,11 @@ F:	arch/sandbox/
 F:	doc/arch/sandbox.rst
 F:	include/dt-bindings/*/sandbox*.h
 
+SEMIHOSTING
+R:	Sean Anderson <sean.anderson@seco.com>
+S:	Orphaned
+N:	semihosting
+
 SETEXPR
 M:	Roland Gaudig <roland.gaudig@weidmueller.com>
 S:	Maintained
-- 
2.25.1

[PATCH v2 06/28] arm: smh: Export semihosting functions

[Sean Anderson]

This exports semihosting functions for use in other files. The header is
in include/ and not arm/include/asm because I anticipate that RISC-V may
want to add their own implementation at some point.

smh_len_fd has been renamed to smh_flen to more closely match the
semihosting spec.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

(no changes since v1)

 arch/arm/lib/semihosting.c | 11 ++++++-----
 include/semihosting.h      | 14 ++++++++++++++
 2 files changed, 20 insertions(+), 5 deletions(-)
 create mode 100644 include/semihosting.h

diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
index 9fd82459b2..c38892fdd8 100644
--- a/arch/arm/lib/semihosting.c
+++ b/arch/arm/lib/semihosting.c
@@ -15,6 +15,7 @@
 #include <command.h>
 #include <env.h>
 #include <log.h>
+#include <semihosting.h>
 
 #define SYSOPEN		0x01
 #define SYSCLOSE	0x02
@@ -45,7 +46,7 @@ static noinline long smh_trap(unsigned int sysnum, void *addr)
  * Open a file on the host. Mode is "r" or "rb" currently. Returns a file
  * descriptor or -1 on error.
  */
-static long smh_open(const char *fname, char *modestr)
+long smh_open(const char *fname, char *modestr)
 {
 	long fd;
 	unsigned long mode;
@@ -84,7 +85,7 @@ static long smh_open(const char *fname, char *modestr)
 /*
  * Read 'len' bytes of file into 'memp'. Returns 0 on success, else failure
  */
-static long smh_read(long fd, void *memp, size_t len)
+long smh_read(long fd, void *memp, size_t len)
 {
 	long ret;
 	struct smh_read_s {
@@ -118,7 +119,7 @@ static long smh_read(long fd, void *memp, size_t len)
 /*
  * Close the file using the file descriptor
  */
-static long smh_close(long fd)
+long smh_close(long fd)
 {
 	long ret;
 
@@ -134,7 +135,7 @@ static long smh_close(long fd)
 /*
  * Get the file length from the file descriptor
  */
-static long smh_len_fd(long fd)
+long smh_flen(long fd)
 {
 	long ret;
 
@@ -158,7 +159,7 @@ static int smh_load_file(const char * const name, ulong load_addr,
 	if (fd == -1)
 		return -1;
 
-	len = smh_len_fd(fd);
+	len = smh_flen(fd);
 	if (len < 0) {
 		smh_close(fd);
 		return -1;
diff --git a/include/semihosting.h b/include/semihosting.h
new file mode 100644
index 0000000000..3843863046
--- /dev/null
+++ b/include/semihosting.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
+ */
+
+#ifndef _SEMIHOSTING_H
+#define _SEMIHOSTING_H
+
+long smh_open(const char *fname, char *modestr);
+long smh_read(long fd, void *memp, size_t len);
+long smh_close(long fd);
+long smh_flen(long fd);
+
+#endif /* _SEMIHOSTING_H */
-- 
2.25.1

[PATCH v2 07/28] arm: smh: Use numeric modes for smh_open

[Sean Anderson]

There's no point in using string constants for smh_open if we are just
going to have to parse them. Instead, use numeric modes. The user needs
to be a bit careful with these, since they are much closer semantically
to string modes used by fopen(3) than the numeric modes used with
open(2).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

(no changes since v1)

 arch/arm/lib/semihosting.c | 21 +++------------------
 include/semihosting.h      | 25 ++++++++++++++++++++++++-
 2 files changed, 27 insertions(+), 19 deletions(-)

diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
index c38892fdd8..b983cc3935 100644
--- a/arch/arm/lib/semihosting.c
+++ b/arch/arm/lib/semihosting.c
@@ -22,9 +22,6 @@
 #define SYSREAD		0x06
 #define SYSFLEN		0x0C
 
-#define MODE_READ	0x0
-#define MODE_READBIN	0x1
-
 /*
  * Call the handler
  */
@@ -46,28 +43,16 @@ static noinline long smh_trap(unsigned int sysnum, void *addr)
  * Open a file on the host. Mode is "r" or "rb" currently. Returns a file
  * descriptor or -1 on error.
  */
-long smh_open(const char *fname, char *modestr)
+long smh_open(const char *fname, enum smh_open_mode mode)
 {
 	long fd;
-	unsigned long mode;
 	struct smh_open_s {
 		const char *fname;
 		unsigned long mode;
 		size_t len;
 	} open;
 
-	debug("%s: file \'%s\', mode \'%s\'\n", __func__, fname, modestr);
-
-	/* Check the file mode */
-	if (!(strcmp(modestr, "r"))) {
-		mode = MODE_READ;
-	} else if (!(strcmp(modestr, "rb"))) {
-		mode = MODE_READBIN;
-	} else {
-		printf("%s: ERROR mode \'%s\' not supported\n", __func__,
-		       modestr);
-		return -1;
-	}
+	debug("%s: file \'%s\', mode \'%u\'\n", __func__, fname, mode);
 
 	open.fname = fname;
 	open.len = strlen(fname);
@@ -155,7 +140,7 @@ static int smh_load_file(const char * const name, ulong load_addr,
 	long len;
 	long ret;
 
-	fd = smh_open(name, "rb");
+	fd = smh_open(name, MODE_READ | MODE_BINARY);
 	if (fd == -1)
 		return -1;
 
diff --git a/include/semihosting.h b/include/semihosting.h
index 3843863046..cf54819192 100644
--- a/include/semihosting.h
+++ b/include/semihosting.h
@@ -6,7 +6,30 @@
 #ifndef _SEMIHOSTING_H
 #define _SEMIHOSTING_H
 
-long smh_open(const char *fname, char *modestr);
+/**
+ * enum smh_open_mode - Numeric file modes for use with smh_open()
+ * MODE_READ: 'r'
+ * MODE_BINARY: 'b'
+ * MODE_PLUS: '+'
+ * MODE_WRITE: 'w'
+ * MODE_APPEND: 'a'
+ *
+ * These modes represent the mode string used by fopen(3) in a form which can
+ * be passed to smh_open(). These do NOT correspond directly to %O_RDONLY,
+ * %O_CREAT, etc; see fopen(3) for details. In particular, @MODE_PLUS
+ * effectively results in adding %O_RDWR, and @MODE_WRITE will add %O_TRUNC.
+ * For compatibility, @MODE_BINARY should be added when opening non-text files
+ * (such as images).
+ */
+enum smh_open_mode {
+	MODE_READ	= 0x0,
+	MODE_BINARY	= 0x1,
+	MODE_PLUS	= 0x2,
+	MODE_WRITE	= 0x4,
+	MODE_APPEND	= 0x8,
+};
+
+long smh_open(const char *fname, enum smh_open_mode mode);
 long smh_read(long fd, void *memp, size_t len);
 long smh_close(long fd);
 long smh_flen(long fd);
-- 
2.25.1

[PATCH v2 08/28] arm: smh: Return errno on error

[Sean Anderson]

Instead of printing in what are now library functions, try to return a
numeric error code. This also adjust some functions (such as read) to
behave more similarly to read(2). For example, we now return the number
of bytes read instead of failing immediately on a short read.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

(no changes since v1)

 arch/arm/lib/semihosting.c | 67 ++++++++++++++++++++------------------
 1 file changed, 36 insertions(+), 31 deletions(-)

diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
index b983cc3935..1686457685 100644
--- a/arch/arm/lib/semihosting.c
+++ b/arch/arm/lib/semihosting.c
@@ -21,6 +21,7 @@
 #define SYSCLOSE	0x02
 #define SYSREAD		0x06
 #define SYSFLEN		0x0C
+#define SYSERRNO	0x13
 
 /*
  * Call the handler
@@ -39,10 +40,24 @@ static noinline long smh_trap(unsigned int sysnum, void *addr)
 	return result;
 }
 
-/*
- * Open a file on the host. Mode is "r" or "rb" currently. Returns a file
- * descriptor or -1 on error.
+/**
+ * smh_errno() - Read the host's errno
+ *
+ * This gets the value of the host's errno and negates it. The host's errno may
+ * or may not be set, so only call this function if a previous semihosting call
+ * has failed.
+ *
+ * Return: a negative error value
  */
+static int smh_errno(void)
+{
+	long ret = smh_trap(SYSERRNO, NULL);
+
+	if (ret > 0 && ret < INT_MAX)
+		return -ret;
+	return -EIO;
+}
+
 long smh_open(const char *fname, enum smh_open_mode mode)
 {
 	long fd;
@@ -61,9 +76,7 @@ long smh_open(const char *fname, enum smh_open_mode mode)
 	/* Open the file on the host */
 	fd = smh_trap(SYSOPEN, &open);
 	if (fd == -1)
-		printf("%s: ERROR fd %ld for file \'%s\'\n", __func__, fd,
-		       fname);
-
+		return smh_errno();
 	return fd;
 }
 
@@ -86,19 +99,9 @@ long smh_read(long fd, void *memp, size_t len)
 	read.len = len;
 
 	ret = smh_trap(SYSREAD, &read);
-	if (ret < 0) {
-		/*
-		 * The ARM handler allows for returning partial lengths,
-		 * but in practice this never happens so rather than create
-		 * hard to maintain partial read loops and such, just fail
-		 * with an error message.
-		 */
-		printf("%s: ERROR ret %ld, fd %ld, len %zu memp %p\n",
-		       __func__, ret, fd, len, memp);
-		return -1;
-	}
-
-	return 0;
+	if (ret < 0)
+		return smh_errno();
+	return len - ret;
 }
 
 /*
@@ -112,9 +115,8 @@ long smh_close(long fd)
 
 	ret = smh_trap(SYSCLOSE, &fd);
 	if (ret == -1)
-		printf("%s: ERROR fd %ld\n", __func__, fd);
-
-	return ret;
+		return smh_errno();
+	return 0;
 }
 
 /*
@@ -128,8 +130,7 @@ long smh_flen(long fd)
 
 	ret = smh_trap(SYSFLEN, &fd);
 	if (ret == -1)
-		printf("%s: ERROR ret %ld, fd %ld\n", __func__, ret, fd);
-
+		return smh_errno();
 	return ret;
 }
 
@@ -141,28 +142,32 @@ static int smh_load_file(const char * const name, ulong load_addr,
 	long ret;
 
 	fd = smh_open(name, MODE_READ | MODE_BINARY);
-	if (fd == -1)
-		return -1;
+	if (fd < 0)
+		return fd;
 
 	len = smh_flen(fd);
 	if (len < 0) {
 		smh_close(fd);
-		return -1;
+		return len;
 	}
 
 	ret = smh_read(fd, (void *)load_addr, len);
 	smh_close(fd);
 
-	if (ret == 0) {
+	if (ret == len) {
 		*end_addr = load_addr + len - 1;
 		printf("loaded file %s from %08lX to %08lX, %08lX bytes\n",
 		       name,
 		       load_addr,
 		       *end_addr,
 		       len);
-	} else {
-		printf("read failed\n");
-		return 0;
+	} else if (ret >= 0) {
+		ret = -EAGAIN;
+	}
+
+	if (ret < 0) {
+		printf("read failed: %ld\n", ret);
+		return ret;
 	}
 
 	return 0;
-- 
2.25.1

[PATCH v2 09/28] arm: smh: Document functions in header

[Sean Anderson]

This adds some documentation for semihosting functions in the header.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

(no changes since v1)

 arch/arm/lib/semihosting.c |  9 ---------
 include/semihosting.h      | 32 ++++++++++++++++++++++++++++++++
 2 files changed, 32 insertions(+), 9 deletions(-)

diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
index 1686457685..2943f7b82f 100644
--- a/arch/arm/lib/semihosting.c
+++ b/arch/arm/lib/semihosting.c
@@ -80,9 +80,6 @@ long smh_open(const char *fname, enum smh_open_mode mode)
 	return fd;
 }
 
-/*
- * Read 'len' bytes of file into 'memp'. Returns 0 on success, else failure
- */
 long smh_read(long fd, void *memp, size_t len)
 {
 	long ret;
@@ -104,9 +101,6 @@ long smh_read(long fd, void *memp, size_t len)
 	return len - ret;
 }
 
-/*
- * Close the file using the file descriptor
- */
 long smh_close(long fd)
 {
 	long ret;
@@ -119,9 +113,6 @@ long smh_close(long fd)
 	return 0;
 }
 
-/*
- * Get the file length from the file descriptor
- */
 long smh_flen(long fd)
 {
 	long ret;
diff --git a/include/semihosting.h b/include/semihosting.h
index cf54819192..d8337b6269 100644
--- a/include/semihosting.h
+++ b/include/semihosting.h
@@ -29,9 +29,41 @@ enum smh_open_mode {
 	MODE_APPEND	= 0x8,
 };
 
+/**
+ * smh_open() - Open a file on the host
+ * @fname: The name of the file to open
+ * @mode: The mode to use when opening the file
+ *
+ * Return: Either a file descriptor or a negative error on failure
+ */
 long smh_open(const char *fname, enum smh_open_mode mode);
+
+/**
+ * smh_read() - Read data from a file
+ * @fd: A file descriptor returned from smh_open()
+ * @memp: Pointer to a buffer of memory of at least @len bytes
+ * @len: The number of bytes to read
+ *
+ * Return:
+ * * The number of bytes read on success, with 0 indicating %EOF
+ * * A negative error on failure
+ */
 long smh_read(long fd, void *memp, size_t len);
+
+/**
+ * smh_close() - Close an open file
+ * @fd: A file descriptor returned from smh_open()
+ *
+ * Return: 0 on success or negative error on failure
+ */
 long smh_close(long fd);
+
+/**
+ * smh_flen() - Get the length of a file
+ * @fd: A file descriptor returned from smh_open()
+ *
+ * Return: The length of the file, in bytes, or a negative error on failure
+ */
 long smh_flen(long fd);
 
 #endif /* _SEMIHOSTING_H */
-- 
2.25.1

[PATCH v2 10/28] arm: smh: Add some file manipulation commands

[Sean Anderson]

In order to add filesystem support, we will need to be able to seek and
write files. Add the appropriate helper functions.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

(no changes since v1)

 arch/arm/lib/semihosting.c | 67 +++++++++++++++++++++++++++++++-------
 include/semihosting.h      | 20 ++++++++++++
 2 files changed, 76 insertions(+), 11 deletions(-)

diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
index 2943f7b82f..d08003cef1 100644
--- a/arch/arm/lib/semihosting.c
+++ b/arch/arm/lib/semihosting.c
@@ -1,15 +1,13 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
+ * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
  * Copyright 2014 Broadcom Corporation
  */
 
 /*
- * Minimal semihosting implementation for reading files into memory. If more
- * features like writing files or console output are required they can be
- * added later. This code has been tested on arm64/aarch64 fastmodel only.
- * An untested placeholder exists for armv7 architectures, but since they
- * are commonly available in silicon now, fastmodel usage makes less sense
- * for them.
+ * This code has been tested on arm64/aarch64 fastmodel only.  An untested
+ * placeholder exists for armv7 architectures, but since they are commonly
+ * available in silicon now, fastmodel usage makes less sense for them.
  */
 #include <common.h>
 #include <command.h>
@@ -19,7 +17,9 @@
 
 #define SYSOPEN		0x01
 #define SYSCLOSE	0x02
+#define SYSWRITE	0x05
 #define SYSREAD		0x06
+#define SYSSEEK		0x0A
 #define SYSFLEN		0x0C
 #define SYSERRNO	0x13
 
@@ -80,14 +80,22 @@ long smh_open(const char *fname, enum smh_open_mode mode)
 	return fd;
 }
 
+/**
+ * struct smg_rdwr_s - Arguments for read and write
+ * @fd: A file descriptor returned from smh_open()
+ * @memp: Pointer to a buffer of memory of at least @len bytes
+ * @len: The number of bytes to read or write
+ */
+struct smh_rdwr_s {
+	long fd;
+	void *memp;
+	size_t len;
+};
+
 long smh_read(long fd, void *memp, size_t len)
 {
 	long ret;
-	struct smh_read_s {
-		long fd;
-		void *memp;
-		size_t len;
-	} read;
+	struct smh_rdwr_s read;
 
 	debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len);
 
@@ -101,6 +109,24 @@ long smh_read(long fd, void *memp, size_t len)
 	return len - ret;
 }
 
+long smh_write(long fd, const void *memp, size_t len, ulong *written)
+{
+	long ret;
+	struct smh_rdwr_s write;
+
+	debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len);
+
+	write.fd = fd;
+	write.memp = (void *)memp;
+	write.len = len;
+
+	ret = smh_trap(SYSWRITE, &write);
+	*written = len - ret;
+	if (ret)
+		return smh_errno();
+	return 0;
+}
+
 long smh_close(long fd)
 {
 	long ret;
@@ -125,6 +151,25 @@ long smh_flen(long fd)
 	return ret;
 }
 
+long smh_seek(long fd, long pos)
+{
+	long ret;
+	struct smh_seek_s {
+		long fd;
+		long pos;
+	} seek;
+
+	debug("%s: fd %ld pos %ld\n", __func__, fd, pos);
+
+	seek.fd = fd;
+	seek.pos = pos;
+
+	ret = smh_trap(SYSSEEK, &seek);
+	if (ret)
+		return smh_errno();
+	return 0;
+}
+
 static int smh_load_file(const char * const name, ulong load_addr,
 			 ulong *end_addr)
 {
diff --git a/include/semihosting.h b/include/semihosting.h
index d8337b6269..b53c650444 100644
--- a/include/semihosting.h
+++ b/include/semihosting.h
@@ -50,6 +50,17 @@ long smh_open(const char *fname, enum smh_open_mode mode);
  */
 long smh_read(long fd, void *memp, size_t len);
 
+/**
+ * smh_write() - Write data to a file
+ * @fd: A file descriptor returned from smh_open()
+ * @memp: Pointer to a buffer of memory of at least @len bytes
+ * @len: The number of bytes to read
+ * @written: Pointer which will be updated with the actual bytes written
+ *
+ * Return: 0 on success or negative error on failure
+ */
+long smh_write(long fd, const void *memp, size_t len, ulong *written);
+
 /**
  * smh_close() - Close an open file
  * @fd: A file descriptor returned from smh_open()
@@ -66,4 +77,13 @@ long smh_close(long fd);
  */
 long smh_flen(long fd);
 
+/**
+ * smh_seek() - Seek to a position in a file
+ * @fd: A file descriptor returned from smh_open()
+ * @pos: The offset (in bytes) to seek to
+ *
+ * Return: 0 on success or negative error on failure
+ */
+long smh_seek(long fd, long pos);
+
 #endif /* _SEMIHOSTING_H */
-- 
2.25.1

[PATCH v2 11/28] spl: Add semihosting boot method

[Sean Anderson]

This adds a boot method for loading the next stage from the host. It is
mostly modeled off of spl_load_image_ext. I am not really sure why/how
spl_load_image_fat uses three different methods to load the image, but
the simple case seems to work OK for now.

To control the presence of this boot method, we add a config symbol.
While we're at it, we update the original semihosting config symbol.

I think semihosting has some advantages of other forms of JTAG boot.
Common other ways to boot from JTAG include:

- Implementing DDR initialization through JTAG (typically with dozens of
  lines of TCL) and then loading U-Boot. The DDR initialization
  typically uses hard-coded register writes, and is not easily adapted
  to different boards. BOOT_DEVICE_SMH allows booting with SPL,
  leveraging U-Boot's existing DDR initialization code. This is the
  method used by NXP's CodeWarrior IDE on Layerscape processors (see
  AN12270).
- Loading a bootloader into SDRAM, waiting for it to initialize DDR, and
  then loading U-Boot. This is tricky, because the debugger must stop the
  boot after the bootloader has completed its work. Trying to load
  U-Boot too early can cause failure to boot. This is the method used by
  Xilinx with its Zynq(MP) processors.
- Loading SPL with BOOT_DEVICE_RAM and breaking before SPL loads the
  image to load U-Boot at the appropriate place. This can be a bit
  tricky, because the load address is dependent on the header size. An
  elf with symbols must also be used in order to stop at the appropriate
  point. BOOT_DEVICE_SMH can be viewed as an extension of this process,
  where SPL automatically stops and tells the host where to place the
  image.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- Make CONFIG_SPL_SEMIHOSTING depend on SPL
- Compile arch/arm/lib/semihosting.o in SPL

 arch/arm/Kconfig             | 26 +++++++++++--
 arch/arm/include/asm/spl.h   |  1 +
 arch/arm/lib/Makefile        |  2 +-
 common/spl/Makefile          |  1 +
 common/spl/spl_semihosting.c | 71 ++++++++++++++++++++++++++++++++++++
 5 files changed, 96 insertions(+), 5 deletions(-)
 create mode 100644 common/spl/spl_semihosting.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 974555f900..209232aac2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -403,11 +403,29 @@ config ARM_SMCCC
 	  firmware (for example, PSCI) according to SMCCC.
 
 config SEMIHOSTING
-	bool "support boot from semihosting"
+	bool "Support ARM semihosting"
 	help
-	  In emulated environments, semihosting is a way for
-	  the hosted environment to call out to the emulator to
-	  retrieve files from the host machine.
+	  Semihosting is a method for a target to communicate with a host
+	  debugger. It uses special instructions which the debugger will trap
+	  on and interpret. This allows U-Boot to read/write files, print to
+	  the console, and execute arbitrary commands on the host system.
+
+	  Enabling this option will add support for reading and writing files
+	  on the host system. If you don't have a debugger attached then trying
+	  to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
+
+config SPL_SEMIHOSTING
+	bool "Support ARM semihosting in SPL"
+	depends on SPL
+	help
+	  Semihosting is a method for a target to communicate with a host
+	  debugger. It uses special instructions which the debugger will trap
+	  on and interpret. This allows U-Boot to read/write files, print to
+	  the console, and execute arbitrary commands on the host system.
+
+	  Enabling this option will add support for reading and writing files
+	  on the host system. If you don't have a debugger attached then trying
+	  to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
 
 config SYS_THUMB_BUILD
 	bool "Build U-Boot using the Thumb instruction set"
diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h
index e568af2561..b5790bd0bc 100644
--- a/arch/arm/include/asm/spl.h
+++ b/arch/arm/include/asm/spl.h
@@ -30,6 +30,7 @@ enum {
 	BOOT_DEVICE_DFU,
 	BOOT_DEVICE_XIP,
 	BOOT_DEVICE_BOOTROM,
+	BOOT_DEVICE_SMH,
 	BOOT_DEVICE_NONE
 };
 #endif
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index c48e1f622d..594fc1228a 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -46,7 +46,7 @@ else
 obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o
 obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o
 endif
-obj-$(CONFIG_SEMIHOSTING) += semihosting.o
+obj-$(CONFIG_$(SPL_TPL_)SEMIHOSTING) += semihosting.o
 
 obj-y	+= bdinfo.o
 obj-y	+= sections.o
diff --git a/common/spl/Makefile b/common/spl/Makefile
index db8fd36a26..e71e7bee66 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_$(SPL_TPL_)USB_STORAGE) += spl_usb.o
 obj-$(CONFIG_$(SPL_TPL_)FS_FAT) += spl_fat.o
 obj-$(CONFIG_$(SPL_TPL_)FS_EXT4) += spl_ext.o
 obj-$(CONFIG_$(SPL_TPL_)SATA) += spl_sata.o
+obj-$(CONFIG_$(SPL_TPL_)SEMIHOSTING) += spl_semihosting.o
 obj-$(CONFIG_$(SPL_TPL_)DFU) += spl_dfu.o
 obj-$(CONFIG_$(SPL_TPL_)SPI_LOAD) += spl_spi.o
 obj-$(CONFIG_$(SPL_TPL_)RAM_SUPPORT) += spl_ram.o
diff --git a/common/spl/spl_semihosting.c b/common/spl/spl_semihosting.c
new file mode 100644
index 0000000000..df6aeb2951
--- /dev/null
+++ b/common/spl/spl_semihosting.c
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
+ */
+
+#include <common.h>
+#include <image.h>
+#include <log.h>
+#include <semihosting.h>
+#include <spl.h>
+
+static int smh_read_full(long fd, void *memp, size_t len)
+{
+	long read;
+
+	read = smh_read(fd, memp, len);
+	if (read < 0)
+		return read;
+	if (read != len)
+		return -EIO;
+	return 0;
+}
+
+static int spl_smh_load_image(struct spl_image_info *spl_image,
+			      struct spl_boot_device *bootdev)
+{
+	const char *filename = CONFIG_SPL_FS_LOAD_PAYLOAD_NAME;
+	int ret;
+	long fd, len;
+	struct image_header *header =
+		spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+
+	fd = smh_open(filename, MODE_READ | MODE_BINARY);
+	if (fd < 0) {
+		log_debug("could not open %s: %ld\n", filename, fd);
+		return fd;
+	}
+
+	ret = smh_flen(fd);
+	if (ret < 0) {
+		log_debug("could not get length of image: %d\n", ret);
+		goto out;
+	}
+	len = ret;
+
+	ret = smh_read_full(fd, header, sizeof(struct image_header));
+	if (ret) {
+		log_debug("could not read image header: %d\n", ret);
+		goto out;
+	}
+
+	ret = spl_parse_image_header(spl_image, bootdev, header);
+	if (ret) {
+		log_debug("failed to parse image header: %d\n", ret);
+		goto out;
+	}
+
+	ret = smh_seek(fd, 0);
+	if (ret) {
+		log_debug("could not seek to start of image: %d\n", ret);
+		goto out;
+	}
+
+	ret = smh_read_full(fd, (void *)spl_image->load_addr, len);
+	if (ret)
+		log_debug("could not read %s: %d\n", filename, ret);
+out:
+	smh_close(fd);
+	return ret;
+}
+SPL_LOAD_IMAGE_METHOD("SEMIHOSTING", 0, BOOT_DEVICE_SMH, spl_smh_load_image);
-- 
2.25.1

[PATCH v2 12/28] fs: Add semihosting filesystem

[Sean Anderson]

This adds a filesystem which is backed by the host's filesystem. It is
modeled off of sandboxfs, which has very similar aims. Semihosting
doesn't support listing directories (except with SYS_SYSTEM), so neither
do we. it's possible to optimize a bit for the common case of reading a
whole file by omitting a call to smh_seek, but this is left as a future
optimization.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

(no changes since v1)

 disk/part.c             |   4 +-
 fs/Makefile             |   1 +
 fs/fs.c                 |  20 +++++++
 fs/semihostingfs.c      | 115 ++++++++++++++++++++++++++++++++++++++++
 include/fs.h            |   1 +
 include/semihostingfs.h |  21 ++++++++
 6 files changed, 160 insertions(+), 2 deletions(-)
 create mode 100644 fs/semihostingfs.c
 create mode 100644 include/semihostingfs.h

diff --git a/disk/part.c b/disk/part.c
index 49e39a24e8..b95405bb49 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -455,7 +455,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 	int part;
 	struct disk_partition tmpinfo;
 
-#ifdef CONFIG_SANDBOX
+#if IS_ENABLED(CONFIG_SANDBOX) || IS_ENABLED(CONFIG_SEMIHOSTING)
 	/*
 	 * Special-case a pseudo block device "hostfs", to allow access to the
 	 * host's own filesystem.
@@ -467,7 +467,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 		info->blksz = 0;
 		info->bootable = 0;
 		strcpy((char *)info->type, BOOT_PART_TYPE);
-		strcpy((char *)info->name, "Sandbox host");
+		strcpy((char *)info->name, "Host filesystem");
 #if CONFIG_IS_ENABLED(PARTITION_UUIDS)
 		info->uuid[0] = 0;
 #endif
diff --git a/fs/Makefile b/fs/Makefile
index 937cbcf6e8..c25d022946 100644
--- a/fs/Makefile
+++ b/fs/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_FS_FAT) += fat/
 obj-$(CONFIG_FS_JFFS2) += jffs2/
 obj-$(CONFIG_CMD_REISER) += reiserfs/
 obj-$(CONFIG_SANDBOX) += sandbox/
+obj-$(CONFIG_SEMIHOSTING) += semihostingfs.o
 obj-$(CONFIG_CMD_UBIFS) += ubifs/
 obj-$(CONFIG_YAFFS2) += yaffs2/
 obj-$(CONFIG_CMD_ZFS) += zfs/
diff --git a/fs/fs.c b/fs/fs.c
index 023f89cafe..bba010ea99 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -18,6 +18,7 @@
 #include <fat.h>
 #include <fs.h>
 #include <sandboxfs.h>
+#include <semihostingfs.h>
 #include <ubifs_uboot.h>
 #include <btrfs.h>
 #include <asm/global_data.h>
@@ -246,6 +247,25 @@ static struct fstype_info fstypes[] = {
 		.ln = fs_ln_unsupported,
 	},
 #endif
+#ifdef CONFIG_SEMIHOSTING
+	{
+		.fstype = FS_TYPE_SEMIHOSTING,
+		.name = "semihosting",
+		.null_dev_desc_ok = true,
+		.probe = smh_fs_set_blk_dev,
+		.close = fs_close_unsupported,
+		.ls = fs_ls_unsupported,
+		.exists = fs_exists_unsupported,
+		.size = smh_fs_size,
+		.read = smh_fs_read,
+		.write = smh_fs_write,
+		.uuid = fs_uuid_unsupported,
+		.opendir = fs_opendir_unsupported,
+		.unlink = fs_unlink_unsupported,
+		.mkdir = fs_mkdir_unsupported,
+		.ln = fs_ln_unsupported,
+	},
+#endif
 #ifdef CONFIG_CMD_UBIFS
 	{
 		.fstype = FS_TYPE_UBIFS,
diff --git a/fs/semihostingfs.c b/fs/semihostingfs.c
new file mode 100644
index 0000000000..96eb3349a2
--- /dev/null
+++ b/fs/semihostingfs.c
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022, Sean Anderson <sean.anderson@seco.com>
+ * Copyright (c) 2012, Google Inc.
+ */
+
+#include <common.h>
+#include <fs.h>
+#include <malloc.h>
+#include <os.h>
+#include <semihosting.h>
+#include <semihostingfs.h>
+
+int smh_fs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info)
+{
+	/*
+	 * Only accept a NULL struct blk_desc for the semihosting, which is when
+	 * hostfs interface is used
+	 */
+	return !!rbdd;
+}
+
+static int smh_fs_read_at(const char *filename, loff_t pos, void *buffer,
+			  loff_t maxsize, loff_t *actread)
+{
+	long fd, size, ret;
+
+	fd = smh_open(filename, MODE_READ | MODE_BINARY);
+	if (fd < 0)
+		return fd;
+	ret = smh_seek(fd, pos);
+	if (ret < 0) {
+		smh_close(fd);
+		return ret;
+	}
+	if (!maxsize) {
+		size = smh_flen(fd);
+		if (ret < 0) {
+			smh_close(fd);
+			return size;
+		}
+
+		maxsize = size;
+	}
+
+	size = smh_read(fd, buffer, maxsize);
+	smh_close(fd);
+	if (size < 0)
+		return size;
+
+	*actread = size;
+	return 0;
+}
+
+static int smh_fs_write_at(const char *filename, loff_t pos, void *buffer,
+			   loff_t towrite, loff_t *actwrite)
+{
+	long fd, size, ret;
+
+	fd = smh_open(filename, MODE_READ | MODE_BINARY | MODE_PLUS);
+	if (fd < 0)
+		return fd;
+	ret = smh_seek(fd, pos);
+	if (ret < 0) {
+		smh_close(fd);
+		return ret;
+	}
+
+	ret = smh_write(fd, buffer, towrite, &size);
+	smh_close(fd);
+	*actwrite = size;
+	return ret;
+}
+
+int smh_fs_size(const char *filename, loff_t *result)
+{
+	long fd, size;
+
+	fd = smh_open(filename, MODE_READ | MODE_BINARY);
+	if (fd < 0)
+		return fd;
+
+	size = smh_flen(fd);
+	smh_close(fd);
+
+	if (size < 0)
+		return size;
+
+	*result = size;
+	return 0;
+}
+
+int smh_fs_read(const char *filename, void *buf, loff_t offset, loff_t len,
+		loff_t *actread)
+{
+	int ret;
+
+	ret = smh_fs_read_at(filename, offset, buf, len, actread);
+	if (ret)
+		printf("** Unable to read file %s **\n", filename);
+
+	return ret;
+}
+
+int smh_fs_write(const char *filename, void *buf, loff_t offset,
+		 loff_t len, loff_t *actwrite)
+{
+	int ret;
+
+	ret = smh_fs_write_at(filename, offset, buf, len, actwrite);
+	if (ret)
+		printf("** Unable to write file %s **\n", filename);
+
+	return ret;
+}
diff --git a/include/fs.h b/include/fs.h
index c8df3886ac..2f631624b5 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -17,6 +17,7 @@ struct cmd_tbl;
 #define FS_TYPE_UBIFS	4
 #define FS_TYPE_BTRFS	5
 #define FS_TYPE_SQUASHFS 6
+#define FS_TYPE_SEMIHOSTING 7
 
 struct blk_desc;
 
diff --git a/include/semihostingfs.h b/include/semihostingfs.h
new file mode 100644
index 0000000000..25ebdbbeff
--- /dev/null
+++ b/include/semihostingfs.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2022, Sean Anderson <sean.anderson@seco.com>
+ * Copyright (c) 2012, Google Inc.
+ */
+
+#ifndef __SEMIHOSTING_FS__
+#define __SEMIHOSTING_FS__
+
+struct blk_desc;
+struct disk_partition;
+
+int smh_fs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info);
+void smh_fs_close(void);
+int smh_fs_size(const char *filename, loff_t *size);
+int smh_fs_read(const char *filename, void *buf, loff_t offset, loff_t len,
+		loff_t *actread);
+int smh_fs_write(const char *filename, void *buf, loff_t offset,
+		 loff_t len, loff_t *actwrite);
+
+#endif
-- 
2.25.1

[PATCH v2 13/28] cmd: fdt: Use start/size for chosen instead of start/end

[Sean Anderson]

Most U-Boot command deal with start/size instead of start/end. Convert
the "fdt chosen" command to use these semantics as well. The only user
of this subcommand is vexpress, so convert the smhload command to use
this as well. We don't bother renaming the variable in vexpress64's
bootcommand, since it will be rewritten in the next commit.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

(no changes since v1)

 arch/arm/lib/semihosting.c | 16 ++++++++--------
 cmd/fdt.c                  |  6 +++---
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
index d08003cef1..45cd566cfc 100644
--- a/arch/arm/lib/semihosting.c
+++ b/arch/arm/lib/semihosting.c
@@ -171,7 +171,7 @@ long smh_seek(long fd, long pos)
 }
 
 static int smh_load_file(const char * const name, ulong load_addr,
-			 ulong *end_addr)
+			 ulong *size)
 {
 	long fd;
 	long len;
@@ -191,11 +191,11 @@ static int smh_load_file(const char * const name, ulong load_addr,
 	smh_close(fd);
 
 	if (ret == len) {
-		*end_addr = load_addr + len - 1;
+		*size = len;
 		printf("loaded file %s from %08lX to %08lX, %08lX bytes\n",
 		       name,
 		       load_addr,
-		       *end_addr,
+		       load_addr + len - 1,
 		       len);
 	} else if (ret >= 0) {
 		ret = -EAGAIN;
@@ -214,22 +214,22 @@ static int do_smhload(struct cmd_tbl *cmdtp, int flag, int argc,
 {
 	if (argc == 3 || argc == 4) {
 		ulong load_addr;
-		ulong end_addr = 0;
+		ulong size = 0;
 		int ret;
-		char end_str[64];
+		char size_str[64];
 
 		load_addr = hextoul(argv[2], NULL);
 		if (!load_addr)
 			return -1;
 
-		ret = smh_load_file(argv[1], load_addr, &end_addr);
+		ret = smh_load_file(argv[1], load_addr, &size);
 		if (ret < 0)
 			return CMD_RET_FAILURE;
 
 		/* Optionally save returned end to the environment */
 		if (argc == 4) {
-			sprintf(end_str, "0x%08lx", end_addr);
-			env_set(argv[3], end_str);
+			sprintf(size_str, "0x%08lx", size);
+			env_set(argv[3], size_str);
 		}
 	} else {
 		return CMD_RET_USAGE;
diff --git a/cmd/fdt.c b/cmd/fdt.c
index 2a207bf2b5..7d7cae88a2 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -638,7 +638,7 @@ static int do_fdt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 
 		if (argc == 4) {
 			initrd_start = hextoul(argv[2], NULL);
-			initrd_end = hextoul(argv[3], NULL);
+			initrd_end = initrd_start + hextoul(argv[3], NULL) - 1;
 		}
 
 		fdt_chosen(working_fdt);
@@ -1083,8 +1083,8 @@ static char fdt_help_text[] =
 	"fdt rsvmem print                    - Show current mem reserves\n"
 	"fdt rsvmem add <addr> <size>        - Add a mem reserve\n"
 	"fdt rsvmem delete <index>           - Delete a mem reserves\n"
-	"fdt chosen [<start> <end>]          - Add/update the /chosen branch in the tree\n"
-	"                                        <start>/<end> - initrd start/end addr\n"
+	"fdt chosen [<start> <size>]         - Add/update the /chosen branch in the tree\n"
+	"                                        <start>/<size> - initrd start addr/size\n"
 #if defined(CONFIG_FIT_SIGNATURE)
 	"fdt checksign [<addr>]              - check FIT signature\n"
 	"                                        <start> - addr of key blob\n"
-- 
2.25.1

[PATCH v2 14/28] arm: smh: Remove smhload command

[Sean Anderson]

This command's functionality is now completely implemented by the
standard fs load command. Convert the vexpress64 boot command (which is
the only user) and remove the implementation.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- Rebase on Andre's series

 arch/arm/lib/semihosting.c       | 76 --------------------------------
 include/configs/vexpress_aemv8.h | 10 ++---
 2 files changed, 5 insertions(+), 81 deletions(-)

diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
index 45cd566cfc..57ab25294f 100644
--- a/arch/arm/lib/semihosting.c
+++ b/arch/arm/lib/semihosting.c
@@ -10,8 +10,6 @@
  * available in silicon now, fastmodel usage makes less sense for them.
  */
 #include <common.h>
-#include <command.h>
-#include <env.h>
 #include <log.h>
 #include <semihosting.h>
 
@@ -169,77 +167,3 @@ long smh_seek(long fd, long pos)
 		return smh_errno();
 	return 0;
 }
-
-static int smh_load_file(const char * const name, ulong load_addr,
-			 ulong *size)
-{
-	long fd;
-	long len;
-	long ret;
-
-	fd = smh_open(name, MODE_READ | MODE_BINARY);
-	if (fd < 0)
-		return fd;
-
-	len = smh_flen(fd);
-	if (len < 0) {
-		smh_close(fd);
-		return len;
-	}
-
-	ret = smh_read(fd, (void *)load_addr, len);
-	smh_close(fd);
-
-	if (ret == len) {
-		*size = len;
-		printf("loaded file %s from %08lX to %08lX, %08lX bytes\n",
-		       name,
-		       load_addr,
-		       load_addr + len - 1,
-		       len);
-	} else if (ret >= 0) {
-		ret = -EAGAIN;
-	}
-
-	if (ret < 0) {
-		printf("read failed: %ld\n", ret);
-		return ret;
-	}
-
-	return 0;
-}
-
-static int do_smhload(struct cmd_tbl *cmdtp, int flag, int argc,
-		      char *const argv[])
-{
-	if (argc == 3 || argc == 4) {
-		ulong load_addr;
-		ulong size = 0;
-		int ret;
-		char size_str[64];
-
-		load_addr = hextoul(argv[2], NULL);
-		if (!load_addr)
-			return -1;
-
-		ret = smh_load_file(argv[1], load_addr, &size);
-		if (ret < 0)
-			return CMD_RET_FAILURE;
-
-		/* Optionally save returned end to the environment */
-		if (argc == 4) {
-			sprintf(size_str, "0x%08lx", size);
-			env_set(argv[3], size_str);
-		}
-	} else {
-		return CMD_RET_USAGE;
-	}
-	return 0;
-}
-
-U_BOOT_CMD(smhload, 4, 0, do_smhload, "load a file using semihosting",
-	   "<file> 0x<address> [end var]\n"
-	   "    - load a semihosted file to the address specified\n"
-	   "      if the optional [end var] is specified, the end\n"
-	   "      address of the file will be stored in this environment\n"
-	   "      variable.\n");
diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h
index eb1f7a78d3..8badeed577 100644
--- a/include/configs/vexpress_aemv8.h
+++ b/include/configs/vexpress_aemv8.h
@@ -170,20 +170,20 @@
  */
 #define BOOTENV_DEV_SMH(devtypeu, devtypel, instance) \
 	"bootcmd_smh= " 						\
-		"if smhload ${boot_name} ${boot_addr_r}; then"		\
+		"if load hostfs ${boot_addr_r} ${boot_name}; then"		\
 		"  setenv bootargs;"					\
 		"  abootimg addr ${boot_addr_r};"			\
 		"  abootimg get dtb --index=0 fdt_addr_r;"		\
 		"  bootm ${boot_addr_r} ${boot_addr_r} ${fdt_addr_r};"	\
 		"else"							\
-		"  if smhload ${kernel_name} ${kernel_addr_r}; then"	\
+		"  if load hostfs ${kernel_addr_r} ${kernel_name}; then"	\
 		"    setenv fdt_high 0xffffffffffffffff;"		\
 		"    setenv initrd_high 0xffffffffffffffff;"		\
-		"    smhload ${fdtfile} ${fdt_addr_r};"			\
-		"    smhload ${ramdisk_name} ${ramdisk_addr_r} ramdisk_end;" \
+		"    load hostfs ${fdt_addr_r} ${fdtfile};"			\
+		"    load hostfs ${ramdisk_addr_r} ${ramdisk_name};" \
 		"    fdt addr ${fdt_addr_r};"				\
 		"    fdt resize;"					\
-		"    fdt chosen ${ramdisk_addr_r} ${ramdisk_end};"	\
+		"    fdt chosen ${ramdisk_addr_r} ${filesize};"	\
 		"    booti $kernel_addr_r - $fdt_addr_r;"		\
 		"  fi;"							\
 		"fi\0"
-- 
2.25.1

[PATCH v2 15/28] arm: smh: Add some functions for working with the host console

[Sean Anderson]

This adds three wrappers around the semihosting commands for reading and
writing to the host console. We use the more standard getc/putc/puts
names instead of readc/writec/write0 for familiarity.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

(no changes since v1)

 arch/arm/lib/semihosting.c | 18 ++++++++++++++++++
 include/semihosting.h      | 19 +++++++++++++++++++
 2 files changed, 37 insertions(+)

diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
index 57ab25294f..7595dbc4a9 100644
--- a/arch/arm/lib/semihosting.c
+++ b/arch/arm/lib/semihosting.c
@@ -15,8 +15,11 @@
 
 #define SYSOPEN		0x01
 #define SYSCLOSE	0x02
+#define SYSWRITEC	0x03
+#define SYSWRITE0	0x04
 #define SYSWRITE	0x05
 #define SYSREAD		0x06
+#define SYSREADC	0x07
 #define SYSSEEK		0x0A
 #define SYSFLEN		0x0C
 #define SYSERRNO	0x13
@@ -167,3 +170,18 @@ long smh_seek(long fd, long pos)
 		return smh_errno();
 	return 0;
 }
+
+int smh_getc(void)
+{
+	return smh_trap(SYSREADC, NULL);
+}
+
+void smh_putc(char ch)
+{
+	smh_trap(SYSWRITEC, &ch);
+}
+
+void smh_puts(const char *s)
+{
+	smh_trap(SYSWRITE0, (char *)s);
+}
diff --git a/include/semihosting.h b/include/semihosting.h
index b53c650444..6f3c29786c 100644
--- a/include/semihosting.h
+++ b/include/semihosting.h
@@ -86,4 +86,23 @@ long smh_flen(long fd);
  */
 long smh_seek(long fd, long pos);
 
+/**
+ * smh_getc() - Read a character from stdin
+ *
+ * Return: The character read, or a negative error on failure
+ */
+int smh_getc(void);
+
+/**
+ * smh_putc() - Print a character on stdout
+ * @ch: The character to print
+ */
+void smh_putc(char ch);
+
+/**
+ * smh_write0() - Print a nul-terminated string on stdout
+ * @s: The string to print
+ */
+void smh_puts(const char *s);
+
 #endif /* _SEMIHOSTING_H */
-- 
2.25.1

[PATCH v2 16/28] serial: Add semihosting driver

[Sean Anderson]

This adds a serial driver which uses semihosting calls to read and write
to the host's console. For convenience, if CONFIG_DM_SERIAL is enabled,
we will instantiate a serial driver. This allows users to enable this
driver (which has no physical device) without modifying their device
trees or board files. We also implement a non-DM driver for SPL, or for
much faster output in U-Boot proper.

There are three ways to print to the console:

Method              Baud
================== =====
smh_putc in a loop   170
smh_puts            1600
smh_write with :tt 20000
================== =====

These speeds were measured using a 175 character message with a J-Link
adapter. For reference, U-Boot typically prints around 2700 characters
during boot on this board. There are two major factors affecting the
speed of these functions. First, each breakpoint incurs a delay. Second,
each debugger memory transaction incurs a delay. smh_putc has a
breakpoint and memory transaction for every character. smh_puts has one
breakpoint, but still has to use a transaction for every character. This
is because we don't know the length up front, so OpenOCD has to check if
each character is nul. smh_write has only one breakpoint and one memory
transfer.

DM serial drivers can only implement a putc interface, so we are stuck
with the slowest API. Non-DM drivers can implement puts, which is vastly
more efficient. When the driver starts up, we try to open :tt. Since
this is an extension, this may fail. If it does, we fall back to
smh_puts. We don't check :semihosting-features, since there are
nonconforming implementations (OpenOCD) which don't implement it (but
*do* implement :tt).

There is no non-blocking I/O available, so we don't implement pending.
This will cause __serial_tstc to always return true. If
CONFIG_SERIAL_RX_BUFFER is enabled, _serial_tstc will try and read
characters forever. To avoid this, we depend on this config being
disabled.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- Fix typos in commit message
- Fix baud numbers being off by 10
- Rename non-DM driver struct to match format of other drivers

 drivers/serial/Kconfig              |  22 ++++++
 drivers/serial/Makefile             |   1 +
 drivers/serial/serial.c             |   2 +
 drivers/serial/serial_semihosting.c | 108 ++++++++++++++++++++++++++++
 include/serial.h                    |   1 +
 5 files changed, 134 insertions(+)
 create mode 100644 drivers/serial/serial_semihosting.c

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 345d1881f5..cc20759505 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -399,6 +399,15 @@ config DEBUG_UART_SANDBOX
 	  start up driver model. The driver will be available until the real
 	  driver model serial is running.
 
+config DEBUG_UART_SEMIHOSTING
+	bool "semihosting"
+	depends on SEMIHOSTING_SERIAL
+	help
+	  Select this to enable the debug UART using the semihosting driver.
+	  This provides basic serial output from the console without needing to
+	  start up driver model. The driver will be available until the real
+	  driver model serial is running.
+
 config DEBUG_UART_SIFIVE
 	bool "SiFive UART"
 	depends on SIFIVE_SERIAL
@@ -778,6 +787,19 @@ config SCIF_CONSOLE
 	  on systems with RCar or SH SoCs, say Y to this option. If unsure,
 	  say N.
 
+config SEMIHOSTING_SERIAL
+	bool "Semihosting UART support"
+	depends on SEMIHOSTING && !SERIAL_RX_BUFFER
+	help
+	  Select this to enable a serial UART using semihosting. Special halt
+	  instructions will be issued which an external debugger (such as a
+	  JTAG emulator) may interpret. The debugger will display U-Boot's
+	  console output on the host system.
+
+	  Enable this option only if you are using a debugger which supports
+	  semihosting. If you are not using a debugger, this driver will halt
+	  the boot.
+
 config UNIPHIER_SERIAL
 	bool "Support for UniPhier on-chip UART"
 	depends on ARCH_UNIPHIER
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 52e70aa191..b68b5e7b2b 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -52,6 +52,7 @@ endif
 obj-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
 obj-$(CONFIG_SANDBOX_SERIAL) += sandbox.o
 obj-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
+obj-$(CONFIG_SEMIHOSTING_SERIAL) += serial_semihosting.o
 obj-$(CONFIG_ZYNQ_SERIAL) += serial_zynq.o
 obj-$(CONFIG_FSL_LPUART) += serial_lpuart.o
 obj-$(CONFIG_FSL_LINFLEXUART) += serial_linflexuart.o
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index ebbd21916d..6cdbb89841 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -126,6 +126,7 @@ serial_initfunc(mxc_serial_initialize);
 serial_initfunc(ns16550_serial_initialize);
 serial_initfunc(pl01x_serial_initialize);
 serial_initfunc(pxa_serial_initialize);
+serial_initfunc(smh_serial_initialize);
 serial_initfunc(sh_serial_initialize);
 serial_initfunc(mtk_serial_initialize);
 
@@ -180,6 +181,7 @@ int serial_initialize(void)
 	ns16550_serial_initialize();
 	pl01x_serial_initialize();
 	pxa_serial_initialize();
+	smh_serial_initialize();
 	sh_serial_initialize();
 	mtk_serial_initialize();
 
diff --git a/drivers/serial/serial_semihosting.c b/drivers/serial/serial_semihosting.c
new file mode 100644
index 0000000000..b43683c6f1
--- /dev/null
+++ b/drivers/serial/serial_semihosting.c
@@ -0,0 +1,108 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <serial.h>
+#include <semihosting.h>
+
+#if CONFIG_IS_ENABLED(DM_SERIAL)
+static int smh_serial_getc(struct udevice *dev)
+{
+	return smh_getc();
+}
+
+static int smh_serial_putc(struct udevice *dev, const char ch)
+{
+	smh_putc(ch);
+	return 0;
+}
+
+static const struct dm_serial_ops smh_serial_ops = {
+	.putc = smh_serial_putc,
+	.getc = smh_serial_getc,
+};
+
+U_BOOT_DRIVER(smh_serial) = {
+	.name	= "serial_semihosting",
+	.id	= UCLASS_SERIAL,
+	.ops	= &smh_serial_ops,
+	.flags	= DM_FLAG_PRE_RELOC,
+};
+
+U_BOOT_DRVINFO(smh_serial) = {
+	.name = "serial_semihosting",
+};
+#else /* DM_SERIAL */
+static int outfd = -ENODEV;
+
+static int smh_serial_start(void)
+{
+	outfd = smh_open(":tt", MODE_WRITE);
+	return 0;
+}
+
+static int smh_serial_stop(void)
+{
+	if (outfd >= 0)
+		smh_close(outfd);
+	return 0;
+}
+
+static void smh_serial_setbrg(void)
+{
+}
+
+static int smh_serial_tstc(void)
+{
+	return 1;
+}
+
+static void smh_serial_puts(const char *s)
+{
+	ulong unused;
+
+	if (outfd < 0)
+		smh_puts(s);
+	else
+		smh_write(outfd, s, strlen(s), &unused);
+}
+
+struct serial_device serial_smh_device = {
+	.name	= "serial_smh",
+	.start	= smh_serial_start,
+	.stop	= smh_serial_stop,
+	.setbrg	= smh_serial_setbrg,
+	.getc	= smh_getc,
+	.tstc	= smh_serial_tstc,
+	.putc	= smh_putc,
+	.puts	= smh_serial_puts,
+};
+
+void smh_serial_initialize(void)
+{
+	serial_register(&serial_smh_device);
+}
+
+__weak struct serial_device *default_serial_console(void)
+{
+	return &serial_smh_device;
+}
+#endif
+
+#ifdef CONFIG_DEBUG_UART_SEMIHOSTING
+#include <debug_uart.h>
+
+static inline void _debug_uart_init(void)
+{
+}
+
+static inline void _debug_uart_putc(int c)
+{
+	smh_putc(c);
+}
+
+DEBUG_UART_FUNCS
+#endif
diff --git a/include/serial.h b/include/serial.h
index 19a8c0c67d..2681d26c82 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -23,6 +23,7 @@ struct serial_device {
 void default_serial_puts(const char *s);
 
 extern struct serial_device serial_smc_device;
+extern struct serial_device serial_smh_device;
 extern struct serial_device serial_scc_device;
 extern struct serial_device *default_serial_console(void);
 
-- 
2.25.1

[PATCH v2 17/28] doc: smh: Update semihosting documentation

[Sean Anderson]

This documents the new semihosting features added in the past few
commits. It also describes how to migrate any out-of-tree users of
smhload.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- Add migration instructions for smhload

 doc/usage/semihosting.rst | 38 ++++++++++++++++++++++++++++++++++----
 1 file changed, 34 insertions(+), 4 deletions(-)

diff --git a/doc/usage/semihosting.rst b/doc/usage/semihosting.rst
index ed16e4d582..e3cb88724f 100644
--- a/doc/usage/semihosting.rst
+++ b/doc/usage/semihosting.rst
@@ -34,10 +34,40 @@ Foundation and Base fastmodel simulators.
 Loading files
 -------------
 
-The semihosting code adds a "hostfs"::
+The semihosting code adds a "semihosting filesystem"::
 
-  smhload <image> <address> [env var]
+  load hostfs <address> <image>
 
 That will load an image from the host filesystem into RAM at the specified
-address and optionally store the load end address in the specified
-environment variable.
+address. If you are using U-Boot SPL, you can also use ``BOOT_DEVICE_SMH``
+which will load ``CONFIG_SPL_FS_LOAD_PAYLOAD_NAME``.
+
+Host console
+------------
+
+U-Boot can use the host's console instead of a physical serial device by
+enabling ``CONFIG_SERIAL_SEMIHOSTING``. If you don't have
+``CONFIG_DM_SERIAL`` enabled, make sure you disable any other serial
+drivers.
+
+Migrating from ``smhload``
+--------------------------
+
+If you were using the ``smhload`` command, you can migrate commands like::
+
+    smhload <file> <address> [<end var>]
+
+to a generic load command like::
+
+    load hostfs <address> <file>
+
+The ``load`` command will set the ``filesize`` variable with the size of
+the file. The ``fdt chosen`` command has been updated to take a size
+instead of an end address. If you were adding the initramfs to your device
+tree like::
+
+    fdt chosen <address> <end var>
+
+you can now run::
+
+    fdt chosen <address> $filesize
-- 
2.25.1

[PATCH v2 18/28] ls1046ardb: Add support for JTAG boot

[Sean Anderson]

This adds support for booting entirely from JTAG while using a
hard-coded RCW. With these steps, it is not necessary to program a
"good" RCW using CodeWarrior. The method here can be performed with any
JTAG adapter supported by OpenOCD, including the on-board CMSIS-DAP
(albeit very slowly).

These steps require LS1046A support in OpenOCD, which is currently in
the process of being upstreamed [1].

[1] https://review.openocd.org/c/openocd/+/6855

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

(no changes since v1)

 arch/arm/cpu/armv8/fsl-layerscape/spl.c |  2 +
 board/freescale/ls1046ardb/ls1046ardb.c | 10 ++++
 doc/board/nxp/ls1046ardb.rst            | 71 +++++++++++++++++++++++++
 include/configs/ls1046ardb.h            |  2 +
 4 files changed, 85 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index 564cc27c8b..1a7dde30a5 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -27,6 +27,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 u32 spl_boot_device(void)
 {
+	if (IS_ENABLED(CONFIG_SPL_SEMIHOSTING))
+		return BOOT_DEVICE_SMH;
 #ifdef CONFIG_SPL_MMC
 	return BOOT_DEVICE_MMC1;
 #endif
diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c
index d0abfe8869..9af7cf763b 100644
--- a/board/freescale/ls1046ardb/ls1046ardb.c
+++ b/board/freescale/ls1046ardb/ls1046ardb.c
@@ -7,6 +7,8 @@
 #include <i2c.h>
 #include <fdt_support.h>
 #include <init.h>
+#include <semihosting.h>
+#include <serial.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
@@ -27,6 +29,14 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct serial_device *default_serial_console(void)
+{
+#if IS_ENABLED(CONFIG_SEMIHOSTING_SERIAL)
+	return &serial_smh_device;
+#endif
+	return &eserial1_device;
+}
+
 int board_early_init_f(void)
 {
 	fsl_lsch2_early_init_f();
diff --git a/doc/board/nxp/ls1046ardb.rst b/doc/board/nxp/ls1046ardb.rst
index e4499a13fb..69e5ad1495 100644
--- a/doc/board/nxp/ls1046ardb.rst
+++ b/doc/board/nxp/ls1046ardb.rst
@@ -110,6 +110,77 @@ SD boot and eMMC boot
 ``{ SW5[0:8], SW4[0] }`` should be ``0010_0000_0``. eMMC is selected only if
 there is no SD card in the slot.
 
+JTAG boot
+^^^^^^^^^
+
+To recover a bricked board, or to perform initial programming, the ls1046
+supports using two hard-coded Reset Configuration Words (RCWs). Unfortunately,
+this configuration disables most functionality, including the uarts and ethernet.
+However, the SD/MMC and flash controllers are still functional. To get around
+the lack of a serial console, we will use ARM semihosting instead. When
+enabled, OpenOCD will interpret certain instructions as calls to the host
+operating system. This allows U-Boot to use the console, read/write files, or
+run arbitrary commands (!).
+
+When configuring U-Boot, ensure that ``CONFIG_SEMIHOSTING``,
+``CONFIG_SPL_SEMIHOSTING``, and ``CONFIG_SEMIHOSTING_SERIAL`` are enabled.
+``{ SW5[0:8], SW4[0] }`` should be ``0100_1111_0``. Additionally, ``SW4[7]``
+should be set to ``0``. Connect to the "console" USB connector on the front of
+the enclosure.
+
+Create a new file called ``u-boot.tcl`` (or whatever you choose) with the
+following contents::
+
+    # Load the configuration for the LS1046ARDB
+    source [find board/nxp_rdb-ls1046a.cfg]
+    # Initialize the scan chain
+    init
+    # Stop the processor
+    halt
+    # Enable semihosting
+    arm semihosting enable
+    # Load U-Boot SPL
+    load_image spl/u-boot-spl 0 elf
+    # Start executing SPL at the beginning of OCRAM
+    resume 0x10000000
+
+Then, launch openocd like::
+
+    openocd -f u-boot.tcl
+
+You should see the U-boot SPL banner followed by the banner for U-Boot proper
+in the output of openocd. The CMSIS-DAP adapter is slow, so this can take a
+long time. If you don't see it, something has gone wrong. After a while, you
+should see the prompt. You can load an image using semihosting by running::
+
+    => load hostfs $loadaddr <name of file>
+
+Note that openocd's terminal is "cooked," so commands will only be sent to
+U-Boot when you press enter, and all commands will be echoed twice.
+Additionally, openocd will block when waiting for input, ignoring gdb, JTAG
+events, and Ctrl-Cs. To make openocd process these events, just hit enter.
+
+Using an external JTAG adapter
+""""""""""""""""""""""""""""""
+
+The CMSIS-DAP adapter can be rather slow. To speed up booting, use an external
+JTAG adapter. The following examples assume you are using a J-Link, though any
+adapter supported by OpenOCD will do. Ensure that ``SW4[7]`` is ``1``. Attach
+your jtag adapter to J22. Modify ``u-boot.tcl`` and replace the first two lines
+with the following::
+
+    # Load the J-Link configuration (or whatever your adapter is)
+    source [find interface/jlink.cfg]
+    # Use JTAG, since the J-Link also supports SWD
+    transport select jtag
+    # The reset pin resets the whole CPU
+    reset_config srst_only
+    # Load the LS1046A config
+    source [find target/ls1046a.cfg]
+
+You can proceed as normal through the rest of the steps above. I got a speedup
+of around 100x by using a J-Link.
+
 Debug UART
 ----------
 
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 8ed1dceb23..ed549c33b6 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -143,6 +143,8 @@
 #endif
 #endif
 
+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
+
 #include <asm/fsl_secure_boot.h>
 
 #endif /* __LS1046ARDB_H__ */
-- 
2.25.1

[PATCH v2 19/28] arm64: Save esr in pt_regs

[Sean Anderson]

To avoid passing around an extra register everywhere, save esr in
pt_regs like the rest. For proper alignment we need to have a second
(unused) register. All the printfs have to be adjusted, since
it's now an unsigned long and not an int.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- New

 arch/arm/cpu/armv8/exceptions.S         |  6 +++--
 arch/arm/include/asm/proc-armv/ptrace.h |  2 ++
 arch/arm/include/asm/u-boot-arm.h       |  7 +-----
 arch/arm/lib/interrupts_64.c            | 33 +++++++++++++------------
 arch/arm/mach-imx/imx8m/soc.c           |  4 +--
 5 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S
index a15af72e02..001913f429 100644
--- a/arch/arm/cpu/armv8/exceptions.S
+++ b/arch/arm/cpu/armv8/exceptions.S
@@ -84,7 +84,8 @@ _save_el_regs:
 1:	mrs	x1, esr_el1
 	mrs	x2, elr_el1
 0:
-	stp	x2, x0, [sp, #-16]!
+	stp	x1, x0, [sp, #-16]!
+	stp	xzr, x2, [sp, #-16]!
 	mov	x0, sp
 	ret
 
@@ -98,7 +99,7 @@ _save_el_regs:
  * This is the first part of the shared routine called into from all entries.
  */
 exception_exit:
-	ldp	x2, x0, [sp],#16
+	ldp	xzr, x2, [sp],#16
 	switch_el x11, 3f, 2f, 1f
 3:	msr	elr_el3, x2
 	b	_restore_regs
@@ -118,6 +119,7 @@ exception_exit:
  * This is the second part of the shared routine called into from all entries.
  */
 _restore_regs:
+	ldp	xzr, x0, [sp],#16
 	ldp	x1, x2, [sp],#16
 	ldp	x3, x4, [sp],#16
 	ldp	x5, x6, [sp],#16
diff --git a/arch/arm/include/asm/proc-armv/ptrace.h b/arch/arm/include/asm/proc-armv/ptrace.h
index e37ad8fd1f..bebcaf6e33 100644
--- a/arch/arm/include/asm/proc-armv/ptrace.h
+++ b/arch/arm/include/asm/proc-armv/ptrace.h
@@ -21,7 +21,9 @@
  * on the stack during an exception.
  */
 struct pt_regs {
+	unsigned long unused;
 	unsigned long elr;
+	unsigned long esr;
 	unsigned long regs[31];
 };
 
diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h
index 0b93cc48c5..aef048708d 100644
--- a/arch/arm/include/asm/u-boot-arm.h
+++ b/arch/arm/include/asm/u-boot-arm.h
@@ -46,13 +46,8 @@ void do_software_interrupt(struct pt_regs *pt_regs);
 void do_prefetch_abort(struct pt_regs *pt_regs);
 void do_data_abort(struct pt_regs *pt_regs);
 void do_not_used(struct pt_regs *pt_regs);
-#ifdef CONFIG_ARM64
-void do_fiq(struct pt_regs *pt_regs, unsigned int esr);
-void do_irq(struct pt_regs *pt_regs, unsigned int esr);
-#else
 void do_fiq(struct pt_regs *pt_regs);
-void do_irq(struct pt_regs *pt_regswq);
-#endif
+void do_irq(struct pt_regs *pt_regs);
 
 void reset_misc(void);
 
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index c653e67db2..049beeca7e 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -66,10 +66,11 @@ void show_regs(struct pt_regs *regs)
 /*
  * do_bad_sync handles the impossible case in the Synchronous Abort vector.
  */
-void do_bad_sync(struct pt_regs *pt_regs, unsigned int esr)
+void do_bad_sync(struct pt_regs *pt_regs)
 {
 	efi_restore_gd();
-	printf("Bad mode in \"Synchronous Abort\" handler, esr 0x%08x\n", esr);
+	printf("Bad mode in \"Synchronous Abort\" handler, esr 0x%08lx\n",
+	       pt_regs->esr);
 	show_regs(pt_regs);
 	show_efi_loaded_images(pt_regs);
 	panic("Resetting CPU ...\n");
@@ -78,10 +79,10 @@ void do_bad_sync(struct pt_regs *pt_regs, unsigned int esr)
 /*
  * do_bad_irq handles the impossible case in the Irq vector.
  */
-void do_bad_irq(struct pt_regs *pt_regs, unsigned int esr)
+void do_bad_irq(struct pt_regs *pt_regs)
 {
 	efi_restore_gd();
-	printf("Bad mode in \"Irq\" handler, esr 0x%08x\n", esr);
+	printf("Bad mode in \"Irq\" handler, esr 0x%08lx\n", pt_regs->esr);
 	show_regs(pt_regs);
 	show_efi_loaded_images(pt_regs);
 	panic("Resetting CPU ...\n");
@@ -90,10 +91,10 @@ void do_bad_irq(struct pt_regs *pt_regs, unsigned int esr)
 /*
  * do_bad_fiq handles the impossible case in the Fiq vector.
  */
-void do_bad_fiq(struct pt_regs *pt_regs, unsigned int esr)
+void do_bad_fiq(struct pt_regs *pt_regs)
 {
 	efi_restore_gd();
-	printf("Bad mode in \"Fiq\" handler, esr 0x%08x\n", esr);
+	printf("Bad mode in \"Fiq\" handler, esr 0x%08lx\n", pt_regs->esr);
 	show_regs(pt_regs);
 	show_efi_loaded_images(pt_regs);
 	panic("Resetting CPU ...\n");
@@ -102,10 +103,10 @@ void do_bad_fiq(struct pt_regs *pt_regs, unsigned int esr)
 /*
  * do_bad_error handles the impossible case in the Error vector.
  */
-void do_bad_error(struct pt_regs *pt_regs, unsigned int esr)
+void do_bad_error(struct pt_regs *pt_regs)
 {
 	efi_restore_gd();
-	printf("Bad mode in \"Error\" handler, esr 0x%08x\n", esr);
+	printf("Bad mode in \"Error\" handler, esr 0x%08lx\n", pt_regs->esr);
 	show_regs(pt_regs);
 	show_efi_loaded_images(pt_regs);
 	panic("Resetting CPU ...\n");
@@ -114,10 +115,10 @@ void do_bad_error(struct pt_regs *pt_regs, unsigned int esr)
 /*
  * do_sync handles the Synchronous Abort exception.
  */
-void do_sync(struct pt_regs *pt_regs, unsigned int esr)
+void do_sync(struct pt_regs *pt_regs)
 {
 	efi_restore_gd();
-	printf("\"Synchronous Abort\" handler, esr 0x%08x\n", esr);
+	printf("\"Synchronous Abort\" handler, esr 0x%08lx\n", pt_regs->esr);
 	show_regs(pt_regs);
 	show_efi_loaded_images(pt_regs);
 	panic("Resetting CPU ...\n");
@@ -126,10 +127,10 @@ void do_sync(struct pt_regs *pt_regs, unsigned int esr)
 /*
  * do_irq handles the Irq exception.
  */
-void do_irq(struct pt_regs *pt_regs, unsigned int esr)
+void do_irq(struct pt_regs *pt_regs)
 {
 	efi_restore_gd();
-	printf("\"Irq\" handler, esr 0x%08x\n", esr);
+	printf("\"Irq\" handler, esr 0x%08lx\n", pt_regs->esr);
 	show_regs(pt_regs);
 	show_efi_loaded_images(pt_regs);
 	panic("Resetting CPU ...\n");
@@ -138,10 +139,10 @@ void do_irq(struct pt_regs *pt_regs, unsigned int esr)
 /*
  * do_fiq handles the Fiq exception.
  */
-void do_fiq(struct pt_regs *pt_regs, unsigned int esr)
+void do_fiq(struct pt_regs *pt_regs)
 {
 	efi_restore_gd();
-	printf("\"Fiq\" handler, esr 0x%08x\n", esr);
+	printf("\"Fiq\" handler, esr 0x%08lx\n", pt_regs->esr);
 	show_regs(pt_regs);
 	show_efi_loaded_images(pt_regs);
 	panic("Resetting CPU ...\n");
@@ -153,10 +154,10 @@ void do_fiq(struct pt_regs *pt_regs, unsigned int esr)
  * it is defined with weak attribute and can be redefined
  * in processor specific code.
  */
-void __weak do_error(struct pt_regs *pt_regs, unsigned int esr)
+void __weak do_error(struct pt_regs *pt_regs)
 {
 	efi_restore_gd();
-	printf("\"Error\" handler, esr 0x%08x\n", esr);
+	printf("\"Error\" handler, esr 0x%08lx\n", pt_regs->esr);
 	show_regs(pt_regs);
 	show_efi_loaded_images(pt_regs);
 	panic("Resetting CPU ...\n");
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 1a5a391443..06d9f7128d 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -1293,7 +1293,7 @@ void imx_tmu_arch_init(void *reg_base)
 #if defined(CONFIG_IMX8MQ) || defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MN)
 bool serror_need_skip = true;
 
-void do_error(struct pt_regs *pt_regs, unsigned int esr)
+void do_error(struct pt_regs *pt_regs)
 {
 	/*
 	 * If stack is still in ROM reserved OCRAM not switch to SPL,
@@ -1318,7 +1318,7 @@ void do_error(struct pt_regs *pt_regs, unsigned int esr)
 	}
 
 	efi_restore_gd();
-	printf("\"Error\" handler, esr 0x%08x\n", esr);
+	printf("\"Error\" handler, esr 0x%08lx\n", pt_regs->esr);
 	show_regs(pt_regs);
 	panic("Resetting CPU ...\n");
 }
-- 
2.25.1

[PATCH v2 20/28] arm64: Save spsr in pt_regs

[Sean Anderson]

This register holds "pstate" which includes (among other things) the
instruction mode the CPU was in when the exception was taken. This is
necessary to correctly interpret instructions at elr.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- New

 arch/arm/cpu/armv8/exceptions.S         | 5 ++++-
 arch/arm/include/asm/proc-armv/ptrace.h | 2 +-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S
index 001913f429..270d9df518 100644
--- a/arch/arm/cpu/armv8/exceptions.S
+++ b/arch/arm/cpu/armv8/exceptions.S
@@ -77,15 +77,18 @@ _save_el_regs:
 	switch_el x11, 3f, 2f, 1f
 3:	mrs	x1, esr_el3
 	mrs	x2, elr_el3
+	mrs	x3, spsr_el3
 	b	0f
 2:	mrs	x1, esr_el2
 	mrs	x2, elr_el2
+	mrs	x3, spsr_el3
 	b	0f
 1:	mrs	x1, esr_el1
 	mrs	x2, elr_el1
+	mrs	x3, spsr_el3
 0:
 	stp	x1, x0, [sp, #-16]!
-	stp	xzr, x2, [sp, #-16]!
+	stp	x3, x2, [sp, #-16]!
 	mov	x0, sp
 	ret
 
diff --git a/arch/arm/include/asm/proc-armv/ptrace.h b/arch/arm/include/asm/proc-armv/ptrace.h
index bebcaf6e33..3b8fe7aac0 100644
--- a/arch/arm/include/asm/proc-armv/ptrace.h
+++ b/arch/arm/include/asm/proc-armv/ptrace.h
@@ -21,7 +21,7 @@
  * on the stack during an exception.
  */
 struct pt_regs {
-	unsigned long unused;
+	unsigned long spsr;
 	unsigned long elr;
 	unsigned long esr;
 	unsigned long regs[31];
-- 
2.25.1

Re: [PATCH v2 20/28] arm64: Save spsr in pt_regs

[Sean Anderson]

On 3/10/22 3:50 PM, Sean Anderson wrote:
> This register holds "pstate" which includes (among other things) the
> instruction mode the CPU was in when the exception was taken. This is
> necessary to correctly interpret instructions at elr.
> 
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
> 
> Changes in v2:
> - New
> 
>  arch/arm/cpu/armv8/exceptions.S         | 5 ++++-
>  arch/arm/include/asm/proc-armv/ptrace.h | 2 +-
>  2 files changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S
> index 001913f429..270d9df518 100644
> --- a/arch/arm/cpu/armv8/exceptions.S
> +++ b/arch/arm/cpu/armv8/exceptions.S
> @@ -77,15 +77,18 @@ _save_el_regs:
>  	switch_el x11, 3f, 2f, 1f
>  3:	mrs	x1, esr_el3
>  	mrs	x2, elr_el3
> +	mrs	x3, spsr_el3
>  	b	0f
>  2:	mrs	x1, esr_el2
>  	mrs	x2, elr_el2
> +	mrs	x3, spsr_el3
>  	b	0f
>  1:	mrs	x1, esr_el1
>  	mrs	x2, elr_el1
> +	mrs	x3, spsr_el3

s/el3/el1/ (and the same thing for el2)

Will be fixed in v3

--Sean

>  0:
>  	stp	x1, x0, [sp, #-16]!
> -	stp	xzr, x2, [sp, #-16]!
> +	stp	x3, x2, [sp, #-16]!
>  	mov	x0, sp
>  	ret
>  
> diff --git a/arch/arm/include/asm/proc-armv/ptrace.h b/arch/arm/include/asm/proc-armv/ptrace.h
> index bebcaf6e33..3b8fe7aac0 100644
> --- a/arch/arm/include/asm/proc-armv/ptrace.h
> +++ b/arch/arm/include/asm/proc-armv/ptrace.h
> @@ -21,7 +21,7 @@
>   * on the stack during an exception.
>   */
>  struct pt_regs {
> -	unsigned long unused;
> +	unsigned long spsr;
>  	unsigned long elr;
>  	unsigned long esr;
>  	unsigned long regs[31];
> 

[PATCH v2 21/28] arm64: Import some ESR and SPSR defines from Linux

[Sean Anderson]

This imports some defines for esr and spsr from Linux v5.16. I have
modified the includes and fixed some indentation nits but otherwise it
is the same. There are a lot more defines than we need, but it doesn't
hurt.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- New

 arch/arm/include/asm/esr.h              | 343 ++++++++++++++++++++++++
 arch/arm/include/asm/proc-armv/ptrace.h |  73 +++++
 2 files changed, 416 insertions(+)
 create mode 100644 arch/arm/include/asm/esr.h

diff --git a/arch/arm/include/asm/esr.h b/arch/arm/include/asm/esr.h
new file mode 100644
index 0000000000..f19e4e726a
--- /dev/null
+++ b/arch/arm/include/asm/esr.h
@@ -0,0 +1,343 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2013 - ARM Ltd
+ * Author: Marc Zyngier <marc.zyngier@arm.com>
+ */
+
+#ifndef __ASM_ESR_H
+#define __ASM_ESR_H
+
+#include <asm/memory.h>
+#include <linux/const.h>
+
+#define ESR_ELx_EC_UNKNOWN	(0x00)
+#define ESR_ELx_EC_WFx		(0x01)
+/* Unallocated EC: 0x02 */
+#define ESR_ELx_EC_CP15_32	(0x03)
+#define ESR_ELx_EC_CP15_64	(0x04)
+#define ESR_ELx_EC_CP14_MR	(0x05)
+#define ESR_ELx_EC_CP14_LS	(0x06)
+#define ESR_ELx_EC_FP_ASIMD	(0x07)
+#define ESR_ELx_EC_CP10_ID	(0x08)	/* EL2 only */
+#define ESR_ELx_EC_PAC		(0x09)	/* EL2 and above */
+/* Unallocated EC: 0x0A - 0x0B */
+#define ESR_ELx_EC_CP14_64	(0x0C)
+#define ESR_ELx_EC_BTI		(0x0D)
+#define ESR_ELx_EC_ILL		(0x0E)
+/* Unallocated EC: 0x0F - 0x10 */
+#define ESR_ELx_EC_SVC32	(0x11)
+#define ESR_ELx_EC_HVC32	(0x12)	/* EL2 only */
+#define ESR_ELx_EC_SMC32	(0x13)	/* EL2 and above */
+/* Unallocated EC: 0x14 */
+#define ESR_ELx_EC_SVC64	(0x15)
+#define ESR_ELx_EC_HVC64	(0x16)	/* EL2 and above */
+#define ESR_ELx_EC_SMC64	(0x17)	/* EL2 and above */
+#define ESR_ELx_EC_SYS64	(0x18)
+#define ESR_ELx_EC_SVE		(0x19)
+#define ESR_ELx_EC_ERET		(0x1a)	/* EL2 only */
+/* Unallocated EC: 0x1B */
+#define ESR_ELx_EC_FPAC		(0x1C)	/* EL1 and above */
+/* Unallocated EC: 0x1D - 0x1E */
+#define ESR_ELx_EC_IMP_DEF	(0x1f)	/* EL3 only */
+#define ESR_ELx_EC_IABT_LOW	(0x20)
+#define ESR_ELx_EC_IABT_CUR	(0x21)
+#define ESR_ELx_EC_PC_ALIGN	(0x22)
+/* Unallocated EC: 0x23 */
+#define ESR_ELx_EC_DABT_LOW	(0x24)
+#define ESR_ELx_EC_DABT_CUR	(0x25)
+#define ESR_ELx_EC_SP_ALIGN	(0x26)
+/* Unallocated EC: 0x27 */
+#define ESR_ELx_EC_FP_EXC32	(0x28)
+/* Unallocated EC: 0x29 - 0x2B */
+#define ESR_ELx_EC_FP_EXC64	(0x2C)
+/* Unallocated EC: 0x2D - 0x2E */
+#define ESR_ELx_EC_SERROR	(0x2F)
+#define ESR_ELx_EC_BREAKPT_LOW	(0x30)
+#define ESR_ELx_EC_BREAKPT_CUR	(0x31)
+#define ESR_ELx_EC_SOFTSTP_LOW	(0x32)
+#define ESR_ELx_EC_SOFTSTP_CUR	(0x33)
+#define ESR_ELx_EC_WATCHPT_LOW	(0x34)
+#define ESR_ELx_EC_WATCHPT_CUR	(0x35)
+/* Unallocated EC: 0x36 - 0x37 */
+#define ESR_ELx_EC_BKPT32	(0x38)
+/* Unallocated EC: 0x39 */
+#define ESR_ELx_EC_VECTOR32	(0x3A)	/* EL2 only */
+/* Unallocated EC: 0x3B */
+#define ESR_ELx_EC_BRK64	(0x3C)
+/* Unallocated EC: 0x3D - 0x3F */
+#define ESR_ELx_EC_MAX		(0x3F)
+
+#define ESR_ELx_EC_SHIFT	(26)
+#define ESR_ELx_EC_WIDTH	(6)
+#define ESR_ELx_EC_MASK		(UL(0x3F) << ESR_ELx_EC_SHIFT)
+#define ESR_ELx_EC(esr)		(((esr) & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT)
+
+#define ESR_ELx_IL_SHIFT	(25)
+#define ESR_ELx_IL		(UL(1) << ESR_ELx_IL_SHIFT)
+#define ESR_ELx_ISS_MASK	(ESR_ELx_IL - 1)
+
+/* ISS field definitions shared by different classes */
+#define ESR_ELx_WNR_SHIFT	(6)
+#define ESR_ELx_WNR		(UL(1) << ESR_ELx_WNR_SHIFT)
+
+/* Asynchronous Error Type */
+#define ESR_ELx_IDS_SHIFT	(24)
+#define ESR_ELx_IDS		(UL(1) << ESR_ELx_IDS_SHIFT)
+#define ESR_ELx_AET_SHIFT	(10)
+#define ESR_ELx_AET		(UL(0x7) << ESR_ELx_AET_SHIFT)
+
+#define ESR_ELx_AET_UC		(UL(0) << ESR_ELx_AET_SHIFT)
+#define ESR_ELx_AET_UEU		(UL(1) << ESR_ELx_AET_SHIFT)
+#define ESR_ELx_AET_UEO		(UL(2) << ESR_ELx_AET_SHIFT)
+#define ESR_ELx_AET_UER		(UL(3) << ESR_ELx_AET_SHIFT)
+#define ESR_ELx_AET_CE		(UL(6) << ESR_ELx_AET_SHIFT)
+
+/* Shared ISS field definitions for Data/Instruction aborts */
+#define ESR_ELx_SET_SHIFT	(11)
+#define ESR_ELx_SET_MASK	(UL(3) << ESR_ELx_SET_SHIFT)
+#define ESR_ELx_FnV_SHIFT	(10)
+#define ESR_ELx_FnV		(UL(1) << ESR_ELx_FnV_SHIFT)
+#define ESR_ELx_EA_SHIFT	(9)
+#define ESR_ELx_EA		(UL(1) << ESR_ELx_EA_SHIFT)
+#define ESR_ELx_S1PTW_SHIFT	(7)
+#define ESR_ELx_S1PTW		(UL(1) << ESR_ELx_S1PTW_SHIFT)
+
+/* Shared ISS fault status code(IFSC/DFSC) for Data/Instruction aborts */
+#define ESR_ELx_FSC		(0x3F)
+#define ESR_ELx_FSC_TYPE	(0x3C)
+#define ESR_ELx_FSC_LEVEL	(0x03)
+#define ESR_ELx_FSC_EXTABT	(0x10)
+#define ESR_ELx_FSC_MTE		(0x11)
+#define ESR_ELx_FSC_SERROR	(0x11)
+#define ESR_ELx_FSC_ACCESS	(0x08)
+#define ESR_ELx_FSC_FAULT	(0x04)
+#define ESR_ELx_FSC_PERM	(0x0C)
+
+/* ISS field definitions for Data Aborts */
+#define ESR_ELx_ISV_SHIFT	(24)
+#define ESR_ELx_ISV		(UL(1) << ESR_ELx_ISV_SHIFT)
+#define ESR_ELx_SAS_SHIFT	(22)
+#define ESR_ELx_SAS		(UL(3) << ESR_ELx_SAS_SHIFT)
+#define ESR_ELx_SSE_SHIFT	(21)
+#define ESR_ELx_SSE		(UL(1) << ESR_ELx_SSE_SHIFT)
+#define ESR_ELx_SRT_SHIFT	(16)
+#define ESR_ELx_SRT_MASK	(UL(0x1F) << ESR_ELx_SRT_SHIFT)
+#define ESR_ELx_SF_SHIFT	(15)
+#define ESR_ELx_SF		(UL(1) << ESR_ELx_SF_SHIFT)
+#define ESR_ELx_AR_SHIFT	(14)
+#define ESR_ELx_AR		(UL(1) << ESR_ELx_AR_SHIFT)
+#define ESR_ELx_CM_SHIFT	(8)
+#define ESR_ELx_CM		(UL(1) << ESR_ELx_CM_SHIFT)
+
+/* ISS field definitions for exceptions taken in to Hyp */
+#define ESR_ELx_CV		(UL(1) << 24)
+#define ESR_ELx_COND_SHIFT	(20)
+#define ESR_ELx_COND_MASK	(UL(0xF) << ESR_ELx_COND_SHIFT)
+#define ESR_ELx_WFx_ISS_TI	(UL(1) << 0)
+#define ESR_ELx_WFx_ISS_WFI	(UL(0) << 0)
+#define ESR_ELx_WFx_ISS_WFE	(UL(1) << 0)
+#define ESR_ELx_xVC_IMM_MASK	((1UL << 16) - 1)
+
+#define DISR_EL1_IDS		(UL(1) << 24)
+/*
+ * DISR_EL1 and ESR_ELx share the bottom 13 bits, but the RES0 bits may mean
+ * different things in the future...
+ */
+#define DISR_EL1_ESR_MASK	(ESR_ELx_AET | ESR_ELx_EA | ESR_ELx_FSC)
+
+/* ESR value templates for specific events */
+#define ESR_ELx_WFx_MASK	(ESR_ELx_EC_MASK | ESR_ELx_WFx_ISS_TI)
+#define ESR_ELx_WFx_WFI_VAL	((ESR_ELx_EC_WFx << ESR_ELx_EC_SHIFT) |	\
+				 ESR_ELx_WFx_ISS_WFI)
+
+/* BRK instruction trap from AArch64 state */
+#define ESR_ELx_BRK64_ISS_COMMENT_MASK	0xffff
+
+/* ISS field definitions for System instruction traps */
+#define ESR_ELx_SYS64_ISS_RES0_SHIFT	22
+#define ESR_ELx_SYS64_ISS_RES0_MASK	(UL(0x7) << ESR_ELx_SYS64_ISS_RES0_SHIFT)
+#define ESR_ELx_SYS64_ISS_DIR_MASK	0x1
+#define ESR_ELx_SYS64_ISS_DIR_READ	0x1
+#define ESR_ELx_SYS64_ISS_DIR_WRITE	0x0
+
+#define ESR_ELx_SYS64_ISS_RT_SHIFT	5
+#define ESR_ELx_SYS64_ISS_RT_MASK	(UL(0x1f) << ESR_ELx_SYS64_ISS_RT_SHIFT)
+#define ESR_ELx_SYS64_ISS_CRM_SHIFT	1
+#define ESR_ELx_SYS64_ISS_CRM_MASK	(UL(0xf) << ESR_ELx_SYS64_ISS_CRM_SHIFT)
+#define ESR_ELx_SYS64_ISS_CRN_SHIFT	10
+#define ESR_ELx_SYS64_ISS_CRN_MASK	(UL(0xf) << ESR_ELx_SYS64_ISS_CRN_SHIFT)
+#define ESR_ELx_SYS64_ISS_OP1_SHIFT	14
+#define ESR_ELx_SYS64_ISS_OP1_MASK	(UL(0x7) << ESR_ELx_SYS64_ISS_OP1_SHIFT)
+#define ESR_ELx_SYS64_ISS_OP2_SHIFT	17
+#define ESR_ELx_SYS64_ISS_OP2_MASK	(UL(0x7) << ESR_ELx_SYS64_ISS_OP2_SHIFT)
+#define ESR_ELx_SYS64_ISS_OP0_SHIFT	20
+#define ESR_ELx_SYS64_ISS_OP0_MASK	(UL(0x3) << ESR_ELx_SYS64_ISS_OP0_SHIFT)
+#define ESR_ELx_SYS64_ISS_SYS_MASK	(ESR_ELx_SYS64_ISS_OP0_MASK | \
+					 ESR_ELx_SYS64_ISS_OP1_MASK | \
+					 ESR_ELx_SYS64_ISS_OP2_MASK | \
+					 ESR_ELx_SYS64_ISS_CRN_MASK | \
+					 ESR_ELx_SYS64_ISS_CRM_MASK)
+#define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \
+					(((op0) << ESR_ELx_SYS64_ISS_OP0_SHIFT) | \
+					 ((op1) << ESR_ELx_SYS64_ISS_OP1_SHIFT) | \
+					 ((op2) << ESR_ELx_SYS64_ISS_OP2_SHIFT) | \
+					 ((crn) << ESR_ELx_SYS64_ISS_CRN_SHIFT) | \
+					 ((crm) << ESR_ELx_SYS64_ISS_CRM_SHIFT))
+
+#define ESR_ELx_SYS64_ISS_SYS_OP_MASK	(ESR_ELx_SYS64_ISS_SYS_MASK | \
+					 ESR_ELx_SYS64_ISS_DIR_MASK)
+#define ESR_ELx_SYS64_ISS_RT(esr) \
+	(((esr) & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT)
+/*
+ * User space cache operations have the following sysreg encoding
+ * in System instructions.
+ * op0=1, op1=3, op2=1, crn=7, crm={ 5, 10, 11, 12, 13, 14 }, WRITE (L=0)
+ */
+#define ESR_ELx_SYS64_ISS_CRM_DC_CIVAC	14
+#define ESR_ELx_SYS64_ISS_CRM_DC_CVADP	13
+#define ESR_ELx_SYS64_ISS_CRM_DC_CVAP	12
+#define ESR_ELx_SYS64_ISS_CRM_DC_CVAU	11
+#define ESR_ELx_SYS64_ISS_CRM_DC_CVAC	10
+#define ESR_ELx_SYS64_ISS_CRM_IC_IVAU	5
+
+#define ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK	(ESR_ELx_SYS64_ISS_OP0_MASK | \
+						 ESR_ELx_SYS64_ISS_OP1_MASK | \
+						 ESR_ELx_SYS64_ISS_OP2_MASK | \
+						 ESR_ELx_SYS64_ISS_CRN_MASK | \
+						 ESR_ELx_SYS64_ISS_DIR_MASK)
+#define ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL \
+				(ESR_ELx_SYS64_ISS_SYS_VAL(1, 3, 1, 7, 0) | \
+				 ESR_ELx_SYS64_ISS_DIR_WRITE)
+/*
+ * User space MRS operations which are supported for emulation
+ * have the following sysreg encoding in System instructions.
+ * op0 = 3, op1= 0, crn = 0, {crm = 0, 4-7}, READ (L = 1)
+ */
+#define ESR_ELx_SYS64_ISS_SYS_MRS_OP_MASK	(ESR_ELx_SYS64_ISS_OP0_MASK | \
+						 ESR_ELx_SYS64_ISS_OP1_MASK | \
+						 ESR_ELx_SYS64_ISS_CRN_MASK | \
+						 ESR_ELx_SYS64_ISS_DIR_MASK)
+#define ESR_ELx_SYS64_ISS_SYS_MRS_OP_VAL \
+				(ESR_ELx_SYS64_ISS_SYS_VAL(3, 0, 0, 0, 0) | \
+				 ESR_ELx_SYS64_ISS_DIR_READ)
+
+#define ESR_ELx_SYS64_ISS_SYS_CTR	ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 1, 0, 0)
+#define ESR_ELx_SYS64_ISS_SYS_CTR_READ	(ESR_ELx_SYS64_ISS_SYS_CTR | \
+					 ESR_ELx_SYS64_ISS_DIR_READ)
+
+#define ESR_ELx_SYS64_ISS_SYS_CNTVCT	(ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 2, 14, 0) | \
+					 ESR_ELx_SYS64_ISS_DIR_READ)
+
+#define ESR_ELx_SYS64_ISS_SYS_CNTVCTSS	(ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 6, 14, 0) | \
+					 ESR_ELx_SYS64_ISS_DIR_READ)
+
+#define ESR_ELx_SYS64_ISS_SYS_CNTFRQ	(ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 0, 14, 0) | \
+					 ESR_ELx_SYS64_ISS_DIR_READ)
+
+#define esr_sys64_to_sysreg(e)					\
+	sys_reg((((e) & ESR_ELx_SYS64_ISS_OP0_MASK) >>		\
+		 ESR_ELx_SYS64_ISS_OP0_SHIFT),			\
+		(((e) & ESR_ELx_SYS64_ISS_OP1_MASK) >>		\
+		 ESR_ELx_SYS64_ISS_OP1_SHIFT),			\
+		(((e) & ESR_ELx_SYS64_ISS_CRN_MASK) >>		\
+		 ESR_ELx_SYS64_ISS_CRN_SHIFT),			\
+		(((e) & ESR_ELx_SYS64_ISS_CRM_MASK) >>		\
+		 ESR_ELx_SYS64_ISS_CRM_SHIFT),			\
+		(((e) & ESR_ELx_SYS64_ISS_OP2_MASK) >>		\
+		 ESR_ELx_SYS64_ISS_OP2_SHIFT))
+
+#define esr_cp15_to_sysreg(e)					\
+	sys_reg(3,						\
+		(((e) & ESR_ELx_SYS64_ISS_OP1_MASK) >>		\
+		 ESR_ELx_SYS64_ISS_OP1_SHIFT),			\
+		(((e) & ESR_ELx_SYS64_ISS_CRN_MASK) >>		\
+		 ESR_ELx_SYS64_ISS_CRN_SHIFT),			\
+		(((e) & ESR_ELx_SYS64_ISS_CRM_MASK) >>		\
+		 ESR_ELx_SYS64_ISS_CRM_SHIFT),			\
+		(((e) & ESR_ELx_SYS64_ISS_OP2_MASK) >>		\
+		 ESR_ELx_SYS64_ISS_OP2_SHIFT))
+
+/*
+ * ISS field definitions for floating-point exception traps
+ * (FP_EXC_32/FP_EXC_64).
+ *
+ * (The FPEXC_* constants are used instead for common bits.)
+ */
+
+#define ESR_ELx_FP_EXC_TFV	(UL(1) << 23)
+
+/*
+ * ISS field definitions for CP15 accesses
+ */
+#define ESR_ELx_CP15_32_ISS_DIR_MASK	0x1
+#define ESR_ELx_CP15_32_ISS_DIR_READ	0x1
+#define ESR_ELx_CP15_32_ISS_DIR_WRITE	0x0
+
+#define ESR_ELx_CP15_32_ISS_RT_SHIFT	5
+#define ESR_ELx_CP15_32_ISS_RT_MASK	(UL(0x1f) << ESR_ELx_CP15_32_ISS_RT_SHIFT)
+#define ESR_ELx_CP15_32_ISS_CRM_SHIFT	1
+#define ESR_ELx_CP15_32_ISS_CRM_MASK	(UL(0xf) << ESR_ELx_CP15_32_ISS_CRM_SHIFT)
+#define ESR_ELx_CP15_32_ISS_CRN_SHIFT	10
+#define ESR_ELx_CP15_32_ISS_CRN_MASK	(UL(0xf) << ESR_ELx_CP15_32_ISS_CRN_SHIFT)
+#define ESR_ELx_CP15_32_ISS_OP1_SHIFT	14
+#define ESR_ELx_CP15_32_ISS_OP1_MASK	(UL(0x7) << ESR_ELx_CP15_32_ISS_OP1_SHIFT)
+#define ESR_ELx_CP15_32_ISS_OP2_SHIFT	17
+#define ESR_ELx_CP15_32_ISS_OP2_MASK	(UL(0x7) << ESR_ELx_CP15_32_ISS_OP2_SHIFT)
+
+#define ESR_ELx_CP15_32_ISS_SYS_MASK	(ESR_ELx_CP15_32_ISS_OP1_MASK | \
+					 ESR_ELx_CP15_32_ISS_OP2_MASK | \
+					 ESR_ELx_CP15_32_ISS_CRN_MASK | \
+					 ESR_ELx_CP15_32_ISS_CRM_MASK | \
+					 ESR_ELx_CP15_32_ISS_DIR_MASK)
+#define ESR_ELx_CP15_32_ISS_SYS_VAL(op1, op2, crn, crm) \
+					(((op1) << ESR_ELx_CP15_32_ISS_OP1_SHIFT) | \
+					 ((op2) << ESR_ELx_CP15_32_ISS_OP2_SHIFT) | \
+					 ((crn) << ESR_ELx_CP15_32_ISS_CRN_SHIFT) | \
+					 ((crm) << ESR_ELx_CP15_32_ISS_CRM_SHIFT))
+
+#define ESR_ELx_CP15_64_ISS_DIR_MASK	0x1
+#define ESR_ELx_CP15_64_ISS_DIR_READ	0x1
+#define ESR_ELx_CP15_64_ISS_DIR_WRITE	0x0
+
+#define ESR_ELx_CP15_64_ISS_RT_SHIFT	5
+#define ESR_ELx_CP15_64_ISS_RT_MASK	(UL(0x1f) << ESR_ELx_CP15_64_ISS_RT_SHIFT)
+
+#define ESR_ELx_CP15_64_ISS_RT2_SHIFT	10
+#define ESR_ELx_CP15_64_ISS_RT2_MASK	(UL(0x1f) << ESR_ELx_CP15_64_ISS_RT2_SHIFT)
+
+#define ESR_ELx_CP15_64_ISS_OP1_SHIFT	16
+#define ESR_ELx_CP15_64_ISS_OP1_MASK	(UL(0xf) << ESR_ELx_CP15_64_ISS_OP1_SHIFT)
+#define ESR_ELx_CP15_64_ISS_CRM_SHIFT	1
+#define ESR_ELx_CP15_64_ISS_CRM_MASK	(UL(0xf) << ESR_ELx_CP15_64_ISS_CRM_SHIFT)
+
+#define ESR_ELx_CP15_64_ISS_SYS_VAL(op1, crm) \
+					(((op1) << ESR_ELx_CP15_64_ISS_OP1_SHIFT) | \
+					 ((crm) << ESR_ELx_CP15_64_ISS_CRM_SHIFT))
+
+#define ESR_ELx_CP15_64_ISS_SYS_MASK	(ESR_ELx_CP15_64_ISS_OP1_MASK |	\
+					 ESR_ELx_CP15_64_ISS_CRM_MASK | \
+					 ESR_ELx_CP15_64_ISS_DIR_MASK)
+
+#define ESR_ELx_CP15_64_ISS_SYS_CNTVCT	(ESR_ELx_CP15_64_ISS_SYS_VAL(1, 14) | \
+					 ESR_ELx_CP15_64_ISS_DIR_READ)
+
+#define ESR_ELx_CP15_64_ISS_SYS_CNTVCTSS (ESR_ELx_CP15_64_ISS_SYS_VAL(9, 14) | \
+					 ESR_ELx_CP15_64_ISS_DIR_READ)
+
+#define ESR_ELx_CP15_32_ISS_SYS_CNTFRQ	(ESR_ELx_CP15_32_ISS_SYS_VAL(0, 0, 14, 0) |\
+					 ESR_ELx_CP15_32_ISS_DIR_READ)
+
+#ifndef __ASSEMBLY__
+#include <asm/types.h>
+
+static inline bool esr_is_data_abort(u32 esr)
+{
+	const u32 ec = ESR_ELx_EC(esr);
+
+	return ec == ESR_ELx_EC_DABT_LOW || ec == ESR_ELx_EC_DABT_CUR;
+}
+
+const char *esr_get_class_string(u32 esr);
+#endif /* __ASSEMBLY */
+
+#endif /* __ASM_ESR_H */
diff --git a/arch/arm/include/asm/proc-armv/ptrace.h b/arch/arm/include/asm/proc-armv/ptrace.h
index 3b8fe7aac0..2db60d552d 100644
--- a/arch/arm/include/asm/proc-armv/ptrace.h
+++ b/arch/arm/include/asm/proc-armv/ptrace.h
@@ -14,6 +14,79 @@
 
 #define PCMASK		0
 
+/*
+ * PSR bits
+ */
+#define PSR_MODE_EL0t	0x00000000
+#define PSR_MODE_EL1t	0x00000004
+#define PSR_MODE_EL1h	0x00000005
+#define PSR_MODE_EL2t	0x00000008
+#define PSR_MODE_EL2h	0x00000009
+#define PSR_MODE_EL3t	0x0000000c
+#define PSR_MODE_EL3h	0x0000000d
+#define PSR_MODE_MASK	0x0000000f
+
+/* AArch32 CPSR bits */
+#define PSR_MODE32_BIT		0x00000010
+
+/* AArch64 SPSR bits */
+#define PSR_F_BIT	0x00000040
+#define PSR_I_BIT	0x00000080
+#define PSR_A_BIT	0x00000100
+#define PSR_D_BIT	0x00000200
+#define PSR_BTYPE_MASK	0x00000c00
+#define PSR_SSBS_BIT	0x00001000
+#define PSR_PAN_BIT	0x00400000
+#define PSR_UAO_BIT	0x00800000
+#define PSR_DIT_BIT	0x01000000
+#define PSR_TCO_BIT	0x02000000
+#define PSR_V_BIT	0x10000000
+#define PSR_C_BIT	0x20000000
+#define PSR_Z_BIT	0x40000000
+#define PSR_N_BIT	0x80000000
+
+#define PSR_BTYPE_SHIFT		10
+
+/*
+ * Groups of PSR bits
+ */
+#define PSR_f		0xff000000	/* Flags		*/
+#define PSR_s		0x00ff0000	/* Status		*/
+#define PSR_x		0x0000ff00	/* Extension		*/
+#define PSR_c		0x000000ff	/* Control		*/
+
+/* Convenience names for the values of PSTATE.BTYPE */
+#define PSR_BTYPE_NONE		(0b00 << PSR_BTYPE_SHIFT)
+#define PSR_BTYPE_JC		(0b01 << PSR_BTYPE_SHIFT)
+#define PSR_BTYPE_C		(0b10 << PSR_BTYPE_SHIFT)
+#define PSR_BTYPE_J		(0b11 << PSR_BTYPE_SHIFT)
+
+/* SPSR_ELx bits for exceptions taken from AArch32 */
+#define PSR_AA32_MODE_MASK	0x0000001f
+#define PSR_AA32_MODE_USR	0x00000010
+#define PSR_AA32_MODE_FIQ	0x00000011
+#define PSR_AA32_MODE_IRQ	0x00000012
+#define PSR_AA32_MODE_SVC	0x00000013
+#define PSR_AA32_MODE_ABT	0x00000017
+#define PSR_AA32_MODE_HYP	0x0000001a
+#define PSR_AA32_MODE_UND	0x0000001b
+#define PSR_AA32_MODE_SYS	0x0000001f
+#define PSR_AA32_T_BIT		0x00000020
+#define PSR_AA32_F_BIT		0x00000040
+#define PSR_AA32_I_BIT		0x00000080
+#define PSR_AA32_A_BIT		0x00000100
+#define PSR_AA32_E_BIT		0x00000200
+#define PSR_AA32_PAN_BIT	0x00400000
+#define PSR_AA32_SSBS_BIT	0x00800000
+#define PSR_AA32_DIT_BIT	0x01000000
+#define PSR_AA32_Q_BIT		0x08000000
+#define PSR_AA32_V_BIT		0x10000000
+#define PSR_AA32_C_BIT		0x20000000
+#define PSR_AA32_Z_BIT		0x40000000
+#define PSR_AA32_N_BIT		0x80000000
+#define PSR_AA32_IT_MASK	0x0600fc00	/* If-Then execution state mask */
+#define PSR_AA32_GE_MASK	0x000f0000
+
 #ifndef __ASSEMBLY__
 
 /*
-- 
2.25.1

[PATCH v2 22/28] arm: smh: Add option to detect semihosting

[Sean Anderson]

These functions are intended to support detecting semihosting and
falling back gracefully to alternative implementations. The test starts
by making semihosting call. SYS_ISERROR is chosen because it should not
mutate any state. If this semihosting call results in an exception
(rather than being caught by the debugger), then the exception handler
should call disable_semihosting() and resume execution after the call.

Ideally, this would just be part of semihosting by default, and not a
separate config. However, to reduce space ARM SPL doesn't include
exception vectors by default. This means we can't detect if a
semihosting call failed unless we enable them. To avoid forcing them to
be enabled, we use a separate config option. It might also be possible
to try and detect whether a debugger has enabled (by reading HDE from
DSCR), but I wasn't able to figure out a way to do this from all ELs.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- New

 arch/arm/Kconfig           | 21 +++++++++++++++++++++
 arch/arm/lib/semihosting.c | 21 +++++++++++++++++++++
 include/semihosting.h      | 30 ++++++++++++++++++++++++++++++
 3 files changed, 72 insertions(+)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 209232aac2..5e050c278f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -427,6 +427,27 @@ config SPL_SEMIHOSTING
 	  on the host system. If you don't have a debugger attached then trying
 	  to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
 
+config SEMIHOSTING_FALLBACK
+	bool "Recover gracefully when semihosting fails"
+	depends on SEMIHOSTING
+	default y
+	help
+	  Normally, if U-Boot makes a semihosting call and no debugger is
+	  attached, then it will panic due to a synchronous abort
+	  exception. This config adds an exception handler which will allow
+	  U-Boot to recover. Say 'y' if unsure.
+
+config SPL_SEMIHOSTING_FALLBACK
+	bool "Recover gracefully when semihosting fails in SPL"
+	depends on SPL_SEMIHOSTING
+	select ARMV8_SPL_EXCEPTION_VECTORS
+	default y
+	help
+	  Normally, if U-Boot makes a semihosting call and no debugger is
+	  attached, then it will panic due to a synchronous abort
+	  exception. This config adds an exception handler which will allow
+	  U-Boot to recover. Say 'y' if unsure.
+
 config SYS_THUMB_BUILD
 	bool "Build U-Boot using the Thumb instruction set"
 	depends on !ARM64
diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
index 7595dbc4a9..bf33c9decb 100644
--- a/arch/arm/lib/semihosting.c
+++ b/arch/arm/lib/semihosting.c
@@ -20,6 +20,7 @@
 #define SYSWRITE	0x05
 #define SYSREAD		0x06
 #define SYSREADC	0x07
+#define SYSISERROR	0x08
 #define SYSSEEK		0x0A
 #define SYSFLEN		0x0C
 #define SYSERRNO	0x13
@@ -41,6 +42,26 @@ static noinline long smh_trap(unsigned int sysnum, void *addr)
 	return result;
 }
 
+#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
+static bool _semihosting_enabled = true;
+static bool try_semihosting = true;
+
+bool semihosting_enabled(void)
+{
+	if (try_semihosting) {
+		smh_trap(SYSISERROR, 0);
+		try_semihosting = false;
+	}
+
+	return _semihosting_enabled;
+}
+
+void disable_semihosting(void)
+{
+	_semihosting_enabled = false;
+}
+#endif
+
 /**
  * smh_errno() - Read the host's errno
  *
diff --git a/include/semihosting.h b/include/semihosting.h
index 6f3c29786c..9816233c50 100644
--- a/include/semihosting.h
+++ b/include/semihosting.h
@@ -6,6 +6,36 @@
 #ifndef _SEMIHOSTING_H
 #define _SEMIHOSTING_H
 
+#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
+/**
+ * semihosting_enabled() - Determine whether semihosting is supported
+ *
+ * Semihosting-based drivers should call this function before making other
+ * semihosting calls.
+ *
+ * Return: %true if a debugger is attached which supports semihosting, %false
+ *         otherwise
+ */
+bool semihosting_enabled(void);
+
+/**
+ * disable_semihosting() - Cause semihosting_enabled() to return false
+ *
+ * If U-Boot ever receives an unhandled exception caused by a semihosting trap,
+ * the trap handler should call this function.
+ */
+void disable_semihosting(void);
+#else
+static inline bool semihosting_enabled(void)
+{
+	return CONFIG_IS_ENABLED(SEMIHOSTING);
+}
+
+static inline void disable_semihosting(void)
+{
+}
+#endif
+
 /**
  * enum smh_open_mode - Numeric file modes for use with smh_open()
  * MODE_READ: 'r'
-- 
2.25.1

[PATCH v2 23/28] arm: Catch non-emulated semihosting calls

[Sean Anderson]

If a debugger is not attached to U-Boot, semihosting calls will raise a
synchronous abort exception. Try to catch this and disable semihosting
so we can e.g. use another uart if one is available. In the immediate
case, we return an error, since it is not always possible to check for
semihosting beforehand (debug uart, user-initiated load command, etc.)

We handle all possible semihosting instructions, which is probably
overkill. However, we do need to keep track of what instruction set
we're using so that we don't suppress an actual error.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- New

 arch/arm/lib/interrupts_64.c | 47 ++++++++++++++++++++++++++++++++++++
 include/semihosting.h        | 11 +++++++++
 2 files changed, 58 insertions(+)

diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index 049beeca7e..2e091415a4 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -5,11 +5,13 @@
  */
 
 #include <common.h>
+#include <asm/esr.h>
 #include <asm/global_data.h>
 #include <asm/ptrace.h>
 #include <irq_func.h>
 #include <linux/compiler.h>
 #include <efi_loader.h>
+#include <semihosting.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -63,6 +65,48 @@ void show_regs(struct pt_regs *regs)
 	dump_instr(regs);
 }
 
+/*
+ * Try to "emulate" a semihosting call in the event that we don't have a
+ * debugger attached.
+ */
+static bool smh_emulate_trap(struct pt_regs *regs)
+{
+	int size;
+
+	if (ESR_ELx_EC(regs->esr) != ESR_ELx_EC_UNKNOWN)
+		return false;
+
+	if (regs->spsr & PSR_MODE32_BIT) {
+		if (regs->spsr & PSR_AA32_T_BIT) {
+			u16 *insn = (u16 *)ALIGN_DOWN(regs->elr, 2);
+
+			if (*insn != SMH_T32_SVC && *insn != SMH_T32_HLT)
+				return false;
+			size = 2;
+		} else {
+			u32 *insn = (u32 *)ALIGN_DOWN(regs->elr, 4);
+
+			if (*insn != SMH_A32_SVC && *insn != SMH_A32_HLT)
+				return false;
+			size = 4;
+		}
+	} else {
+		u32 *insn = (u32 *)ALIGN_DOWN(regs->elr, 4);
+
+		if (*insn != SMH_A64_HLT)
+			return false;
+		size = 4;
+	}
+
+	/* Avoid future semihosting calls */
+	disable_semihosting();
+
+	/* Just pretend the call failed */
+	regs->regs[0] = -1;
+	regs->elr += size;
+	return true;
+}
+
 /*
  * do_bad_sync handles the impossible case in the Synchronous Abort vector.
  */
@@ -117,6 +161,9 @@ void do_bad_error(struct pt_regs *pt_regs)
  */
 void do_sync(struct pt_regs *pt_regs)
 {
+	if (CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK) &&
+	    smh_emulate_trap(pt_regs))
+		return;
 	efi_restore_gd();
 	printf("\"Synchronous Abort\" handler, esr 0x%08lx\n", pt_regs->esr);
 	show_regs(pt_regs);
diff --git a/include/semihosting.h b/include/semihosting.h
index 9816233c50..f1f73464e4 100644
--- a/include/semihosting.h
+++ b/include/semihosting.h
@@ -6,6 +6,17 @@
 #ifndef _SEMIHOSTING_H
 #define _SEMIHOSTING_H
 
+/*
+ * These are the encoded instructions used to indicate a semihosting trap. They
+ * are named like SMH_ISA_INSN, where ISA is the instruction set (e.g.
+ * AArch64), and INSN is the mneumonic for the instruction.
+ */
+#define SMH_A64_HLT 0xD45E0000
+#define SMH_A32_SVC 0xEF123456
+#define SMH_A32_HLT 0xE10F0070
+#define SMH_T32_SVC 0xDFAB
+#define SMH_T32_HLT 0xBABC
+
 #if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
 /**
  * semihosting_enabled() - Determine whether semihosting is supported
-- 
2.25.1

[PATCH v2 24/28] serial: smh: Initialize serial only if semihosting is enabled

[Sean Anderson]

If semihosting is disabled, then the user has no debugger attached, and
will not see any messages. Don't create a serial device in this
instance, to (hopefully) fall back on another working serial device.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- New

 drivers/serial/serial_semihosting.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/serial/serial_semihosting.c b/drivers/serial/serial_semihosting.c
index b43683c6f1..706c1aabe1 100644
--- a/drivers/serial/serial_semihosting.c
+++ b/drivers/serial/serial_semihosting.c
@@ -25,9 +25,17 @@ static const struct dm_serial_ops smh_serial_ops = {
 	.getc = smh_serial_getc,
 };
 
+static int smh_serial_bind(struct udevice *dev)
+{
+	if (semihosting_enabled())
+		return 0;
+	return -ENOENT;
+}
+
 U_BOOT_DRIVER(smh_serial) = {
 	.name	= "serial_semihosting",
 	.id	= UCLASS_SERIAL,
+	.bind	= smh_serial_bind,
 	.ops	= &smh_serial_ops,
 	.flags	= DM_FLAG_PRE_RELOC,
 };
@@ -83,7 +91,8 @@ struct serial_device serial_smh_device = {
 
 void smh_serial_initialize(void)
 {
-	serial_register(&serial_smh_device);
+	if (semihosting_enabled())
+		serial_register(&serial_smh_device);
 }
 
 __weak struct serial_device *default_serial_console(void)
-- 
2.25.1

[PATCH v2 25/28] arm64: ls1046a: Support semihosting fallback

[Sean Anderson]

Use the semihosting_enabled function to determine whether or not to
enable semihosting devices. This allows for graceful fallback in the
event a debugger is not attached.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- New

 arch/arm/cpu/armv8/fsl-layerscape/spl.c | 3 ++-
 board/freescale/ls1046ardb/ls1046ardb.c | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index 1a7dde30a5..5f09ef0a4a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -12,6 +12,7 @@
 #include <image.h>
 #include <init.h>
 #include <log.h>
+#include <semihosting.h>
 #include <spl.h>
 #include <asm/cache.h>
 #include <asm/global_data.h>
@@ -27,7 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 u32 spl_boot_device(void)
 {
-	if (IS_ENABLED(CONFIG_SPL_SEMIHOSTING))
+	if (semihosting_enabled())
 		return BOOT_DEVICE_SMH;
 #ifdef CONFIG_SPL_MMC
 	return BOOT_DEVICE_MMC1;
diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c
index 9af7cf763b..f2949cf8b6 100644
--- a/board/freescale/ls1046ardb/ls1046ardb.c
+++ b/board/freescale/ls1046ardb/ls1046ardb.c
@@ -32,7 +32,8 @@ DECLARE_GLOBAL_DATA_PTR;
 struct serial_device *default_serial_console(void)
 {
 #if IS_ENABLED(CONFIG_SEMIHOSTING_SERIAL)
-	return &serial_smh_device;
+	if (semihosting_enabled())
+		return &serial_smh_device;
 #endif
 	return &eserial1_device;
 }
-- 
2.25.1

[PATCH v2 26/28] serial: dm: Add support for puts

[Sean Anderson]

Some serial drivers can be vastly more efficient when printing multiple
characters at once. Non-DM serial has had a puts option for these sorts
of drivers; implement it for DM serial as well.

Because we have to add carriage returns, we can't just pass the whole
string directly to the serial driver. Instead, we print up to the
newline, then print a carriage return, and then continue on. This is
less efficient, but it is better than printing each character
individually. It also avoids having to allocate memory just to add a few
characters.

Drivers may perform short writes (such as filling a FIFO) and return the
number of characters written in len. We loop over them in the same way
that _serial_putc loops over putc.

This results in around 148 bytes of bloat for all boards with DM_SERIAL
enabled:

vexpress_aemv8a_juno: all +148 rodata +8 text +140
   u-boot: add: 2/0, grow: 0/-2 bytes: 232/-92 (140)
	 function                                   old     new   delta
	 _serial_puts                                 -     200    +200
	 strchrnul                                    -      32     +32
	 serial_puts                                 68      24     -44
	 serial_stub_puts                            56       8     -48

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- New

 drivers/serial/serial-uclass.c | 27 +++++++++++++++++++++++++--
 include/serial.h               | 18 ++++++++++++++++++
 2 files changed, 43 insertions(+), 2 deletions(-)

diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 362cedd955..352ad986f7 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -199,8 +199,31 @@ static void _serial_putc(struct udevice *dev, char ch)
 
 static void _serial_puts(struct udevice *dev, const char *str)
 {
-	while (*str)
-		_serial_putc(dev, *str++);
+	struct dm_serial_ops *ops = serial_get_ops(dev);
+
+	if (!ops->puts) {
+		while (*str)
+			_serial_putc(dev, *str++);
+	}
+
+	do {
+		const char *newline = strchrnul(str, '\n');
+		size_t len = newline - str + !!*newline;
+
+		do {
+			int err;
+			size_t written = len;
+
+			err = ops->puts(dev, str, &written);
+			if (err && err != -EAGAIN)
+				return;
+			str += written;
+			len -= written;
+		} while (len);
+
+		if (*newline)
+			_serial_putc(dev, '\r');
+	} while (*str);
 }
 
 static int __serial_getc(struct udevice *dev)
diff --git a/include/serial.h b/include/serial.h
index 2681d26c82..ea96d904d8 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -195,6 +195,24 @@ struct dm_serial_ops {
 	 * @return 0 if OK, -ve on error
 	 */
 	int (*putc)(struct udevice *dev, const char ch);
+	/**
+	 * puts() - Write a string
+	 *
+	 * This writes a string. This function should be implemented only if
+	 * writing multiple characters at once is more performant than just
+	 * calling putc() in a loop.
+	 *
+	 * If the whole string cannot be written at once, then @len should be
+	 * set to the number of characters written, and this function should
+	 * return -EAGAIN.
+	 *
+	 * @dev: Device pointer
+	 * @s: The string to write
+	 * @len: The length of the string to write. This should be set to the
+	 *       number of characters actually written on return.
+	 * @return 0 if OK, -ve on error
+	 */
+	int (*puts)(struct udevice *dev, const char *s, size_t *len);
 	/**
 	 * pending() - Check if input/output characters are waiting
 	 *
-- 
2.25.1

Re: [PATCH v2 26/28] serial: dm: Add support for puts

[Sean Anderson]

On 3/10/22 3:50 PM, Sean Anderson wrote:
> Some serial drivers can be vastly more efficient when printing multiple
> characters at once. Non-DM serial has had a puts option for these sorts
> of drivers; implement it for DM serial as well.
> 
> Because we have to add carriage returns, we can't just pass the whole
> string directly to the serial driver. Instead, we print up to the
> newline, then print a carriage return, and then continue on. This is
> less efficient, but it is better than printing each character
> individually. It also avoids having to allocate memory just to add a few
> characters.
> 
> Drivers may perform short writes (such as filling a FIFO) and return the
> number of characters written in len. We loop over them in the same way
> that _serial_putc loops over putc.
> 
> This results in around 148 bytes of bloat for all boards with DM_SERIAL
> enabled:
> 
> vexpress_aemv8a_juno: all +148 rodata +8 text +140
>    u-boot: add: 2/0, grow: 0/-2 bytes: 232/-92 (140)
> 	 function                                   old     new   delta
> 	 _serial_puts                                 -     200    +200
> 	 strchrnul                                    -      32     +32
> 	 serial_puts                                 68      24     -44
> 	 serial_stub_puts                            56       8     -48
> 
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
> 
> Changes in v2:
> - New
> 
>  drivers/serial/serial-uclass.c | 27 +++++++++++++++++++++++++--
>  include/serial.h               | 18 ++++++++++++++++++
>  2 files changed, 43 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
> index 362cedd955..352ad986f7 100644
> --- a/drivers/serial/serial-uclass.c
> +++ b/drivers/serial/serial-uclass.c
> @@ -199,8 +199,31 @@ static void _serial_putc(struct udevice *dev, char ch)
>  
>  static void _serial_puts(struct udevice *dev, const char *str)
>  {
> -	while (*str)
> -		_serial_putc(dev, *str++);
> +	struct dm_serial_ops *ops = serial_get_ops(dev);
> +
> +	if (!ops->puts) {
> +		while (*str)
> +			_serial_putc(dev, *str++);

This is missing an early return. Will be fixed in v3.

--Sean

> +	}
> +
> +	do {
> +		const char *newline = strchrnul(str, '\n');
> +		size_t len = newline - str + !!*newline;
> +
> +		do {
> +			int err;
> +			size_t written = len;
> +
> +			err = ops->puts(dev, str, &written);
> +			if (err && err != -EAGAIN)
> +				return;
> +			str += written;
> +			len -= written;
> +		} while (len);
> +
> +		if (*newline)
> +			_serial_putc(dev, '\r');
> +	} while (*str);
>  }
>  
>  static int __serial_getc(struct udevice *dev)
> diff --git a/include/serial.h b/include/serial.h
> index 2681d26c82..ea96d904d8 100644
> --- a/include/serial.h
> +++ b/include/serial.h
> @@ -195,6 +195,24 @@ struct dm_serial_ops {
>  	 * @return 0 if OK, -ve on error
>  	 */
>  	int (*putc)(struct udevice *dev, const char ch);
> +	/**
> +	 * puts() - Write a string
> +	 *
> +	 * This writes a string. This function should be implemented only if
> +	 * writing multiple characters at once is more performant than just
> +	 * calling putc() in a loop.
> +	 *
> +	 * If the whole string cannot be written at once, then @len should be
> +	 * set to the number of characters written, and this function should
> +	 * return -EAGAIN.
> +	 *
> +	 * @dev: Device pointer
> +	 * @s: The string to write
> +	 * @len: The length of the string to write. This should be set to the
> +	 *       number of characters actually written on return.
> +	 * @return 0 if OK, -ve on error
> +	 */
> +	int (*puts)(struct udevice *dev, const char *s, size_t *len);
>  	/**
>  	 * pending() - Check if input/output characters are waiting
>  	 *
> 

Re: [PATCH v2 26/28] serial: dm: Add support for puts

[Simon Glass]

Hi Sean,

On Thu, 10 Mar 2022 at 13:51, Sean Anderson <sean.anderson@seco.com> wrote:
>
> Some serial drivers can be vastly more efficient when printing multiple
> characters at once. Non-DM serial has had a puts option for these sorts
> of drivers; implement it for DM serial as well.
>
> Because we have to add carriage returns, we can't just pass the whole
> string directly to the serial driver. Instead, we print up to the
> newline, then print a carriage return, and then continue on. This is
> less efficient, but it is better than printing each character
> individually. It also avoids having to allocate memory just to add a few
> characters.
>
> Drivers may perform short writes (such as filling a FIFO) and return the
> number of characters written in len. We loop over them in the same way
> that _serial_putc loops over putc.
>
> This results in around 148 bytes of bloat for all boards with DM_SERIAL
> enabled:

So let's put it behind a Kconfig, particularly for SPL.

>
> vexpress_aemv8a_juno: all +148 rodata +8 text +140
>    u-boot: add: 2/0, grow: 0/-2 bytes: 232/-92 (140)
>          function                                   old     new   delta
>          _serial_puts                                 -     200    +200
>          strchrnul                                    -      32     +32
>          serial_puts                                 68      24     -44
>          serial_stub_puts                            56       8     -48
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
>
> Changes in v2:
> - New
>
>  drivers/serial/serial-uclass.c | 27 +++++++++++++++++++++++++--
>  include/serial.h               | 18 ++++++++++++++++++
>  2 files changed, 43 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
> index 362cedd955..352ad986f7 100644
> --- a/drivers/serial/serial-uclass.c
> +++ b/drivers/serial/serial-uclass.c
> @@ -199,8 +199,31 @@ static void _serial_putc(struct udevice *dev, char ch)
>
>  static void _serial_puts(struct udevice *dev, const char *str)
>  {
> -       while (*str)
> -               _serial_putc(dev, *str++);
> +       struct dm_serial_ops *ops = serial_get_ops(dev);
> +
> +       if (!ops->puts) {
> +               while (*str)
> +                       _serial_putc(dev, *str++);
> +       }
> +
> +       do {
> +               const char *newline = strchrnul(str, '\n');
> +               size_t len = newline - str + !!*newline;
> +
> +               do {
> +                       int err;
> +                       size_t written = len;
> +
> +                       err = ops->puts(dev, str, &written);
> +                       if (err && err != -EAGAIN)
> +                               return;
> +                       str += written;
> +                       len -= written;
> +               } while (len);
> +
> +               if (*newline)
> +                       _serial_putc(dev, '\r');
> +       } while (*str);
>  }
>
>  static int __serial_getc(struct udevice *dev)
> diff --git a/include/serial.h b/include/serial.h
> index 2681d26c82..ea96d904d8 100644
> --- a/include/serial.h
> +++ b/include/serial.h
> @@ -195,6 +195,24 @@ struct dm_serial_ops {
>          * @return 0 if OK, -ve on error
>          */
>         int (*putc)(struct udevice *dev, const char ch);
> +       /**
> +        * puts() - Write a string
> +        *
> +        * This writes a string. This function should be implemented only if
> +        * writing multiple characters at once is more performant than just
> +        * calling putc() in a loop.
> +        *
> +        * If the whole string cannot be written at once, then @len should be
> +        * set to the number of characters written, and this function should
> +        * return -EAGAIN.
> +        *
> +        * @dev: Device pointer
> +        * @s: The string to write
> +        * @len: The length of the string to write. This should be set to the
> +        *       number of characters actually written on return.

How about returning the number of characters written? That is more
like the posix write() function and saves an arg.

> +        * @return 0 if OK, -ve on error
> +        */
> +       int (*puts)(struct udevice *dev, const char *s, size_t *len);
>         /**
>          * pending() - Check if input/output characters are waiting
>          *
> --
> 2.25.1
>

Is it possible to add a test to test/dm/serial.c ?

Regards,
Simon

Re: [PATCH v2 26/28] serial: dm: Add support for puts

[Sean Anderson]

On 3/12/22 12:02 AM, Simon Glass wrote:
> Hi Sean,
> 
> On Thu, 10 Mar 2022 at 13:51, Sean Anderson <sean.anderson@seco.com> wrote:
>>
>> Some serial drivers can be vastly more efficient when printing multiple
>> characters at once. Non-DM serial has had a puts option for these sorts
>> of drivers; implement it for DM serial as well.
>>
>> Because we have to add carriage returns, we can't just pass the whole
>> string directly to the serial driver. Instead, we print up to the
>> newline, then print a carriage return, and then continue on. This is
>> less efficient, but it is better than printing each character
>> individually. It also avoids having to allocate memory just to add a few
>> characters.
>>
>> Drivers may perform short writes (such as filling a FIFO) and return the
>> number of characters written in len. We loop over them in the same way
>> that _serial_putc loops over putc.
>>
>> This results in around 148 bytes of bloat for all boards with DM_SERIAL
>> enabled:
> 
> So let's put it behind a Kconfig, particularly for SPL.

I've added a config for this for v3.

>>
>> vexpress_aemv8a_juno: all +148 rodata +8 text +140
>>     u-boot: add: 2/0, grow: 0/-2 bytes: 232/-92 (140)
>>           function                                   old     new   delta
>>           _serial_puts                                 -     200    +200
>>           strchrnul                                    -      32     +32
>>           serial_puts                                 68      24     -44
>>           serial_stub_puts                            56       8     -48
>>
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>> ---
>>
>> Changes in v2:
>> - New
>>
>>   drivers/serial/serial-uclass.c | 27 +++++++++++++++++++++++++--
>>   include/serial.h               | 18 ++++++++++++++++++
>>   2 files changed, 43 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
>> index 362cedd955..352ad986f7 100644
>> --- a/drivers/serial/serial-uclass.c
>> +++ b/drivers/serial/serial-uclass.c
>> @@ -199,8 +199,31 @@ static void _serial_putc(struct udevice *dev, char ch)
>>
>>   static void _serial_puts(struct udevice *dev, const char *str)
>>   {
>> -       while (*str)
>> -               _serial_putc(dev, *str++);
>> +       struct dm_serial_ops *ops = serial_get_ops(dev);
>> +
>> +       if (!ops->puts) {
>> +               while (*str)
>> +                       _serial_putc(dev, *str++);
>> +       }
>> +
>> +       do {
>> +               const char *newline = strchrnul(str, '\n');
>> +               size_t len = newline - str + !!*newline;
>> +
>> +               do {
>> +                       int err;
>> +                       size_t written = len;
>> +
>> +                       err = ops->puts(dev, str, &written);
>> +                       if (err && err != -EAGAIN)
>> +                               return;
>> +                       str += written;
>> +                       len -= written;
>> +               } while (len);
>> +
>> +               if (*newline)
>> +                       _serial_putc(dev, '\r');
>> +       } while (*str);
>>   }
>>
>>   static int __serial_getc(struct udevice *dev)
>> diff --git a/include/serial.h b/include/serial.h
>> index 2681d26c82..ea96d904d8 100644
>> --- a/include/serial.h
>> +++ b/include/serial.h
>> @@ -195,6 +195,24 @@ struct dm_serial_ops {
>>           * @return 0 if OK, -ve on error
>>           */
>>          int (*putc)(struct udevice *dev, const char ch);
>> +       /**
>> +        * puts() - Write a string
>> +        *
>> +        * This writes a string. This function should be implemented only if
>> +        * writing multiple characters at once is more performant than just
>> +        * calling putc() in a loop.
>> +        *
>> +        * If the whole string cannot be written at once, then @len should be
>> +        * set to the number of characters written, and this function should
>> +        * return -EAGAIN.
>> +        *
>> +        * @dev: Device pointer
>> +        * @s: The string to write
>> +        * @len: The length of the string to write. This should be set to the
>> +        *       number of characters actually written on return.
> 
> How about returning the number of characters written? That is more
> like the posix write() function and saves an arg.

OK, how about positive return is bytes written and negative error.

>> +        * @return 0 if OK, -ve on error
>> +        */
>> +       int (*puts)(struct udevice *dev, const char *s, size_t *len);
>>          /**
>>           * pending() - Check if input/output characters are waiting
>>           *
>> --
>> 2.25.1
>>
> 
> Is it possible to add a test to test/dm/serial.c ?

I can have a look, but note that there is no test for putc/getc/etc. If
putc/puts is broken, then the console output will be missing/garbled. This
also happens after console recording IIRC, so I think we would need a
second buffer in sandbox_serial...

--Sean

Re: [PATCH v2 26/28] serial: dm: Add support for puts

[Simon Glass]

Hi Sean,

On Fri, 11 Mar 2022 at 22:53, Sean Anderson <seanga2@gmail.com> wrote:
>
> On 3/12/22 12:02 AM, Simon Glass wrote:
> > Hi Sean,
> >
> > On Thu, 10 Mar 2022 at 13:51, Sean Anderson <sean.anderson@seco.com> wrote:
> >>
> >> Some serial drivers can be vastly more efficient when printing multiple
> >> characters at once. Non-DM serial has had a puts option for these sorts
> >> of drivers; implement it for DM serial as well.
> >>
> >> Because we have to add carriage returns, we can't just pass the whole
> >> string directly to the serial driver. Instead, we print up to the
> >> newline, then print a carriage return, and then continue on. This is
> >> less efficient, but it is better than printing each character
> >> individually. It also avoids having to allocate memory just to add a few
> >> characters.
> >>
> >> Drivers may perform short writes (such as filling a FIFO) and return the
> >> number of characters written in len. We loop over them in the same way
> >> that _serial_putc loops over putc.
> >>
> >> This results in around 148 bytes of bloat for all boards with DM_SERIAL
> >> enabled:
> >
> > So let's put it behind a Kconfig, particularly for SPL.
>
> I've added a config for this for v3.
>
> >>
> >> vexpress_aemv8a_juno: all +148 rodata +8 text +140
> >>     u-boot: add: 2/0, grow: 0/-2 bytes: 232/-92 (140)
> >>           function                                   old     new   delta
> >>           _serial_puts                                 -     200    +200
> >>           strchrnul                                    -      32     +32
> >>           serial_puts                                 68      24     -44
> >>           serial_stub_puts                            56       8     -48
> >>
> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> >> ---
> >>
> >> Changes in v2:
> >> - New
> >>
> >>   drivers/serial/serial-uclass.c | 27 +++++++++++++++++++++++++--
> >>   include/serial.h               | 18 ++++++++++++++++++
> >>   2 files changed, 43 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
> >> index 362cedd955..352ad986f7 100644
> >> --- a/drivers/serial/serial-uclass.c
> >> +++ b/drivers/serial/serial-uclass.c
> >> @@ -199,8 +199,31 @@ static void _serial_putc(struct udevice *dev, char ch)
> >>
> >>   static void _serial_puts(struct udevice *dev, const char *str)
> >>   {
> >> -       while (*str)
> >> -               _serial_putc(dev, *str++);
> >> +       struct dm_serial_ops *ops = serial_get_ops(dev);
> >> +
> >> +       if (!ops->puts) {
> >> +               while (*str)
> >> +                       _serial_putc(dev, *str++);
> >> +       }
> >> +
> >> +       do {
> >> +               const char *newline = strchrnul(str, '\n');
> >> +               size_t len = newline - str + !!*newline;
> >> +
> >> +               do {
> >> +                       int err;
> >> +                       size_t written = len;
> >> +
> >> +                       err = ops->puts(dev, str, &written);
> >> +                       if (err && err != -EAGAIN)
> >> +                               return;
> >> +                       str += written;
> >> +                       len -= written;
> >> +               } while (len);
> >> +
> >> +               if (*newline)
> >> +                       _serial_putc(dev, '\r');
> >> +       } while (*str);
> >>   }
> >>
> >>   static int __serial_getc(struct udevice *dev)
> >> diff --git a/include/serial.h b/include/serial.h
> >> index 2681d26c82..ea96d904d8 100644
> >> --- a/include/serial.h
> >> +++ b/include/serial.h
> >> @@ -195,6 +195,24 @@ struct dm_serial_ops {
> >>           * @return 0 if OK, -ve on error
> >>           */
> >>          int (*putc)(struct udevice *dev, const char ch);
> >> +       /**
> >> +        * puts() - Write a string
> >> +        *
> >> +        * This writes a string. This function should be implemented only if
> >> +        * writing multiple characters at once is more performant than just
> >> +        * calling putc() in a loop.
> >> +        *
> >> +        * If the whole string cannot be written at once, then @len should be
> >> +        * set to the number of characters written, and this function should
> >> +        * return -EAGAIN.
> >> +        *
> >> +        * @dev: Device pointer
> >> +        * @s: The string to write
> >> +        * @len: The length of the string to write. This should be set to the
> >> +        *       number of characters actually written on return.
> >
> > How about returning the number of characters written? That is more
> > like the posix write() function and saves an arg.
>
> OK, how about positive return is bytes written and negative error.

SGTM

>
> >> +        * @return 0 if OK, -ve on error
> >> +        */
> >> +       int (*puts)(struct udevice *dev, const char *s, size_t *len);
> >>          /**
> >>           * pending() - Check if input/output characters are waiting
> >>           *
> >> --
> >> 2.25.1
> >>
> >
> > Is it possible to add a test to test/dm/serial.c ?
>
> I can have a look, but note that there is no test for putc/getc/etc. If
> putc/puts is broken, then the console output will be missing/garbled. This
> also happens after console recording IIRC, so I think we would need a
> second buffer in sandbox_serial...

Yes that's true. We do have console recording now, but that is at a
higher level. There is a membuff in the sandbox serial driver which I
suspect could be used here, but it would need some tweaking. Perhaps
to keep it simple the sandbox driver could just keep a count of the
number of characters output, that a test could check?

Regards,
Simon

[PATCH v2 27/28] serial: sandbox: Implement puts

[Sean Anderson]

This implements puts for sandbox. It is fairly straightforward, except
that we break out the shared color printing functionality into its own
function.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- New

 drivers/serial/sandbox.c | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c
index 0b1756f5c0..9843e4a70d 100644
--- a/drivers/serial/sandbox.c
+++ b/drivers/serial/sandbox.c
@@ -67,7 +67,7 @@ static int sandbox_serial_remove(struct udevice *dev)
 	return 0;
 }
 
-static int sandbox_serial_putc(struct udevice *dev, const char ch)
+static void sandbox_print_color(struct udevice *dev)
 {
 	struct sandbox_serial_priv *priv = dev_get_priv(dev);
 	struct sandbox_serial_plat *plat = dev_get_plat(dev);
@@ -78,7 +78,13 @@ static int sandbox_serial_putc(struct udevice *dev, const char ch)
 		priv->start_of_line = false;
 		output_ansi_colour(plat->colour);
 	}
+}
 
+static int sandbox_serial_putc(struct udevice *dev, const char ch)
+{
+	struct sandbox_serial_priv *priv = dev_get_priv(dev);
+
+	sandbox_print_color(dev);
 	os_write(1, &ch, 1);
 	if (ch == '\n')
 		priv->start_of_line = true;
@@ -86,6 +92,18 @@ static int sandbox_serial_putc(struct udevice *dev, const char ch)
 	return 0;
 }
 
+static int sandbox_serial_puts(struct udevice *dev, const char *s, size_t *len)
+{
+	struct sandbox_serial_priv *priv = dev_get_priv(dev);
+
+	sandbox_print_color(dev);
+	os_write(1, s, *len);
+	if (s[*len - 1] == '\n')
+		priv->start_of_line = true;
+
+	return 0;
+}
+
 static int sandbox_serial_pending(struct udevice *dev, bool input)
 {
 	struct sandbox_serial_priv *priv = dev_get_priv(dev);
@@ -212,6 +230,7 @@ static int sandbox_serial_of_to_plat(struct udevice *dev)
 
 static const struct dm_serial_ops sandbox_serial_ops = {
 	.putc = sandbox_serial_putc,
+	.puts = sandbox_serial_puts,
 	.pending = sandbox_serial_pending,
 	.getc = sandbox_serial_getc,
 	.getconfig = sandbox_serial_getconfig,
-- 
2.25.1

[PATCH v2 28/28] serial: smh: Implement puts for DM

[Sean Anderson]

This adds an implementation of puts for DM. The implementation is not as
clean as for the non-DM puts because we have to handle non-nul-terminated
string. We also handle short writes (though these are probably very
unusual).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v2:
- New

 drivers/serial/serial_semihosting.c | 51 +++++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/drivers/serial/serial_semihosting.c b/drivers/serial/serial_semihosting.c
index 706c1aabe1..049dca5428 100644
--- a/drivers/serial/serial_semihosting.c
+++ b/drivers/serial/serial_semihosting.c
@@ -5,9 +5,18 @@
 
 #include <common.h>
 #include <dm.h>
+#include <malloc.h>
 #include <serial.h>
 #include <semihosting.h>
 
+/**
+ * struct smh_serial_priv - Semihosting serial private data
+ * @outfd: stdout file descriptor (or error)
+ */
+struct smh_serial_priv {
+	int outfd;
+};
+
 #if CONFIG_IS_ENABLED(DM_SERIAL)
 static int smh_serial_getc(struct udevice *dev)
 {
@@ -20,8 +29,40 @@ static int smh_serial_putc(struct udevice *dev, const char ch)
 	return 0;
 }
 
+static int smh_serial_puts(struct udevice *dev, const char *s, size_t *len)
+{
+	int ret;
+	struct smh_serial_priv *priv = dev_get_priv(dev);
+	unsigned long written;
+
+	if (priv->outfd < 0) {
+		char *buf;
+
+		/* Try and avoid a copy if we can */
+		if (!s[*len + 1]) {
+			smh_puts(s);
+			return 0;
+		}
+
+		buf = strndup(s, *len);
+		smh_puts(buf);
+		free(buf);
+		return 0;
+	}
+
+	ret = smh_write(priv->outfd, s, *len, &written);
+	*len = written;
+	if (ret)
+		return ret;
+
+	if (written != *len)
+		return -EAGAIN;
+	return 0;
+}
+
 static const struct dm_serial_ops smh_serial_ops = {
 	.putc = smh_serial_putc,
+	.puts = smh_serial_puts,
 	.getc = smh_serial_getc,
 };
 
@@ -32,10 +73,20 @@ static int smh_serial_bind(struct udevice *dev)
 	return -ENOENT;
 }
 
+static int smh_serial_probe(struct udevice *dev)
+{
+	struct smh_serial_priv *priv = dev_get_priv(dev);
+
+	priv->outfd = smh_open(":tt", MODE_WRITE);
+	return 0;
+}
+
 U_BOOT_DRIVER(smh_serial) = {
 	.name	= "serial_semihosting",
 	.id	= UCLASS_SERIAL,
 	.bind	= smh_serial_bind,
+	.probe	= smh_serial_probe,
+	.priv_auto = sizeof(struct smh_serial_priv),
 	.ops	= &smh_serial_ops,
 	.flags	= DM_FLAG_PRE_RELOC,
 };
-- 
2.25.1

Re: [PATCH v2 00/28] arm: semihosting: Cleanups and new features

[Andre Przywara]

On Thu, 10 Mar 2022 15:50:30 -0500
Sean Anderson <sean.anderson@seco.com> wrote:

Hi Sean,

many thanks for doing this, I like that clean up.

> This cleans up the semihosting code and adds the following new features:
> 
> - hostfs support (like sandbox)
> - support for being used as a SPL boot device
> - serial device support
> - falling back to normal drivers if semihosting is disabled
> 
> The main device affected by these changes is vexpress64, so I'd appreciate
> if Andre (or anyone else) could try booting.

So I did this. Apart from the missing return in 26/28, as you figured
yourself, the bootcmd_smh definition is missing the (dummy) device number,
so it should read:
	"if load hostfs 0 ${boot_addr_r} ${boot_name}; then" ....

With that (and the other three occasions) fixed the automatic boot worked
on the v8A model. The device number seems to be missing from some
documentation patches as well.

Also: I couldn't get the semihosting serial to work, it didn't show up in
coninfo, so I couldn't switch with "setenv stdout". I enabled
SEMIHOSTING_FALLBACK and SEMIHOSTING_SERIAL, I am surely missing something?

And btw.: QEMU supports semihosting, and I have used that in the past to
easily load files from my host into U-Boot:

$ make qemu_arm_defconfig
$ /src/linux/scripts/config --enable CONFIG_SEMIHOSTING
$ make
$ qemu-system-arm -M virt -cpu cortex-a15 -m 256M -semihosting -bios
  u-boot.bin -nographic			OR
$ qemu-system-aarch64 -M virt -cpu cortex-a57 -m 256M -semihosting -bios
  u-boot.bin -nographic

did the trick for me.
Please note that QEMU does not seem to implement ISERROR:
=======
qemu: Unsupported SemiHosting SWI 0x08
=======
Might be relatively easy to fix there, haven't checked, but can you use
something else for the detection?

I am in the process of going through the patches more thoroughly, and will
reply next week.

Thanks,
Andre

> These changes are motivated by bringup for ls1046a. When forcing JTAG
> boot, this device disables most communication peripherals, including
> serial and ethernet devices. This appears to be fixed in later
> generation devices, but we are stuck with it for now. Semihosting
> provides an easy way to run a few console commands.
> 
> The patches in this series are organized as follows:
> 
> 0-4: rST conversions and other documentation updates
> 5-9: Semihosting cleanups
> 10-14: Filesystem support (including SPL boot device)
> 15-16: Serial support
> 16: Documentation update
> 17: JTAG boot support for LS1046A
> 19-25: Semihosting fallback
> 26-28: DM puts support
> 
> The last two groups of patches are "bonus;" the first 17 patches stand
> on their own. The last two groups could be broken out as separate
> series, but I have kept them in this one to help with my sanity (and not
> have to deal with too many outstanding series).
> 
> This series depends on [1]. Patch 17 depends on [2].
> 
> [1] https://lore.kernel.org/u-boot/CACRpkdZ+9fmNjC_mvrbPa9-iuTQVd8UkJ7Zpe7cL0c5vZygsVw@mail.gmail.com/T/
> [2] https://lore.kernel.org/u-boot/20220222183840.1355337-2-sean.anderson@seco.com/
> 
> Changes in v2:
> - Document debug uart
> - Make CONFIG_SPL_SEMIHOSTING depend on SPL
> - Compile arch/arm/lib/semihosting.o in SPL
> - Rebase on Andre's series
> - Fix typos in commit message
> - Fix baud numbers being off by 10
> - Rename non-DM driver struct to match format of other drivers
> - Add migration instructions for smhload
> - Add semihosting fallback implementation
> - Add implementation of puts for DM
> 
> Sean Anderson (28):
>   doc: Convert semihosting readme to rST
>   nxp: ls1046ardb: Convert README to rST
>   doc: ls1046ardb: Expand boot mode section
>   doc: ls1046ardb: Document debug uart
>   arm: smh: Add semihosting entry to MAINTAINERS
>   arm: smh: Export semihosting functions
>   arm: smh: Use numeric modes for smh_open
>   arm: smh: Return errno on error
>   arm: smh: Document functions in header
>   arm: smh: Add some file manipulation commands
>   spl: Add semihosting boot method
>   fs: Add semihosting filesystem
>   cmd: fdt: Use start/size for chosen instead of start/end
>   arm: smh: Remove smhload command
>   arm: smh: Add some functions for working with the host console
>   serial: Add semihosting driver
>   doc: smh: Update semihosting documentation
>   ls1046ardb: Add support for JTAG boot
>   arm64: Save esr in pt_regs
>   arm64: Save spsr in pt_regs
>   arm64: Import some ESR and SPSR defines from Linux
>   arm: smh: Add option to detect semihosting
>   arm: Catch non-emulated semihosting calls
>   serial: smh: Initialize serial only if semihosting is enabled
>   arm64: ls1046a: Support semihosting fallback
>   serial: dm: Add support for puts
>   serial: sandbox: Implement puts
>   serial: smh: Implement puts for DM
> 
>  MAINTAINERS                             |   5 +
>  arch/arm/Kconfig                        |  47 +++-
>  arch/arm/cpu/armv8/exceptions.S         |   9 +-
>  arch/arm/cpu/armv8/fsl-layerscape/spl.c |   3 +
>  arch/arm/include/asm/esr.h              | 343 ++++++++++++++++++++++++
>  arch/arm/include/asm/proc-armv/ptrace.h |  75 ++++++
>  arch/arm/include/asm/spl.h              |   1 +
>  arch/arm/include/asm/u-boot-arm.h       |   7 +-
>  arch/arm/lib/Makefile                   |   2 +-
>  arch/arm/lib/interrupts_64.c            |  80 ++++--
>  arch/arm/lib/semihosting.c              | 230 ++++++++--------
>  arch/arm/mach-imx/imx8m/soc.c           |   4 +-
>  board/freescale/ls1046ardb/MAINTAINERS  |   1 +
>  board/freescale/ls1046ardb/README       |  76 ------
>  board/freescale/ls1046ardb/ls1046ardb.c |  11 +
>  cmd/fdt.c                               |   6 +-
>  common/spl/Makefile                     |   1 +
>  common/spl/spl_semihosting.c            |  71 +++++
>  disk/part.c                             |   4 +-
>  doc/README.semihosting                  |  38 ---
>  doc/board/nxp/index.rst                 |   1 +
>  doc/board/nxp/ls1046ardb.rst            | 191 +++++++++++++
>  doc/usage/index.rst                     |   1 +
>  doc/usage/semihosting.rst               |  73 +++++
>  drivers/serial/Kconfig                  |  22 ++
>  drivers/serial/Makefile                 |   1 +
>  drivers/serial/sandbox.c                |  21 +-
>  drivers/serial/serial-uclass.c          |  27 +-
>  drivers/serial/serial.c                 |   2 +
>  drivers/serial/serial_semihosting.c     | 168 ++++++++++++
>  fs/Makefile                             |   1 +
>  fs/fs.c                                 |  20 ++
>  fs/semihostingfs.c                      | 115 ++++++++
>  include/configs/ls1046ardb.h            |   2 +
>  include/configs/vexpress_aemv8.h        |  10 +-
>  include/fs.h                            |   1 +
>  include/semihosting.h                   | 149 ++++++++++
>  include/semihostingfs.h                 |  21 ++
>  include/serial.h                        |  19 ++
>  39 files changed, 1581 insertions(+), 278 deletions(-)
>  create mode 100644 arch/arm/include/asm/esr.h
>  delete mode 100644 board/freescale/ls1046ardb/README
>  create mode 100644 common/spl/spl_semihosting.c
>  delete mode 100644 doc/README.semihosting
>  create mode 100644 doc/board/nxp/ls1046ardb.rst
>  create mode 100644 doc/usage/semihosting.rst
>  create mode 100644 drivers/serial/serial_semihosting.c
>  create mode 100644 fs/semihostingfs.c
>  create mode 100644 include/semihosting.h
>  create mode 100644 include/semihostingfs.h
> 

Re: [PATCH v2 00/28] arm: semihosting: Cleanups and new features

[Sean Anderson]

Hi Andre,

On 3/11/22 1:22 PM, Andre Przywara wrote:
> On Thu, 10 Mar 2022 15:50:30 -0500
> Sean Anderson <sean.anderson@seco.com> wrote:
> 
> Hi Sean,
> 
> many thanks for doing this, I like that clean up.
> 
>> This cleans up the semihosting code and adds the following new features:
>> 
>> - hostfs support (like sandbox)
>> - support for being used as a SPL boot device
>> - serial device support
>> - falling back to normal drivers if semihosting is disabled
>> 
>> The main device affected by these changes is vexpress64, so I'd appreciate
>> if Andre (or anyone else) could try booting.
> 
> So I did this. Apart from the missing return in 26/28, as you figured
> yourself, the bootcmd_smh definition is missing the (dummy) device number,
> so it should read:
> 	"if load hostfs 0 ${boot_addr_r} ${boot_name}; then" ....
> 
> With that (and the other three occasions) fixed the automatic boot worked
> on the v8A model. The device number seems to be missing from some
> documentation patches as well.

Ah, looks like I forgot about this parameter. Will update.

> Also: I couldn't get the semihosting serial to work, it didn't show up in
> coninfo, so I couldn't switch with "setenv stdout". I enabled
> SEMIHOSTING_FALLBACK and SEMIHOSTING_SERIAL, I am surely missing something?

The problem is that U-Boot only probes /chosen/stdout-path by default.
You can change this by enabling CONFIG_SERIAL_PROBE_ALL. Then, U-Boot
will use CONFIG_CONS_INDEX, which defaults to 1 (aka seq 0). Since we
use U_BOOT_DRVINFO to create the semihosting serial, it will tend to be
before any other serials, so we will be seq 0 (and get selected).

However, it doesn't seem like SYS_READC works in QEMU for whatever
reason. You can apply the below patch to use open/read instead:

---
diff --git a/drivers/serial/serial_semihosting.c b/drivers/serial/serial_semihosting.c
index 049dca5428..b182f5ab93 100644
--- a/drivers/serial/serial_semihosting.c
+++ b/drivers/serial/serial_semihosting.c
@@ -14,13 +14,18 @@
  * @outfd: stdout file descriptor (or error)
  */
 struct smh_serial_priv {
+       int infd;
        int outfd;
 };
 
 #if CONFIG_IS_ENABLED(DM_SERIAL)
 static int smh_serial_getc(struct udevice *dev)
 {
-       return smh_getc();
+       char ch = 0;
+       struct smh_serial_priv *priv = dev_get_priv(dev);
+
+       smh_read(priv->infd, &ch, sizeof(ch));
+       return ch;
 }
 
 static int smh_serial_putc(struct udevice *dev, const char ch)
@@ -77,6 +82,7 @@ static int smh_serial_probe(struct udevice *dev)
 {
        struct smh_serial_priv *priv = dev_get_priv(dev);
 
+       priv->infd = smh_open(":tt", MODE_READ);
        priv->outfd = smh_open(":tt", MODE_WRITE);
        return 0;
 }
---

> And btw.: QEMU supports semihosting, and I have used that in the past to
> easily load files from my host into U-Boot:
> 
> $ make qemu_arm_defconfig
> $ /src/linux/scripts/config --enable CONFIG_SEMIHOSTING
> $ make
> $ qemu-system-arm -M virt -cpu cortex-a15 -m 256M -semihosting -bios
>   u-boot.bin -nographic			OR
> $ qemu-system-aarch64 -M virt -cpu cortex-a57 -m 256M -semihosting -bios
>   u-boot.bin -nographic

Thanks for suggesting the command lines. Though arm32 will not support
fallback (which should have been added to Kconfig).

> did the trick for me.
> Please note that QEMU does not seem to implement ISERROR:
> =======
> qemu: Unsupported SemiHosting SWI 0x08
> =======
> Might be relatively easy to fix there, haven't checked, but can you use
> something else for the detection?

Looks like it was added in commit 767ba049b8 ("semihosting: Implement
SYS_ISERROR"). I think SYS_ERRNO will work fine instead.

> I am in the process of going through the patches more thoroughly, and will
> reply next week.

Thanks.

--Sean

> 
> Thanks,
> Andre
> 
>> These changes are motivated by bringup for ls1046a. When forcing JTAG
>> boot, this device disables most communication peripherals, including
>> serial and ethernet devices. This appears to be fixed in later
>> generation devices, but we are stuck with it for now. Semihosting
>> provides an easy way to run a few console commands.
>> 
>> The patches in this series are organized as follows:
>> 
>> 0-4: rST conversions and other documentation updates
>> 5-9: Semihosting cleanups
>> 10-14: Filesystem support (including SPL boot device)
>> 15-16: Serial support
>> 16: Documentation update
>> 17: JTAG boot support for LS1046A
>> 19-25: Semihosting fallback
>> 26-28: DM puts support
>> 
>> The last two groups of patches are "bonus;" the first 17 patches stand
>> on their own. The last two groups could be broken out as separate
>> series, but I have kept them in this one to help with my sanity (and not
>> have to deal with too many outstanding series).
>> 
>> This series depends on [1]. Patch 17 depends on [2].
>> 
>> [1] https://lore.kernel.org/u-boot/CACRpkdZ+9fmNjC_mvrbPa9-iuTQVd8UkJ7Zpe7cL0c5vZygsVw@mail.gmail.com/T/
>> [2] https://lore.kernel.org/u-boot/20220222183840.1355337-2-sean.anderson@seco.com/
>> 
>> Changes in v2:
>> - Document debug uart
>> - Make CONFIG_SPL_SEMIHOSTING depend on SPL
>> - Compile arch/arm/lib/semihosting.o in SPL
>> - Rebase on Andre's series
>> - Fix typos in commit message
>> - Fix baud numbers being off by 10
>> - Rename non-DM driver struct to match format of other drivers
>> - Add migration instructions for smhload
>> - Add semihosting fallback implementation
>> - Add implementation of puts for DM
>> 
>> Sean Anderson (28):
>>   doc: Convert semihosting readme to rST
>>   nxp: ls1046ardb: Convert README to rST
>>   doc: ls1046ardb: Expand boot mode section
>>   doc: ls1046ardb: Document debug uart
>>   arm: smh: Add semihosting entry to MAINTAINERS
>>   arm: smh: Export semihosting functions
>>   arm: smh: Use numeric modes for smh_open
>>   arm: smh: Return errno on error
>>   arm: smh: Document functions in header
>>   arm: smh: Add some file manipulation commands
>>   spl: Add semihosting boot method
>>   fs: Add semihosting filesystem
>>   cmd: fdt: Use start/size for chosen instead of start/end
>>   arm: smh: Remove smhload command
>>   arm: smh: Add some functions for working with the host console
>>   serial: Add semihosting driver
>>   doc: smh: Update semihosting documentation
>>   ls1046ardb: Add support for JTAG boot
>>   arm64: Save esr in pt_regs
>>   arm64: Save spsr in pt_regs
>>   arm64: Import some ESR and SPSR defines from Linux
>>   arm: smh: Add option to detect semihosting
>>   arm: Catch non-emulated semihosting calls
>>   serial: smh: Initialize serial only if semihosting is enabled
>>   arm64: ls1046a: Support semihosting fallback
>>   serial: dm: Add support for puts
>>   serial: sandbox: Implement puts
>>   serial: smh: Implement puts for DM
>> 
>>  MAINTAINERS                             |   5 +
>>  arch/arm/Kconfig                        |  47 +++-
>>  arch/arm/cpu/armv8/exceptions.S         |   9 +-
>>  arch/arm/cpu/armv8/fsl-layerscape/spl.c |   3 +
>>  arch/arm/include/asm/esr.h              | 343 ++++++++++++++++++++++++
>>  arch/arm/include/asm/proc-armv/ptrace.h |  75 ++++++
>>  arch/arm/include/asm/spl.h              |   1 +
>>  arch/arm/include/asm/u-boot-arm.h       |   7 +-
>>  arch/arm/lib/Makefile                   |   2 +-
>>  arch/arm/lib/interrupts_64.c            |  80 ++++--
>>  arch/arm/lib/semihosting.c              | 230 ++++++++--------
>>  arch/arm/mach-imx/imx8m/soc.c           |   4 +-
>>  board/freescale/ls1046ardb/MAINTAINERS  |   1 +
>>  board/freescale/ls1046ardb/README       |  76 ------
>>  board/freescale/ls1046ardb/ls1046ardb.c |  11 +
>>  cmd/fdt.c                               |   6 +-
>>  common/spl/Makefile                     |   1 +
>>  common/spl/spl_semihosting.c            |  71 +++++
>>  disk/part.c                             |   4 +-
>>  doc/README.semihosting                  |  38 ---
>>  doc/board/nxp/index.rst                 |   1 +
>>  doc/board/nxp/ls1046ardb.rst            | 191 +++++++++++++
>>  doc/usage/index.rst                     |   1 +
>>  doc/usage/semihosting.rst               |  73 +++++
>>  drivers/serial/Kconfig                  |  22 ++
>>  drivers/serial/Makefile                 |   1 +
>>  drivers/serial/sandbox.c                |  21 +-
>>  drivers/serial/serial-uclass.c          |  27 +-
>>  drivers/serial/serial.c                 |   2 +
>>  drivers/serial/serial_semihosting.c     | 168 ++++++++++++
>>  fs/Makefile                             |   1 +
>>  fs/fs.c                                 |  20 ++
>>  fs/semihostingfs.c                      | 115 ++++++++
>>  include/configs/ls1046ardb.h            |   2 +
>>  include/configs/vexpress_aemv8.h        |  10 +-
>>  include/fs.h                            |   1 +
>>  include/semihosting.h                   | 149 ++++++++++
>>  include/semihostingfs.h                 |  21 ++
>>  include/serial.h                        |  19 ++
>>  39 files changed, 1581 insertions(+), 278 deletions(-)
>>  create mode 100644 arch/arm/include/asm/esr.h
>>  delete mode 100644 board/freescale/ls1046ardb/README
>>  create mode 100644 common/spl/spl_semihosting.c
>>  delete mode 100644 doc/README.semihosting
>>  create mode 100644 doc/board/nxp/ls1046ardb.rst
>>  create mode 100644 doc/usage/semihosting.rst
>>  create mode 100644 drivers/serial/serial_semihosting.c
>>  create mode 100644 fs/semihostingfs.c
>>  create mode 100644 include/semihosting.h
>>  create mode 100644 include/semihostingfs.h
>> 
>