* [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc
@ 2022-03-28 16:55 Kamil Konieczny
2022-03-28 16:55 ` [igt-dev] [PATCH i-g-t 1/2] lib/intel_batchbuffer: add create without relocs Kamil Konieczny
` (3 more replies)
0 siblings, 4 replies; 16+ messages in thread
From: Kamil Konieczny @ 2022-03-28 16:55 UTC (permalink / raw)
To: igt-dev
Add noreloc mode for GPU gens without relocations. Also
while at this, add some caching for required properties.
Change also snoop function so it will work on DG1.
v4: rebase, simplify bit17_require (Zbigniew)
v3: address Zbigniew review: correcting comment style, changed
checks in bit17_require
v2: rebased, fix caching in bit17_require, addressed Zbigniew
review comments
Cc: "Zbigniew Kempczyński" <zbigniew.kempczynski@intel.com>
Kamil Konieczny (2):
lib/intel_batchbuffer: add create without relocs
tests/i915/gem_concurrent_all: Add no-reloc capability
lib/intel_batchbuffer.c | 7 ++
lib/intel_batchbuffer.h | 1 +
tests/i915/gem_concurrent_all.c | 176 ++++++++++++++++++++++++++------
3 files changed, 153 insertions(+), 31 deletions(-)
--
2.32.0
^ permalink raw reply [flat|nested] 16+ messages in thread* [igt-dev] [PATCH i-g-t 1/2] lib/intel_batchbuffer: add create without relocs 2022-03-28 16:55 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny @ 2022-03-28 16:55 ` Kamil Konieczny 2022-03-29 8:01 ` Zbigniew Kempczyński 2022-03-28 16:55 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny ` (2 subsequent siblings) 3 siblings, 1 reply; 16+ messages in thread From: Kamil Konieczny @ 2022-03-28 16:55 UTC (permalink / raw) To: igt-dev There is create function with relocations, so add its counterpart without it. v2: change to HIGH_TO_LOW allocation (Zbigniew) Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> --- lib/intel_batchbuffer.c | 7 +++++++ lib/intel_batchbuffer.h | 1 + 2 files changed, 8 insertions(+) diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c index 2cd472d1..be6cce85 100644 --- a/lib/intel_batchbuffer.c +++ b/lib/intel_batchbuffer.c @@ -1493,6 +1493,13 @@ struct intel_bb *intel_bb_create(int i915, uint32_t size) ALLOC_STRATEGY_HIGH_TO_LOW); } +struct intel_bb *intel_bb_create_no_relocs(int i915, uint32_t size) +{ + return __intel_bb_create(i915, 0, size, false, 0, 0, + INTEL_ALLOCATOR_SIMPLE, + ALLOC_STRATEGY_HIGH_TO_LOW); +} + /** * intel_bb_create_with_context: * @i915: drm fd diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h index 75d41ea3..8cc829d9 100644 --- a/lib/intel_batchbuffer.h +++ b/lib/intel_batchbuffer.h @@ -524,6 +524,7 @@ struct intel_bb *intel_bb_create(int i915, uint32_t size); struct intel_bb * intel_bb_create_with_context(int i915, uint32_t ctx, uint32_t size); struct intel_bb *intel_bb_create_with_relocs(int i915, uint32_t size); +struct intel_bb *intel_bb_create_no_relocs(int i915, uint32_t size); struct intel_bb * intel_bb_create_with_relocs_and_context(int i915, uint32_t ctx, uint32_t size); void intel_bb_destroy(struct intel_bb *ibb); -- 2.32.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/2] lib/intel_batchbuffer: add create without relocs 2022-03-28 16:55 ` [igt-dev] [PATCH i-g-t 1/2] lib/intel_batchbuffer: add create without relocs Kamil Konieczny @ 2022-03-29 8:01 ` Zbigniew Kempczyński 0 siblings, 0 replies; 16+ messages in thread From: Zbigniew Kempczyński @ 2022-03-29 8:01 UTC (permalink / raw) To: Kamil Konieczny; +Cc: igt-dev On Mon, Mar 28, 2022 at 06:55:44PM +0200, Kamil Konieczny wrote: > There is create function with relocations, so add its > counterpart without it. > > v2: change to HIGH_TO_LOW allocation (Zbigniew) > > Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> > Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> > --- > lib/intel_batchbuffer.c | 7 +++++++ > lib/intel_batchbuffer.h | 1 + > 2 files changed, 8 insertions(+) > > diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c > index 2cd472d1..be6cce85 100644 > --- a/lib/intel_batchbuffer.c > +++ b/lib/intel_batchbuffer.c > @@ -1493,6 +1493,13 @@ struct intel_bb *intel_bb_create(int i915, uint32_t size) > ALLOC_STRATEGY_HIGH_TO_LOW); > } > > +struct intel_bb *intel_bb_create_no_relocs(int i915, uint32_t size) > +{ > + return __intel_bb_create(i915, 0, size, false, 0, 0, > + INTEL_ALLOCATOR_SIMPLE, > + ALLOC_STRATEGY_HIGH_TO_LOW); > +} > + Migrate below intel_bb_create_with_relocs(), looks better there. And add documentation, function is public. -- Zbigniew > /** > * intel_bb_create_with_context: > * @i915: drm fd > diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h > index 75d41ea3..8cc829d9 100644 > --- a/lib/intel_batchbuffer.h > +++ b/lib/intel_batchbuffer.h > @@ -524,6 +524,7 @@ struct intel_bb *intel_bb_create(int i915, uint32_t size); > struct intel_bb * > intel_bb_create_with_context(int i915, uint32_t ctx, uint32_t size); > struct intel_bb *intel_bb_create_with_relocs(int i915, uint32_t size); > +struct intel_bb *intel_bb_create_no_relocs(int i915, uint32_t size); > struct intel_bb * > intel_bb_create_with_relocs_and_context(int i915, uint32_t ctx, uint32_t size); > void intel_bb_destroy(struct intel_bb *ibb); > -- > 2.32.0 > ^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability 2022-03-28 16:55 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny 2022-03-28 16:55 ` [igt-dev] [PATCH i-g-t 1/2] lib/intel_batchbuffer: add create without relocs Kamil Konieczny @ 2022-03-28 16:55 ` Kamil Konieczny 2022-03-29 8:10 ` Zbigniew Kempczyński 2022-03-28 18:46 ` [igt-dev] ✓ Fi.CI.BAT: success for i915/gem_concurrent_all: Add no-reloc (rev4) Patchwork 2022-03-28 21:34 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork 3 siblings, 1 reply; 16+ messages in thread From: Kamil Konieczny @ 2022-03-28 16:55 UTC (permalink / raw) To: igt-dev Add noreloc mode for GPU gens without relocations. Also while at this, add some caching for required properties. Change also snoop function so it will work on DG1. Tested with ./gem_concurrent_blit --run '4KiB-tiny-gpu-*' and 256KiB with modified drm-tip to allow softpinning. v7: rebase, cleanup bit17 caching (Zbigniew comments) v6: correct comment, rewrite bit17 caching (Zbigniew) v5: rebase, fix caching in bit17_require, changes according to Zbigniew review: simplify cache of !gem_has_llc, drop multiprocess start/stop, use ALLOC_STRATEGY_HIGH_TO_LOW, correct offset and flags v4: corrected alloc_open and first ahnd setting Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> --- tests/i915/gem_concurrent_all.c | 176 ++++++++++++++++++++++++++------ 1 file changed, 145 insertions(+), 31 deletions(-) diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c index d0f9b62e..7a91434c 100644 --- a/tests/i915/gem_concurrent_all.c +++ b/tests/i915/gem_concurrent_all.c @@ -60,6 +60,7 @@ int fd, devid, gen; int vgem_drv = -1; int all; int pass; +uint64_t ahnd; struct create { const char *name; @@ -239,8 +240,16 @@ unmapped_create_bo(const struct buffers *b) static void create_snoop_require(const struct create *create, unsigned count) { + static bool check_llc = true; + static bool has_snoop; + create_cpu_require(create, count); - igt_require(!gem_has_llc(fd)); + if (check_llc) { + has_snoop = !gem_has_llc(fd); + check_llc = false; + } + + igt_require(has_snoop); } static struct intel_buf * @@ -249,7 +258,7 @@ snoop_create_bo(const struct buffers *b) struct intel_buf *buf; buf = unmapped_create_bo(b); - gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); + __gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); return buf; } @@ -572,22 +581,33 @@ gttX_create_bo(const struct buffers *b) static void bit17_require(void) { - static struct drm_i915_gem_get_tiling2 { - uint32_t handle; - uint32_t tiling_mode; - uint32_t swizzle_mode; - uint32_t phys_swizzle_mode; - } arg; + static bool has_tiling2, checked; + #define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) - if (arg.handle == 0) { + if (!checked) { + struct drm_i915_gem_get_tiling2 { + uint32_t handle; + uint32_t tiling_mode; + uint32_t swizzle_mode; + uint32_t phys_swizzle_mode; + } arg = {}; + int err; + + checked = true; arg.handle = gem_create(fd, 4096); - gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); + err = __gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); + if (!err) { + igt_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); + if (!errno && arg.phys_swizzle_mode == arg.swizzle_mode) + has_tiling2 = true; + } - do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); + errno = 0; gem_close(fd, arg.handle); } - igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); + + igt_require(has_tiling2); } static void wc_require(void) @@ -670,11 +690,21 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) struct drm_i915_gem_exec_object2 gem_exec[2]; struct drm_i915_gem_execbuffer2 execbuf; uint32_t tmp[10], *b; + uint64_t addr = 0; memset(reloc, 0, sizeof(reloc)); memset(gem_exec, 0, sizeof(gem_exec)); memset(&execbuf, 0, sizeof(execbuf)); + if (ahnd) { + addr = buf->addr.offset; + if (INVALID_ADDR(addr)) { + addr = intel_allocator_alloc(buffers->ibb->allocator_handle, + buf->handle, buf->size, 0); + buf->addr.offset = addr; + } + } + b = tmp; *b++ = XY_COLOR_BLT_CMD_NOLEN | ((gen >= 8) ? 5 : 4) | @@ -691,9 +721,9 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) reloc[0].target_handle = buf->handle; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; - *b++ = 0; + *b++ = addr; if (gen >= 8) - *b++ = 0; + *b++ = addr >> 32; *b++ = val; *b++ = MI_BATCH_BUFFER_END; if ((b - tmp) & 1) @@ -703,8 +733,19 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE; gem_exec[1].handle = gem_create(fd, 4096); - gem_exec[1].relocation_count = 1; - gem_exec[1].relocs_ptr = to_user_pointer(reloc); + if (!ahnd) { + gem_exec[1].relocation_count = 1; + gem_exec[1].relocs_ptr = to_user_pointer(reloc); + } else { + gem_exec[1].offset = CANONICAL(intel_allocator_alloc(ahnd, + gem_exec[1].handle, + 4096, 0)); + gem_exec[1].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS; + + gem_exec[0].offset = CANONICAL(buf->addr.offset); + gem_exec[0].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE | + EXEC_OBJECT_SUPPORTS_48B_ADDRESS; + } execbuf.buffers_ptr = to_user_pointer(gem_exec); execbuf.buffer_count = 2; @@ -716,6 +757,7 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) gem_execbuf(fd, &execbuf); gem_close(fd, gem_exec[1].handle); + put_offset(ahnd, gem_exec[1].handle); } static void @@ -766,6 +808,18 @@ static bool set_max_map_count(int num_buffers) return max > num_buffers; } +static uint64_t alloc_open(void) +{ + return ahnd ? intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, + ALLOC_STRATEGY_HIGH_TO_LOW, 0) : 0; +} + +static struct intel_bb *bb_create(int i915, uint32_t size) +{ + return ahnd ? intel_bb_create_no_relocs(i915, size) : + intel_bb_create_with_relocs(i915, size); +} + static void buffers_init(struct buffers *b, const char *name, const struct create *create, @@ -796,7 +850,7 @@ static void buffers_init(struct buffers *b, igt_assert(b->src); b->dst = b->src + num_buffers; - b->ibb = intel_bb_create(_fd, 4096); + b->ibb = bb_create(_fd, 4096); } static void buffers_destroy(struct buffers *b) @@ -829,6 +883,27 @@ static void buffers_destroy(struct buffers *b) } } +static void bb_destroy(struct buffers *b) +{ + if (b->ibb) { + intel_bb_destroy(b->ibb); + b->ibb = NULL; + } +} + +static void __bufs_destroy(struct buffers *b) +{ + buffers_destroy(b); + if (b->ibb) { + intel_bb_destroy(b->ibb); + b->ibb = NULL; + } + if (b->bops) { + buf_ops_destroy(b->bops); + b->bops = NULL; + } +} + static void buffers_create(struct buffers *b) { int count = b->num_buffers; @@ -838,32 +913,57 @@ static void buffers_create(struct buffers *b) igt_assert(b->count == 0); b->count = count; + ahnd = alloc_open(); for (int i = 0; i < count; i++) { b->src[i] = b->mode->create_bo(b); b->dst[i] = b->mode->create_bo(b); } b->spare = b->mode->create_bo(b); b->snoop = snoop_create_bo(b); + if (b->ibb) + intel_bb_destroy(b->ibb); + + b->ibb = bb_create(fd, 4096); } static void buffers_reset(struct buffers *b) { b->bops = buf_ops_create(fd); - b->ibb = intel_bb_create(fd, 4096); + b->ibb = bb_create(fd, 4096); +} + +static void __buffers_create(struct buffers *b) +{ + b->bops = buf_ops_create(fd); + igt_assert(b->bops); + igt_assert(b->num_buffers > 0); + igt_assert(b->mode); + igt_assert(b->mode->create_bo); + + b->count = 0; + for (int i = 0; i < b->num_buffers; i++) { + b->src[i] = b->mode->create_bo(b); + b->dst[i] = b->mode->create_bo(b); + } + b->count = b->num_buffers; + b->spare = b->mode->create_bo(b); + b->snoop = snoop_create_bo(b); + ahnd = alloc_open(); + b->ibb = bb_create(fd, 4096); } static void buffers_fini(struct buffers *b) { if (b->bops == NULL) return; - buffers_destroy(b); free(b->tmp); free(b->src); - - intel_bb_destroy(b->ibb); - buf_ops_destroy(b->bops); + if (b->ibb) + intel_bb_destroy(b->ibb); + if (b->bops) + buf_ops_destroy(b->bops); memset(b, 0, sizeof(*b)); } @@ -1306,6 +1406,8 @@ static void run_single(struct buffers *buffers, do_hang do_hang_func) { pass = 0; + bb_destroy(buffers); + buffers->ibb = bb_create(fd, 4096); do_test_func(buffers, do_copy_func, do_hang_func); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); } @@ -1316,6 +1418,8 @@ static void run_interruptible(struct buffers *buffers, do_hang do_hang_func) { pass = 0; + bb_destroy(buffers); + buffers->ibb = bb_create(fd, 4096); igt_while_interruptible(true) do_test_func(buffers, do_copy_func, do_hang_func); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); @@ -1332,10 +1436,18 @@ static void run_child(struct buffers *buffers, * leading to the child closing an object without the parent knowing. */ pass = 0; - igt_fork(child, 1) + __bufs_destroy(buffers); + + igt_fork(child, 1) { + /* recreate process local variables */ + intel_allocator_init(); + __buffers_create(buffers); do_test_func(buffers, do_copy_func, do_hang_func); + } igt_waitchildren(); + igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); + buffers_reset(buffers); } static void __run_forked(struct buffers *buffers, @@ -1346,24 +1458,20 @@ static void __run_forked(struct buffers *buffers, { /* purge the caches before cloing the process */ - buffers_destroy(buffers); - intel_bb_destroy(buffers->ibb); - buf_ops_destroy(buffers->bops); + __bufs_destroy(buffers); igt_fork(child, num_children) { int num_buffers; /* recreate process local variables */ fd = gem_reopen_driver(fd); - + intel_allocator_init(); /* detach from thread */ num_buffers = buffers->num_buffers / num_children; num_buffers += MIN_BUFFERS; if (num_buffers < buffers->num_buffers) buffers->num_buffers = num_buffers; - buffers_reset(buffers); - buffers_create(buffers); - + __buffers_create(buffers); igt_while_interruptible(interrupt) { for (pass = 0; pass < loops; pass++) do_test_func(buffers, @@ -1773,6 +1881,7 @@ igt_main { "16MiB", 2048, 2048 }, { NULL} }; + uint64_t pin_sz = 0; void *pinned = NULL; char name[80]; @@ -1792,6 +1901,12 @@ igt_main rendercopy = igt_get_render_copyfunc(devid); vgem_drv = __drm_open_driver(DRIVER_VGEM); + + ahnd = intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, + ALLOC_STRATEGY_HIGH_TO_LOW, 0); + put_ahnd(ahnd); + if (ahnd) + intel_bb_track(true); } for (const struct create *c = create; c->name; c++) { @@ -1864,7 +1979,6 @@ igt_main igt_fixture igt_stop_shrink_helper(); } - /* Use the entire mappable aperture, force swapping */ snprintf(name, sizeof(name), "%s%s-%s", c->name, s->name, "swap"); -- 2.32.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability 2022-03-28 16:55 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny @ 2022-03-29 8:10 ` Zbigniew Kempczyński 2022-03-29 12:56 ` Kamil Konieczny 0 siblings, 1 reply; 16+ messages in thread From: Zbigniew Kempczyński @ 2022-03-29 8:10 UTC (permalink / raw) To: Kamil Konieczny; +Cc: igt-dev On Mon, Mar 28, 2022 at 06:55:45PM +0200, Kamil Konieczny wrote: > Add noreloc mode for GPU gens without relocations. Also > while at this, add some caching for required properties. > Change also snoop function so it will work on DG1. > > Tested with ./gem_concurrent_blit --run '4KiB-tiny-gpu-*' > and 256KiB with modified drm-tip to allow softpinning. > > v7: rebase, cleanup bit17 caching (Zbigniew comments) > v6: correct comment, rewrite bit17 caching (Zbigniew) > v5: rebase, fix caching in bit17_require, changes according > to Zbigniew review: simplify cache of !gem_has_llc, drop > multiprocess start/stop, use ALLOC_STRATEGY_HIGH_TO_LOW, > correct offset and flags > v4: corrected alloc_open and first ahnd setting > > Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> > Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> > --- > tests/i915/gem_concurrent_all.c | 176 ++++++++++++++++++++++++++------ > 1 file changed, 145 insertions(+), 31 deletions(-) > > diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c > index d0f9b62e..7a91434c 100644 > --- a/tests/i915/gem_concurrent_all.c > +++ b/tests/i915/gem_concurrent_all.c > @@ -60,6 +60,7 @@ int fd, devid, gen; > int vgem_drv = -1; > int all; > int pass; > +uint64_t ahnd; > > struct create { > const char *name; > @@ -239,8 +240,16 @@ unmapped_create_bo(const struct buffers *b) > > static void create_snoop_require(const struct create *create, unsigned count) > { > + static bool check_llc = true; > + static bool has_snoop; > + > create_cpu_require(create, count); > - igt_require(!gem_has_llc(fd)); > + if (check_llc) { > + has_snoop = !gem_has_llc(fd); > + check_llc = false; > + } > + > + igt_require(has_snoop); > } > > static struct intel_buf * > @@ -249,7 +258,7 @@ snoop_create_bo(const struct buffers *b) > struct intel_buf *buf; > > buf = unmapped_create_bo(b); > - gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); > + __gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); > > return buf; > } > @@ -572,22 +581,33 @@ gttX_create_bo(const struct buffers *b) > > static void bit17_require(void) > { > - static struct drm_i915_gem_get_tiling2 { > - uint32_t handle; > - uint32_t tiling_mode; > - uint32_t swizzle_mode; > - uint32_t phys_swizzle_mode; > - } arg; > + static bool has_tiling2, checked; > + > #define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) > > - if (arg.handle == 0) { > + if (!checked) { > + struct drm_i915_gem_get_tiling2 { > + uint32_t handle; > + uint32_t tiling_mode; > + uint32_t swizzle_mode; > + uint32_t phys_swizzle_mode; > + } arg = {}; > + int err; > + > + checked = true; > arg.handle = gem_create(fd, 4096); > - gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); > + err = __gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); > + if (!err) { > + igt_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); > + if (!errno && arg.phys_swizzle_mode == arg.swizzle_mode) > + has_tiling2 = true; > + } > > - do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); > + errno = 0; > gem_close(fd, arg.handle); > } > - igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); > + > + igt_require(has_tiling2); > } This looks much better. > > static void wc_require(void) > @@ -670,11 +690,21 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > struct drm_i915_gem_exec_object2 gem_exec[2]; > struct drm_i915_gem_execbuffer2 execbuf; > uint32_t tmp[10], *b; > + uint64_t addr = 0; > > memset(reloc, 0, sizeof(reloc)); > memset(gem_exec, 0, sizeof(gem_exec)); > memset(&execbuf, 0, sizeof(execbuf)); > > + if (ahnd) { > + addr = buf->addr.offset; > + if (INVALID_ADDR(addr)) { > + addr = intel_allocator_alloc(buffers->ibb->allocator_handle, > + buf->handle, buf->size, 0); > + buf->addr.offset = addr; > + } > + } > + > b = tmp; > *b++ = XY_COLOR_BLT_CMD_NOLEN | > ((gen >= 8) ? 5 : 4) | > @@ -691,9 +721,9 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > reloc[0].target_handle = buf->handle; > reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; > reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; > - *b++ = 0; > + *b++ = addr; > if (gen >= 8) > - *b++ = 0; > + *b++ = addr >> 32; > *b++ = val; > *b++ = MI_BATCH_BUFFER_END; > if ((b - tmp) & 1) > @@ -703,8 +733,19 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE; > > gem_exec[1].handle = gem_create(fd, 4096); > - gem_exec[1].relocation_count = 1; > - gem_exec[1].relocs_ptr = to_user_pointer(reloc); > + if (!ahnd) { > + gem_exec[1].relocation_count = 1; > + gem_exec[1].relocs_ptr = to_user_pointer(reloc); > + } else { > + gem_exec[1].offset = CANONICAL(intel_allocator_alloc(ahnd, > + gem_exec[1].handle, > + 4096, 0)); > + gem_exec[1].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS; > + > + gem_exec[0].offset = CANONICAL(buf->addr.offset); > + gem_exec[0].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE | > + EXEC_OBJECT_SUPPORTS_48B_ADDRESS; > + } > > execbuf.buffers_ptr = to_user_pointer(gem_exec); > execbuf.buffer_count = 2; > @@ -716,6 +757,7 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > gem_execbuf(fd, &execbuf); > > gem_close(fd, gem_exec[1].handle); > + put_offset(ahnd, gem_exec[1].handle); > } > > static void > @@ -766,6 +808,18 @@ static bool set_max_map_count(int num_buffers) > return max > num_buffers; > } > > +static uint64_t alloc_open(void) > +{ > + return ahnd ? intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, > + ALLOC_STRATEGY_HIGH_TO_LOW, 0) : 0; Should be: return ahnd ? get_simple_h2l_ahnd(fd, 0) : 0; Explanation below. > +} > + > +static struct intel_bb *bb_create(int i915, uint32_t size) > +{ > + return ahnd ? intel_bb_create_no_relocs(i915, size) : > + intel_bb_create_with_relocs(i915, size); > +} > + > static void buffers_init(struct buffers *b, > const char *name, > const struct create *create, > @@ -796,7 +850,7 @@ static void buffers_init(struct buffers *b, > igt_assert(b->src); > b->dst = b->src + num_buffers; > > - b->ibb = intel_bb_create(_fd, 4096); > + b->ibb = bb_create(_fd, 4096); > } > > static void buffers_destroy(struct buffers *b) > @@ -829,6 +883,27 @@ static void buffers_destroy(struct buffers *b) > } > } > > +static void bb_destroy(struct buffers *b) > +{ > + if (b->ibb) { > + intel_bb_destroy(b->ibb); > + b->ibb = NULL; > + } > +} > + > +static void __bufs_destroy(struct buffers *b) > +{ > + buffers_destroy(b); > + if (b->ibb) { > + intel_bb_destroy(b->ibb); > + b->ibb = NULL; > + } > + if (b->bops) { > + buf_ops_destroy(b->bops); > + b->bops = NULL; > + } > +} > + > static void buffers_create(struct buffers *b) > { > int count = b->num_buffers; > @@ -838,32 +913,57 @@ static void buffers_create(struct buffers *b) > igt_assert(b->count == 0); > b->count = count; > > + ahnd = alloc_open(); > for (int i = 0; i < count; i++) { > b->src[i] = b->mode->create_bo(b); > b->dst[i] = b->mode->create_bo(b); > } > b->spare = b->mode->create_bo(b); > b->snoop = snoop_create_bo(b); > + if (b->ibb) > + intel_bb_destroy(b->ibb); > + > + b->ibb = bb_create(fd, 4096); > } > > static void buffers_reset(struct buffers *b) > { > b->bops = buf_ops_create(fd); > - b->ibb = intel_bb_create(fd, 4096); > + b->ibb = bb_create(fd, 4096); > +} > + > +static void __buffers_create(struct buffers *b) > +{ > + b->bops = buf_ops_create(fd); > + igt_assert(b->bops); > + igt_assert(b->num_buffers > 0); > + igt_assert(b->mode); > + igt_assert(b->mode->create_bo); > + > + b->count = 0; > + for (int i = 0; i < b->num_buffers; i++) { > + b->src[i] = b->mode->create_bo(b); > + b->dst[i] = b->mode->create_bo(b); > + } > + b->count = b->num_buffers; > + b->spare = b->mode->create_bo(b); > + b->snoop = snoop_create_bo(b); > + ahnd = alloc_open(); > + b->ibb = bb_create(fd, 4096); > } > > static void buffers_fini(struct buffers *b) > { > if (b->bops == NULL) > return; > - > buffers_destroy(b); > > free(b->tmp); > free(b->src); > - > - intel_bb_destroy(b->ibb); > - buf_ops_destroy(b->bops); > + if (b->ibb) > + intel_bb_destroy(b->ibb); > + if (b->bops) > + buf_ops_destroy(b->bops); > > memset(b, 0, sizeof(*b)); > } > @@ -1306,6 +1406,8 @@ static void run_single(struct buffers *buffers, > do_hang do_hang_func) > { > pass = 0; > + bb_destroy(buffers); > + buffers->ibb = bb_create(fd, 4096); > do_test_func(buffers, do_copy_func, do_hang_func); > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > } > @@ -1316,6 +1418,8 @@ static void run_interruptible(struct buffers *buffers, > do_hang do_hang_func) > { > pass = 0; > + bb_destroy(buffers); > + buffers->ibb = bb_create(fd, 4096); > igt_while_interruptible(true) > do_test_func(buffers, do_copy_func, do_hang_func); > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > @@ -1332,10 +1436,18 @@ static void run_child(struct buffers *buffers, > * leading to the child closing an object without the parent knowing. > */ > pass = 0; > - igt_fork(child, 1) > + __bufs_destroy(buffers); > + > + igt_fork(child, 1) { > + /* recreate process local variables */ > + intel_allocator_init(); > + __buffers_create(buffers); > do_test_func(buffers, do_copy_func, do_hang_func); > + } > igt_waitchildren(); > + > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > + buffers_reset(buffers); > } > > static void __run_forked(struct buffers *buffers, > @@ -1346,24 +1458,20 @@ static void __run_forked(struct buffers *buffers, > > { > /* purge the caches before cloing the process */ > - buffers_destroy(buffers); > - intel_bb_destroy(buffers->ibb); > - buf_ops_destroy(buffers->bops); > + __bufs_destroy(buffers); > > igt_fork(child, num_children) { > int num_buffers; > > /* recreate process local variables */ > fd = gem_reopen_driver(fd); > - > + intel_allocator_init(); /* detach from thread */ > num_buffers = buffers->num_buffers / num_children; > num_buffers += MIN_BUFFERS; > if (num_buffers < buffers->num_buffers) > buffers->num_buffers = num_buffers; > > - buffers_reset(buffers); > - buffers_create(buffers); > - > + __buffers_create(buffers); > igt_while_interruptible(interrupt) { > for (pass = 0; pass < loops; pass++) > do_test_func(buffers, > @@ -1773,6 +1881,7 @@ igt_main > { "16MiB", 2048, 2048 }, > { NULL} > }; > + > uint64_t pin_sz = 0; > void *pinned = NULL; > char name[80]; > @@ -1792,6 +1901,12 @@ igt_main > rendercopy = igt_get_render_copyfunc(devid); > > vgem_drv = __drm_open_driver(DRIVER_VGEM); > + > + ahnd = intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, > + ALLOC_STRATEGY_HIGH_TO_LOW, 0); You will use allocator always, even on gens < 8 where offsets could be altered by relocations. This should look: ahnd = get_simple_h2l_ahnd(fd, 0); -- Zbigniew > + put_ahnd(ahnd); > + if (ahnd) > + intel_bb_track(true); > } > > for (const struct create *c = create; c->name; c++) { > @@ -1864,7 +1979,6 @@ igt_main > igt_fixture > igt_stop_shrink_helper(); > } > - > /* Use the entire mappable aperture, force swapping */ > snprintf(name, sizeof(name), "%s%s-%s", > c->name, s->name, "swap"); > -- > 2.32.0 > ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability 2022-03-29 8:10 ` Zbigniew Kempczyński @ 2022-03-29 12:56 ` Kamil Konieczny 0 siblings, 0 replies; 16+ messages in thread From: Kamil Konieczny @ 2022-03-29 12:56 UTC (permalink / raw) To: igt-dev Hi Zbigniew, Dnia 2022-03-29 at 10:10:14 +0200, Zbigniew Kempczyński napisał(a): > On Mon, Mar 28, 2022 at 06:55:45PM +0200, Kamil Konieczny wrote: > > Add noreloc mode for GPU gens without relocations. Also > > while at this, add some caching for required properties. > > Change also snoop function so it will work on DG1. > > > > Tested with ./gem_concurrent_blit --run '4KiB-tiny-gpu-*' > > and 256KiB with modified drm-tip to allow softpinning. > > > > v7: rebase, cleanup bit17 caching (Zbigniew comments) > > v6: correct comment, rewrite bit17 caching (Zbigniew) > > v5: rebase, fix caching in bit17_require, changes according > > to Zbigniew review: simplify cache of !gem_has_llc, drop > > multiprocess start/stop, use ALLOC_STRATEGY_HIGH_TO_LOW, > > correct offset and flags > > v4: corrected alloc_open and first ahnd setting > > > > Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> > > Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> > > --- > > tests/i915/gem_concurrent_all.c | 176 ++++++++++++++++++++++++++------ > > 1 file changed, 145 insertions(+), 31 deletions(-) > > > > diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c > > index d0f9b62e..7a91434c 100644 > > --- a/tests/i915/gem_concurrent_all.c > > +++ b/tests/i915/gem_concurrent_all.c > > @@ -60,6 +60,7 @@ int fd, devid, gen; > > int vgem_drv = -1; > > int all; > > int pass; > > +uint64_t ahnd; > > > > struct create { > > const char *name; > > @@ -239,8 +240,16 @@ unmapped_create_bo(const struct buffers *b) > > > > static void create_snoop_require(const struct create *create, unsigned count) > > { > > + static bool check_llc = true; > > + static bool has_snoop; > > + > > create_cpu_require(create, count); > > - igt_require(!gem_has_llc(fd)); > > + if (check_llc) { > > + has_snoop = !gem_has_llc(fd); > > + check_llc = false; > > + } > > + > > + igt_require(has_snoop); > > } > > > > static struct intel_buf * > > @@ -249,7 +258,7 @@ snoop_create_bo(const struct buffers *b) > > struct intel_buf *buf; > > > > buf = unmapped_create_bo(b); > > - gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); > > + __gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); > > > > return buf; > > } > > @@ -572,22 +581,33 @@ gttX_create_bo(const struct buffers *b) > > > > static void bit17_require(void) > > { > > - static struct drm_i915_gem_get_tiling2 { > > - uint32_t handle; > > - uint32_t tiling_mode; > > - uint32_t swizzle_mode; > > - uint32_t phys_swizzle_mode; > > - } arg; > > + static bool has_tiling2, checked; > > + > > #define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) > > > > - if (arg.handle == 0) { > > + if (!checked) { > > + struct drm_i915_gem_get_tiling2 { > > + uint32_t handle; > > + uint32_t tiling_mode; > > + uint32_t swizzle_mode; > > + uint32_t phys_swizzle_mode; > > + } arg = {}; > > + int err; > > + > > + checked = true; > > arg.handle = gem_create(fd, 4096); > > - gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); > > + err = __gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); > > + if (!err) { > > + igt_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); > > + if (!errno && arg.phys_swizzle_mode == arg.swizzle_mode) > > + has_tiling2 = true; > > + } > > > > - do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); > > + errno = 0; > > gem_close(fd, arg.handle); > > } > > - igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); > > + > > + igt_require(has_tiling2); > > } > > This looks much better. > > > > > static void wc_require(void) > > @@ -670,11 +690,21 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > > struct drm_i915_gem_exec_object2 gem_exec[2]; > > struct drm_i915_gem_execbuffer2 execbuf; > > uint32_t tmp[10], *b; > > + uint64_t addr = 0; > > > > memset(reloc, 0, sizeof(reloc)); > > memset(gem_exec, 0, sizeof(gem_exec)); > > memset(&execbuf, 0, sizeof(execbuf)); > > > > + if (ahnd) { > > + addr = buf->addr.offset; > > + if (INVALID_ADDR(addr)) { > > + addr = intel_allocator_alloc(buffers->ibb->allocator_handle, > > + buf->handle, buf->size, 0); > > + buf->addr.offset = addr; > > + } > > + } > > + > > b = tmp; > > *b++ = XY_COLOR_BLT_CMD_NOLEN | > > ((gen >= 8) ? 5 : 4) | > > @@ -691,9 +721,9 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > > reloc[0].target_handle = buf->handle; > > reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; > > reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; > > - *b++ = 0; > > + *b++ = addr; > > if (gen >= 8) > > - *b++ = 0; > > + *b++ = addr >> 32; > > *b++ = val; > > *b++ = MI_BATCH_BUFFER_END; > > if ((b - tmp) & 1) > > @@ -703,8 +733,19 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > > gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE; > > > > gem_exec[1].handle = gem_create(fd, 4096); > > - gem_exec[1].relocation_count = 1; > > - gem_exec[1].relocs_ptr = to_user_pointer(reloc); > > + if (!ahnd) { > > + gem_exec[1].relocation_count = 1; > > + gem_exec[1].relocs_ptr = to_user_pointer(reloc); > > + } else { > > + gem_exec[1].offset = CANONICAL(intel_allocator_alloc(ahnd, > > + gem_exec[1].handle, > > + 4096, 0)); > > + gem_exec[1].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS; > > + > > + gem_exec[0].offset = CANONICAL(buf->addr.offset); > > + gem_exec[0].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE | > > + EXEC_OBJECT_SUPPORTS_48B_ADDRESS; > > + } > > > > execbuf.buffers_ptr = to_user_pointer(gem_exec); > > execbuf.buffer_count = 2; > > @@ -716,6 +757,7 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > > gem_execbuf(fd, &execbuf); > > > > gem_close(fd, gem_exec[1].handle); > > + put_offset(ahnd, gem_exec[1].handle); > > } > > > > static void > > @@ -766,6 +808,18 @@ static bool set_max_map_count(int num_buffers) > > return max > num_buffers; > > } > > > > +static uint64_t alloc_open(void) > > +{ > > + return ahnd ? intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, > > + ALLOC_STRATEGY_HIGH_TO_LOW, 0) : 0; > > Should be: > > return ahnd ? get_simple_h2l_ahnd(fd, 0) : 0; > > Explanation below. I would like to keep it here, get_simple checks for relocs before actually doing anything and that runs execbuf. I like to avoid any syscall here, if possible. > > +} > > + > > +static struct intel_bb *bb_create(int i915, uint32_t size) > > +{ > > + return ahnd ? intel_bb_create_no_relocs(i915, size) : > > + intel_bb_create_with_relocs(i915, size); > > +} > > + > > static void buffers_init(struct buffers *b, > > const char *name, > > const struct create *create, > > @@ -796,7 +850,7 @@ static void buffers_init(struct buffers *b, > > igt_assert(b->src); > > b->dst = b->src + num_buffers; > > > > - b->ibb = intel_bb_create(_fd, 4096); > > + b->ibb = bb_create(_fd, 4096); > > } > > > > static void buffers_destroy(struct buffers *b) > > @@ -829,6 +883,27 @@ static void buffers_destroy(struct buffers *b) > > } > > } > > > > +static void bb_destroy(struct buffers *b) > > +{ > > + if (b->ibb) { > > + intel_bb_destroy(b->ibb); > > + b->ibb = NULL; > > + } > > +} > > + > > +static void __bufs_destroy(struct buffers *b) > > +{ > > + buffers_destroy(b); > > + if (b->ibb) { > > + intel_bb_destroy(b->ibb); > > + b->ibb = NULL; > > + } > > + if (b->bops) { > > + buf_ops_destroy(b->bops); > > + b->bops = NULL; > > + } > > +} > > + > > static void buffers_create(struct buffers *b) > > { > > int count = b->num_buffers; > > @@ -838,32 +913,57 @@ static void buffers_create(struct buffers *b) > > igt_assert(b->count == 0); > > b->count = count; > > > > + ahnd = alloc_open(); > > for (int i = 0; i < count; i++) { > > b->src[i] = b->mode->create_bo(b); > > b->dst[i] = b->mode->create_bo(b); > > } > > b->spare = b->mode->create_bo(b); > > b->snoop = snoop_create_bo(b); > > + if (b->ibb) > > + intel_bb_destroy(b->ibb); > > + > > + b->ibb = bb_create(fd, 4096); > > } > > > > static void buffers_reset(struct buffers *b) > > { > > b->bops = buf_ops_create(fd); > > - b->ibb = intel_bb_create(fd, 4096); > > + b->ibb = bb_create(fd, 4096); > > +} > > + > > +static void __buffers_create(struct buffers *b) > > +{ > > + b->bops = buf_ops_create(fd); > > + igt_assert(b->bops); > > + igt_assert(b->num_buffers > 0); > > + igt_assert(b->mode); > > + igt_assert(b->mode->create_bo); > > + > > + b->count = 0; > > + for (int i = 0; i < b->num_buffers; i++) { > > + b->src[i] = b->mode->create_bo(b); > > + b->dst[i] = b->mode->create_bo(b); > > + } > > + b->count = b->num_buffers; > > + b->spare = b->mode->create_bo(b); > > + b->snoop = snoop_create_bo(b); > > + ahnd = alloc_open(); > > + b->ibb = bb_create(fd, 4096); > > } > > > > static void buffers_fini(struct buffers *b) > > { > > if (b->bops == NULL) > > return; > > - > > buffers_destroy(b); > > > > free(b->tmp); > > free(b->src); > > - > > - intel_bb_destroy(b->ibb); > > - buf_ops_destroy(b->bops); > > + if (b->ibb) > > + intel_bb_destroy(b->ibb); > > + if (b->bops) > > + buf_ops_destroy(b->bops); > > > > memset(b, 0, sizeof(*b)); > > } > > @@ -1306,6 +1406,8 @@ static void run_single(struct buffers *buffers, > > do_hang do_hang_func) > > { > > pass = 0; > > + bb_destroy(buffers); > > + buffers->ibb = bb_create(fd, 4096); > > do_test_func(buffers, do_copy_func, do_hang_func); > > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > > } > > @@ -1316,6 +1418,8 @@ static void run_interruptible(struct buffers *buffers, > > do_hang do_hang_func) > > { > > pass = 0; > > + bb_destroy(buffers); > > + buffers->ibb = bb_create(fd, 4096); > > igt_while_interruptible(true) > > do_test_func(buffers, do_copy_func, do_hang_func); > > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > > @@ -1332,10 +1436,18 @@ static void run_child(struct buffers *buffers, > > * leading to the child closing an object without the parent knowing. > > */ > > pass = 0; > > - igt_fork(child, 1) > > + __bufs_destroy(buffers); > > + > > + igt_fork(child, 1) { > > + /* recreate process local variables */ > > + intel_allocator_init(); > > + __buffers_create(buffers); > > do_test_func(buffers, do_copy_func, do_hang_func); > > + } > > igt_waitchildren(); > > + > > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > > + buffers_reset(buffers); > > } > > > > static void __run_forked(struct buffers *buffers, > > @@ -1346,24 +1458,20 @@ static void __run_forked(struct buffers *buffers, > > > > { > > /* purge the caches before cloing the process */ > > - buffers_destroy(buffers); > > - intel_bb_destroy(buffers->ibb); > > - buf_ops_destroy(buffers->bops); > > + __bufs_destroy(buffers); > > > > igt_fork(child, num_children) { > > int num_buffers; > > > > /* recreate process local variables */ > > fd = gem_reopen_driver(fd); > > - > > + intel_allocator_init(); /* detach from thread */ > > num_buffers = buffers->num_buffers / num_children; > > num_buffers += MIN_BUFFERS; > > if (num_buffers < buffers->num_buffers) > > buffers->num_buffers = num_buffers; > > > > - buffers_reset(buffers); > > - buffers_create(buffers); > > - > > + __buffers_create(buffers); > > igt_while_interruptible(interrupt) { > > for (pass = 0; pass < loops; pass++) > > do_test_func(buffers, > > @@ -1773,6 +1881,7 @@ igt_main > > { "16MiB", 2048, 2048 }, > > { NULL} > > }; > > + > > uint64_t pin_sz = 0; > > void *pinned = NULL; > > char name[80]; > > @@ -1792,6 +1901,12 @@ igt_main > > rendercopy = igt_get_render_copyfunc(devid); > > > > vgem_drv = __drm_open_driver(DRIVER_VGEM); > > + > > + ahnd = intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, > > + ALLOC_STRATEGY_HIGH_TO_LOW, 0); > > You will use allocator always, even on gens < 8 where offsets could be > altered by relocations. This should look: > > ahnd = get_simple_h2l_ahnd(fd, 0); I agree that here it can be used once. -- Kamil > > + put_ahnd(ahnd); > > + if (ahnd) > > + intel_bb_track(true); > > } > > > > for (const struct create *c = create; c->name; c++) { > > @@ -1864,7 +1979,6 @@ igt_main > > igt_fixture > > igt_stop_shrink_helper(); > > } > > - > > /* Use the entire mappable aperture, force swapping */ > > snprintf(name, sizeof(name), "%s%s-%s", > > c->name, s->name, "swap"); > > -- > > 2.32.0 > > ^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for i915/gem_concurrent_all: Add no-reloc (rev4) 2022-03-28 16:55 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny 2022-03-28 16:55 ` [igt-dev] [PATCH i-g-t 1/2] lib/intel_batchbuffer: add create without relocs Kamil Konieczny 2022-03-28 16:55 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny @ 2022-03-28 18:46 ` Patchwork 2022-03-28 21:34 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork 3 siblings, 0 replies; 16+ messages in thread From: Patchwork @ 2022-03-28 18:46 UTC (permalink / raw) To: Kamil Konieczny; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 13725 bytes --] == Series Details == Series: i915/gem_concurrent_all: Add no-reloc (rev4) URL : https://patchwork.freedesktop.org/series/100688/ State : success == Summary == CI Bug Log - changes from CI_DRM_11413 -> IGTPW_6840 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/index.html Participating hosts (41 -> 40) ------------------------------ Additional (1): fi-pnv-d510 Missing (2): fi-bsw-cyan fi-bdw-samus Known issues ------------ Here are the changes found in IGTPW_6840 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@core_hotunplug@unbind-rebind: - fi-elk-e7500: NOTRUN -> [INCOMPLETE][1] ([i915#5441]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-elk-e7500/igt@core_hotunplug@unbind-rebind.html - fi-kbl-8809g: NOTRUN -> [INCOMPLETE][2] ([i915#1373] / [i915#5441]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-kbl-8809g/igt@core_hotunplug@unbind-rebind.html - fi-cfl-8109u: NOTRUN -> [INCOMPLETE][3] ([i915#5441]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-cfl-8109u/igt@core_hotunplug@unbind-rebind.html - fi-kbl-7567u: NOTRUN -> [INCOMPLETE][4] ([i915#1373] / [i915#5441]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-kbl-7567u/igt@core_hotunplug@unbind-rebind.html - bat-dg1-6: [PASS][5] -> [INCOMPLETE][6] ([i915#5441]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/bat-dg1-6/igt@core_hotunplug@unbind-rebind.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/bat-dg1-6/igt@core_hotunplug@unbind-rebind.html * igt@gem_huc_copy@huc-copy: - fi-pnv-d510: NOTRUN -> [SKIP][7] ([fdo#109271]) +9 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-pnv-d510/igt@gem_huc_copy@huc-copy.html * igt@gem_render_linear_blits@basic: - fi-pnv-d510: NOTRUN -> [INCOMPLETE][8] ([i915#5441]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-pnv-d510/igt@gem_render_linear_blits@basic.html * igt@gem_render_tiled_blits@basic: - fi-bsw-n3050: [PASS][9] -> [INCOMPLETE][10] ([i915#5441]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-bsw-n3050/igt@gem_render_tiled_blits@basic.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-bsw-n3050/igt@gem_render_tiled_blits@basic.html - fi-snb-2520m: NOTRUN -> [INCOMPLETE][11] ([i915#5441]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-snb-2520m/igt@gem_render_tiled_blits@basic.html - fi-bsw-nick: [PASS][12] -> [INCOMPLETE][13] ([i915#5441]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-bsw-nick/igt@gem_render_tiled_blits@basic.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-bsw-nick/igt@gem_render_tiled_blits@basic.html * igt@gem_tiled_blits@basic: - fi-skl-6700k2: NOTRUN -> [INCOMPLETE][14] ([i915#5441]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-skl-6700k2/igt@gem_tiled_blits@basic.html - fi-tgl-1115g4: [PASS][15] -> [INCOMPLETE][16] ([i915#5441]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-tgl-1115g4/igt@gem_tiled_blits@basic.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-tgl-1115g4/igt@gem_tiled_blits@basic.html * igt@kms_chamelium@dp-crc-fast: - fi-kbl-7567u: NOTRUN -> [SKIP][17] ([fdo#109271] / [fdo#111827]) +8 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-kbl-7567u/igt@kms_chamelium@dp-crc-fast.html * igt@kms_chamelium@dp-edid-read: - fi-elk-e7500: NOTRUN -> [SKIP][18] ([fdo#109271]) +26 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-elk-e7500/igt@kms_chamelium@dp-edid-read.html * igt@kms_chamelium@hdmi-edid-read: - fi-kbl-8809g: NOTRUN -> [SKIP][19] ([fdo#109271] / [fdo#111827]) +8 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-kbl-8809g/igt@kms_chamelium@hdmi-edid-read.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-cfl-8109u: NOTRUN -> [SKIP][20] ([fdo#109271] / [fdo#111827]) +8 similar issues [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-cfl-8109u/igt@kms_chamelium@hdmi-hpd-fast.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c: - fi-kbl-7567u: NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#5341]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-kbl-7567u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html - fi-kbl-8809g: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#5341]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-kbl-8809g/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html - fi-elk-e7500: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#5341]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-elk-e7500/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d: - fi-cfl-8109u: NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#533]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html - fi-kbl-8809g: NOTRUN -> [SKIP][25] ([fdo#109271] / [i915#533]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-kbl-8809g/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html - fi-kbl-7567u: NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#533]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-kbl-7567u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html * igt@kms_pipe_crc_basic@read-crc-pipe-c: - fi-kbl-7567u: NOTRUN -> [SKIP][27] ([fdo#109271]) +34 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html * igt@kms_psr@cursor_plane_move: - fi-kbl-8809g: NOTRUN -> [SKIP][28] ([fdo#109271]) +34 similar issues [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-kbl-8809g/igt@kms_psr@cursor_plane_move.html * igt@kms_psr@primary_mmap_gtt: - fi-cfl-8109u: NOTRUN -> [SKIP][29] ([fdo#109271]) +9 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-cfl-8109u/igt@kms_psr@primary_mmap_gtt.html * igt@runner@aborted: - fi-pnv-d510: NOTRUN -> [FAIL][30] ([i915#2403] / [i915#4312]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-pnv-d510/igt@runner@aborted.html #### Possible fixes #### * igt@core_hotunplug@unbind-rebind: - {fi-ehl-2}: [INCOMPLETE][31] ([i915#5441]) -> [PASS][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-ehl-2/igt@core_hotunplug@unbind-rebind.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-ehl-2/igt@core_hotunplug@unbind-rebind.html - {bat-jsl-1}: [INCOMPLETE][33] ([i915#1373] / [i915#5441]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/bat-jsl-1/igt@core_hotunplug@unbind-rebind.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/bat-jsl-1/igt@core_hotunplug@unbind-rebind.html * igt@gem_render_linear_blits@basic: - fi-snb-2520m: [INCOMPLETE][35] ([i915#5441]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-snb-2520m/igt@gem_render_linear_blits@basic.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-snb-2520m/igt@gem_render_linear_blits@basic.html * igt@gem_render_tiled_blits@basic: - fi-skl-6700k2: [INCOMPLETE][37] ([i915#5441]) -> [PASS][38] [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-skl-6700k2/igt@gem_render_tiled_blits@basic.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-skl-6700k2/igt@gem_render_tiled_blits@basic.html * igt@gem_tiled_blits@basic: - fi-elk-e7500: [INCOMPLETE][39] ([i915#5441]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-elk-e7500/igt@gem_tiled_blits@basic.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-elk-e7500/igt@gem_tiled_blits@basic.html - {fi-adl-ddr5}: [INCOMPLETE][41] ([i915#5441]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-adl-ddr5/igt@gem_tiled_blits@basic.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-adl-ddr5/igt@gem_tiled_blits@basic.html - fi-cfl-8109u: [INCOMPLETE][43] ([i915#5441]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-cfl-8109u/igt@gem_tiled_blits@basic.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-cfl-8109u/igt@gem_tiled_blits@basic.html - fi-kbl-7567u: [INCOMPLETE][45] ([i915#5441]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-kbl-7567u/igt@gem_tiled_blits@basic.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-kbl-7567u/igt@gem_tiled_blits@basic.html - fi-kbl-8809g: [INCOMPLETE][47] ([i915#5441]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-kbl-8809g/igt@gem_tiled_blits@basic.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-kbl-8809g/igt@gem_tiled_blits@basic.html * igt@i915_pm_rps@basic-api: - {fi-jsl-1}: [DMESG-WARN][49] -> [PASS][50] [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-jsl-1/igt@i915_pm_rps@basic-api.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-jsl-1/igt@i915_pm_rps@basic-api.html * igt@i915_selftest@live@workarounds: - {bat-adlp-6}: [DMESG-WARN][51] ([i915#5068]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/bat-adlp-6/igt@i915_selftest@live@workarounds.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/bat-adlp-6/igt@i915_selftest@live@workarounds.html #### Warnings #### * igt@gem_tiled_blits@basic: - fi-cfl-guc: [INCOMPLETE][53] ([i915#1982] / [i915#5441]) -> [INCOMPLETE][54] ([i915#5441]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-cfl-guc/igt@gem_tiled_blits@basic.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-cfl-guc/igt@gem_tiled_blits@basic.html * igt@runner@aborted: - fi-bsw-nick: [FAIL][55] ([i915#4312]) -> [FAIL][56] ([i915#3428] / [i915#4312]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-bsw-nick/igt@runner@aborted.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-bsw-nick/igt@runner@aborted.html - bat-dg1-6: [FAIL][57] ([i915#4312] / [i915#5257]) -> [FAIL][58] ([i915#4312]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/bat-dg1-6/igt@runner@aborted.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/bat-dg1-6/igt@runner@aborted.html - fi-bsw-n3050: [FAIL][59] ([i915#4312]) -> [FAIL][60] ([i915#3428] / [i915#4312]) [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/fi-bsw-n3050/igt@runner@aborted.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/fi-bsw-n3050/igt@runner@aborted.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155 [i915#1373]: https://gitlab.freedesktop.org/drm/intel/issues/1373 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2403]: https://gitlab.freedesktop.org/drm/intel/issues/2403 [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291 [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301 [i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4897]: https://gitlab.freedesktop.org/drm/intel/issues/4897 [i915#5068]: https://gitlab.freedesktop.org/drm/intel/issues/5068 [i915#5127]: https://gitlab.freedesktop.org/drm/intel/issues/5127 [i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257 [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 [i915#5341]: https://gitlab.freedesktop.org/drm/intel/issues/5341 [i915#5441]: https://gitlab.freedesktop.org/drm/intel/issues/5441 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_6397 -> IGTPW_6840 CI-20190529: 20190529 CI_DRM_11413: 28d9afb63e5aba224d674ea9abc5952014e900e1 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_6840: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/index.html IGT_6397: 37ec3b8ffd2c36e5a4c9d2c0d22577920212dc42 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/index.html [-- Attachment #2: Type: text/html, Size: 17556 bytes --] ^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for i915/gem_concurrent_all: Add no-reloc (rev4) 2022-03-28 16:55 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny ` (2 preceding siblings ...) 2022-03-28 18:46 ` [igt-dev] ✓ Fi.CI.BAT: success for i915/gem_concurrent_all: Add no-reloc (rev4) Patchwork @ 2022-03-28 21:34 ` Patchwork 3 siblings, 0 replies; 16+ messages in thread From: Patchwork @ 2022-03-28 21:34 UTC (permalink / raw) To: Kamil Konieczny; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 30263 bytes --] == Series Details == Series: i915/gem_concurrent_all: Add no-reloc (rev4) URL : https://patchwork.freedesktop.org/series/100688/ State : success == Summary == CI Bug Log - changes from CI_DRM_11413_full -> IGTPW_6840_full ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/index.html Participating hosts (11 -> 7) ------------------------------ Missing (4): pig-skl-6260u shard-skl pig-kbl-iris pig-glk-j5005 Known issues ------------ Here are the changes found in IGTPW_6840_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@api_intel_bb@blit-noreloc-purge-cache: - shard-apl: NOTRUN -> [INCOMPLETE][1] ([i915#5441]) +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-apl7/igt@api_intel_bb@blit-noreloc-purge-cache.html * igt@core_hotunplug@unbind-rebind: - shard-snb: NOTRUN -> [INCOMPLETE][2] ([i915#5441]) +5 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-snb2/igt@core_hotunplug@unbind-rebind.html - shard-tglb: NOTRUN -> [INCOMPLETE][3] ([i915#1373] / [i915#5441]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb5/igt@core_hotunplug@unbind-rebind.html - shard-apl: NOTRUN -> [INCOMPLETE][4] ([i915#1373] / [i915#5441]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-apl1/igt@core_hotunplug@unbind-rebind.html - shard-kbl: NOTRUN -> [INCOMPLETE][5] ([i915#1373] / [i915#5441]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl1/igt@core_hotunplug@unbind-rebind.html - shard-iclb: NOTRUN -> [INCOMPLETE][6] ([i915#1373] / [i915#5441]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb4/igt@core_hotunplug@unbind-rebind.html * igt@feature_discovery@chamelium: - shard-tglb: NOTRUN -> [SKIP][7] ([fdo#111827]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb5/igt@feature_discovery@chamelium.html * igt@gem_ccs@ctrl-surf-copy-new-ctx: - shard-iclb: NOTRUN -> [SKIP][8] ([i915#5327]) +1 similar issue [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb4/igt@gem_ccs@ctrl-surf-copy-new-ctx.html - shard-tglb: NOTRUN -> [SKIP][9] ([i915#5325]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb5/igt@gem_ccs@ctrl-surf-copy-new-ctx.html * igt@gem_create@create-massive: - shard-snb: NOTRUN -> [DMESG-WARN][10] ([i915#4991]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-snb4/igt@gem_create@create-massive.html * igt@gem_ctx_param@set-priority-not-supported: - shard-tglb: NOTRUN -> [SKIP][11] ([fdo#109314]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb1/igt@gem_ctx_param@set-priority-not-supported.html - shard-iclb: NOTRUN -> [SKIP][12] ([fdo#109314]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb8/igt@gem_ctx_param@set-priority-not-supported.html * igt@gem_ctx_persistence@legacy-engines-mixed: - shard-snb: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#1099]) +4 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-snb2/igt@gem_ctx_persistence@legacy-engines-mixed.html * igt@gem_exec_balancer@parallel-keep-in-fence: - shard-tglb: NOTRUN -> [DMESG-WARN][14] ([i915#5076]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb1/igt@gem_exec_balancer@parallel-keep-in-fence.html - shard-kbl: NOTRUN -> [DMESG-WARN][15] ([i915#5076]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl7/igt@gem_exec_balancer@parallel-keep-in-fence.html * igt@gem_exec_balancer@parallel-ordering: - shard-iclb: NOTRUN -> [SKIP][16] ([i915#4525]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb6/igt@gem_exec_balancer@parallel-ordering.html - shard-tglb: NOTRUN -> [DMESG-FAIL][17] ([i915#5076]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb1/igt@gem_exec_balancer@parallel-ordering.html - shard-kbl: NOTRUN -> [DMESG-FAIL][18] ([i915#5076]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl6/igt@gem_exec_balancer@parallel-ordering.html * igt@gem_exec_fair@basic-deadline: - shard-glk: NOTRUN -> [FAIL][19] ([i915#2846]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-glk4/igt@gem_exec_fair@basic-deadline.html - shard-apl: NOTRUN -> [FAIL][20] ([i915#2846]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-apl2/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-none-rrul@rcs0: - shard-iclb: NOTRUN -> [FAIL][21] ([i915#2842]) +12 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb8/igt@gem_exec_fair@basic-none-rrul@rcs0.html * igt@gem_exec_fair@basic-none-solo@rcs0: - shard-kbl: NOTRUN -> [FAIL][22] ([i915#2842]) +5 similar issues [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl4/igt@gem_exec_fair@basic-none-solo@rcs0.html * igt@gem_exec_fair@basic-none-vip@rcs0: - shard-tglb: NOTRUN -> [FAIL][23] ([i915#2842]) +8 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb3/igt@gem_exec_fair@basic-none-vip@rcs0.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-glk: NOTRUN -> [FAIL][24] ([i915#2842]) +3 similar issues [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-glk8/igt@gem_exec_fair@basic-pace-solo@rcs0.html * igt@gem_exec_params@no-blt: - shard-tglb: NOTRUN -> [SKIP][25] ([fdo#109283]) +1 similar issue [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb7/igt@gem_exec_params@no-blt.html - shard-iclb: NOTRUN -> [SKIP][26] ([fdo#109283]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb2/igt@gem_exec_params@no-blt.html * igt@gem_exec_params@secure-non-master: - shard-iclb: NOTRUN -> [SKIP][27] ([fdo#112283]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb7/igt@gem_exec_params@secure-non-master.html * igt@gem_exec_params@secure-non-root: - shard-tglb: NOTRUN -> [SKIP][28] ([fdo#112283]) +1 similar issue [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb2/igt@gem_exec_params@secure-non-root.html * igt@gem_huc_copy@huc-copy: - shard-tglb: [PASS][29] -> [SKIP][30] ([i915#2190]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/shard-tglb2/igt@gem_huc_copy@huc-copy.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb7/igt@gem_huc_copy@huc-copy.html - shard-apl: NOTRUN -> [SKIP][31] ([fdo#109271] / [i915#2190]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-apl4/igt@gem_huc_copy@huc-copy.html - shard-kbl: NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#2190]) [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl3/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@parallel-random-verify: - shard-glk: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#4613]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-glk4/igt@gem_lmem_swapping@parallel-random-verify.html * igt@gem_lmem_swapping@random: - shard-apl: NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#4613]) +2 similar issues [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-apl3/igt@gem_lmem_swapping@random.html * igt@gem_lmem_swapping@verify-random: - shard-tglb: NOTRUN -> [SKIP][35] ([i915#4613]) +1 similar issue [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb3/igt@gem_lmem_swapping@verify-random.html - shard-iclb: NOTRUN -> [SKIP][36] ([i915#4613]) +3 similar issues [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb3/igt@gem_lmem_swapping@verify-random.html - shard-kbl: NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#4613]) [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl6/igt@gem_lmem_swapping@verify-random.html * igt@gem_media_vme: - shard-tglb: NOTRUN -> [SKIP][38] ([i915#284]) [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb6/igt@gem_media_vme.html * igt@gem_ppgtt@blt-vs-render-ctxn: - shard-tglb: NOTRUN -> [DMESG-FAIL][39] ([i915#5441]) [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb6/igt@gem_ppgtt@blt-vs-render-ctxn.html - shard-kbl: NOTRUN -> [DMESG-FAIL][40] ([i915#5441]) [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl4/igt@gem_ppgtt@blt-vs-render-ctxn.html - shard-iclb: NOTRUN -> [DMESG-FAIL][41] ([i915#5441]) [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb3/igt@gem_ppgtt@blt-vs-render-ctxn.html - shard-snb: NOTRUN -> [DMESG-FAIL][42] ([i915#5441]) [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-snb4/igt@gem_ppgtt@blt-vs-render-ctxn.html * igt@gem_pwrite@basic-exhaustion: - shard-iclb: NOTRUN -> [WARN][43] ([i915#2658]) [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb7/igt@gem_pwrite@basic-exhaustion.html - shard-tglb: NOTRUN -> [WARN][44] ([i915#2658]) [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb5/igt@gem_pwrite@basic-exhaustion.html * igt@gem_pxp@create-regular-context-1: - shard-iclb: NOTRUN -> [SKIP][45] ([i915#4270]) +2 similar issues [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb3/igt@gem_pxp@create-regular-context-1.html * igt@gem_pxp@fail-invalid-protected-context: - shard-tglb: NOTRUN -> [SKIP][46] ([i915#4270]) +2 similar issues [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb1/igt@gem_pxp@fail-invalid-protected-context.html * igt@gem_render_copy@x-tiled-to-vebox-yf-tiled: - shard-kbl: NOTRUN -> [SKIP][47] ([fdo#109271]) +264 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl3/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html * igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled: - shard-iclb: NOTRUN -> [SKIP][48] ([i915#768]) +7 similar issues [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb6/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled.html * igt@gem_spin_batch@engines@vcs0: - shard-apl: NOTRUN -> [FAIL][49] ([i915#2898]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-apl3/igt@gem_spin_batch@engines@vcs0.html * igt@gem_tiled_partial_pwrite_pread@reads: - shard-glk: [PASS][50] -> [INCOMPLETE][51] ([i915#5441]) +1 similar issue [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/shard-glk9/igt@gem_tiled_partial_pwrite_pread@reads.html [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-glk2/igt@gem_tiled_partial_pwrite_pread@reads.html * igt@gem_tiled_partial_pwrite_pread@writes: - shard-glk: NOTRUN -> [INCOMPLETE][52] ([i915#5441]) +4 similar issues [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-glk5/igt@gem_tiled_partial_pwrite_pread@writes.html * igt@gem_userptr_blits@access-control: - shard-tglb: NOTRUN -> [SKIP][53] ([i915#3297]) +2 similar issues [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb5/igt@gem_userptr_blits@access-control.html * igt@gem_userptr_blits@dmabuf-sync: - shard-glk: NOTRUN -> [SKIP][54] ([fdo#109271] / [i915#3323]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-glk7/igt@gem_userptr_blits@dmabuf-sync.html * igt@gem_userptr_blits@dmabuf-unsync: - shard-iclb: NOTRUN -> [SKIP][55] ([i915#3297]) +3 similar issues [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb1/igt@gem_userptr_blits@dmabuf-unsync.html * igt@gen3_render_linear_blits: - shard-tglb: NOTRUN -> [SKIP][56] ([fdo#109289]) +6 similar issues [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb1/igt@gen3_render_linear_blits.html - shard-iclb: NOTRUN -> [SKIP][57] ([fdo#109289]) +3 similar issues [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb6/igt@gen3_render_linear_blits.html * igt@gen9_exec_parse@batch-zero-length: - shard-iclb: NOTRUN -> [SKIP][58] ([i915#2856]) +5 similar issues [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb3/igt@gen9_exec_parse@batch-zero-length.html * igt@gen9_exec_parse@bb-start-param: - shard-tglb: NOTRUN -> [SKIP][59] ([i915#2527] / [i915#2856]) +7 similar issues [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb2/igt@gen9_exec_parse@bb-start-param.html * igt@i915_pm_dc@dc6-dpms: - shard-iclb: [PASS][60] -> [FAIL][61] ([i915#454]) [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/shard-iclb2/igt@i915_pm_dc@dc6-dpms.html [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html - shard-kbl: NOTRUN -> [FAIL][62] ([i915#454]) [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl6/igt@i915_pm_dc@dc6-dpms.html - shard-tglb: NOTRUN -> [FAIL][63] ([i915#454]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb3/igt@i915_pm_dc@dc6-dpms.html * igt@i915_pm_lpsp@screens-disabled: - shard-iclb: NOTRUN -> [SKIP][64] ([i915#1902]) [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb7/igt@i915_pm_lpsp@screens-disabled.html * igt@i915_pm_rpm@dpms-mode-unset-non-lpsp: - shard-tglb: NOTRUN -> [SKIP][65] ([fdo#111644] / [i915#1397] / [i915#2411]) +1 similar issue [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb3/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html - shard-iclb: NOTRUN -> [SKIP][66] ([fdo#110892]) +1 similar issue [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb7/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html * igt@i915_pm_sseu@full-enable: - shard-iclb: NOTRUN -> [SKIP][67] ([i915#4387]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb1/igt@i915_pm_sseu@full-enable.html * igt@i915_query@query-topology-unsupported: - shard-iclb: NOTRUN -> [SKIP][68] ([fdo#109302]) [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb4/igt@i915_query@query-topology-unsupported.html - shard-tglb: NOTRUN -> [SKIP][69] ([fdo#109302]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb5/igt@i915_query@query-topology-unsupported.html * igt@i915_suspend@forcewake: - shard-apl: NOTRUN -> [DMESG-WARN][70] ([i915#180]) [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-apl8/igt@i915_suspend@forcewake.html * igt@kms_addfb_basic@invalid-smem-bo-on-discrete: - shard-tglb: NOTRUN -> [SKIP][71] ([i915#3826]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb3/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html - shard-iclb: NOTRUN -> [SKIP][72] ([i915#3826]) [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb3/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html * igt@kms_atomic_transition@plane-all-modeset-transition: - shard-iclb: NOTRUN -> [SKIP][73] ([i915#1769]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb2/igt@kms_atomic_transition@plane-all-modeset-transition.html - shard-tglb: NOTRUN -> [SKIP][74] ([i915#1769]) [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb7/igt@kms_atomic_transition@plane-all-modeset-transition.html * igt@kms_big_fb@4-tiled-8bpp-rotate-0: - shard-iclb: NOTRUN -> [SKIP][75] ([i915#5286]) +5 similar issues [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb4/igt@kms_big_fb@4-tiled-8bpp-rotate-0.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip: - shard-tglb: NOTRUN -> [SKIP][76] ([i915#5286]) +6 similar issues [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html * igt@kms_big_fb@linear-16bpp-rotate-180: - shard-kbl: [PASS][77] -> [INCOMPLETE][78] ([i915#5441]) +1 similar issue [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/shard-kbl3/igt@kms_big_fb@linear-16bpp-rotate-180.html [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl1/igt@kms_big_fb@linear-16bpp-rotate-180.html * igt@kms_big_fb@linear-32bpp-rotate-90: - shard-iclb: NOTRUN -> [SKIP][79] ([fdo#110725] / [fdo#111614]) +3 similar issues [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb7/igt@kms_big_fb@linear-32bpp-rotate-90.html * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180: - shard-snb: [PASS][80] -> [INCOMPLETE][81] ([i915#5441]) [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/shard-snb4/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180.html [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-snb5/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180.html * igt@kms_big_fb@x-tiled-16bpp-rotate-0: - shard-iclb: NOTRUN -> [INCOMPLETE][82] ([i915#5441]) +12 similar issues [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb4/igt@kms_big_fb@x-tiled-16bpp-rotate-0.html - shard-kbl: NOTRUN -> [INCOMPLETE][83] ([i915#5441]) +6 similar issues [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl1/igt@kms_big_fb@x-tiled-16bpp-rotate-0.html * igt@kms_big_fb@x-tiled-64bpp-rotate-180: - shard-tglb: [PASS][84] -> [INCOMPLETE][85] ([i915#2828] / [i915#5441]) [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/shard-tglb7/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb1/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html - shard-kbl: [PASS][86] -> [INCOMPLETE][87] ([i915#2828] / [i915#5441]) [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/shard-kbl6/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl4/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip: - shard-tglb: NOTRUN -> [INCOMPLETE][88] ([i915#5441]) +13 similar issues [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb5/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html * igt@kms_big_fb@y-tiled-64bpp-rotate-270: - shard-tglb: NOTRUN -> [SKIP][89] ([fdo#111614]) +2 similar issues [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb5/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip: - shard-tglb: [PASS][90] -> [INCOMPLETE][91] ([i915#5441]) [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/shard-tglb3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_big_fb@yf-tiled-16bpp-rotate-0: - shard-kbl: NOTRUN -> [INCOMPLETE][92] ([i915#1982] / [i915#5441] / [i915#794]) [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl4/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html * igt@kms_big_fb@yf-tiled-32bpp-rotate-90: - shard-iclb: [PASS][93] -> [INCOMPLETE][94] ([i915#5441]) +2 similar issues [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11413/shard-iclb7/igt@kms_big_fb@yf-tiled-32bpp-rotate-90.html [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb7/igt@kms_big_fb@yf-tiled-32bpp-rotate-90.html * igt@kms_big_fb@yf-tiled-8bpp-rotate-180: - shard-tglb: NOTRUN -> [SKIP][95] ([fdo#111615]) +10 similar issues [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb5/igt@kms_big_fb@yf-tiled-8bpp-rotate-180.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-apl: NOTRUN -> [SKIP][96] ([fdo#109271] / [i915#3777]) +7 similar issues [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-apl6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip: - shard-glk: NOTRUN -> [SKIP][97] ([fdo#109271] / [i915#3777]) +5 similar issues [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-glk7/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip: - shard-kbl: NOTRUN -> [SKIP][98] ([fdo#109271] / [i915#3777]) +1 similar issue [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0: - shard-iclb: NOTRUN -> [SKIP][99] ([fdo#110723]) +2 similar issues [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb4/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html * igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs: - shard-iclb: NOTRUN -> [SKIP][100] ([fdo#109278] / [i915#3886]) +14 similar issues [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb4/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_mc_ccs: - shard-kbl: NOTRUN -> [SKIP][101] ([fdo#109271] / [i915#3886]) +11 similar issues [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl3/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc: - shard-apl: NOTRUN -> [SKIP][102] ([fdo#109271] / [i915#3886]) +15 similar issues [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-apl6/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_mc_ccs: - shard-tglb: NOTRUN -> [SKIP][103] ([i915#3689] / [i915#3886]) +8 similar issues [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb5/igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc: - shard-glk: NOTRUN -> [SKIP][104] ([fdo#109271] / [i915#3886]) +13 similar issues [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-glk8/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-yf_tiled_ccs: - shard-tglb: NOTRUN -> [SKIP][105] ([fdo#111615] / [i915#3689]) +11 similar issues [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb6/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-yf_tiled_ccs.html * igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs: - shard-tglb: NOTRUN -> [SKIP][106] ([i915#3689]) +9 similar issues [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb5/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs.html * igt@kms_chamelium@vga-hpd: - shard-apl: NOTRUN -> [SKIP][107] ([fdo#109271] / [fdo#111827]) +21 similar issues [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-apl2/igt@kms_chamelium@vga-hpd.html * igt@kms_chamelium@vga-hpd-after-suspend: - shard-tglb: NOTRUN -> [SKIP][108] ([fdo#109284] / [fdo#111827]) +22 similar issues [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb5/igt@kms_chamelium@vga-hpd-after-suspend.html * igt@kms_color@pipe-b-deep-color: - shard-iclb: NOTRUN -> [SKIP][109] ([fdo#109278] / [i915#3555]) [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb7/igt@kms_color@pipe-b-deep-color.html - shard-tglb: NOTRUN -> [SKIP][110] ([i915#3555]) +3 similar issues [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb2/igt@kms_color@pipe-b-deep-color.html * igt@kms_color@pipe-d-ctm-0-25: - shard-iclb: NOTRUN -> [SKIP][111] ([fdo#109278] / [i915#1149]) +2 similar issues [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb4/igt@kms_color@pipe-d-ctm-0-25.html * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red: - shard-snb: NOTRUN -> [SKIP][112] ([fdo#109271] / [fdo#111827]) +21 similar issues [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-snb5/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html * igt@kms_color_chamelium@pipe-b-ctm-red-to-blue: - shard-iclb: NOTRUN -> [SKIP][113] ([fdo#109284] / [fdo#111827]) +22 similar issues [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb6/igt@kms_color_chamelium@pipe-b-ctm-red-to-blue.html * igt@kms_color_chamelium@pipe-b-degamma: - shard-kbl: NOTRUN -> [SKIP][114] ([fdo#109271] / [fdo#111827]) +16 similar issues [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl6/igt@kms_color_chamelium@pipe-b-degamma.html * igt@kms_color_chamelium@pipe-d-degamma: - shard-glk: NOTRUN -> [SKIP][115] ([fdo#109271] / [fdo#111827]) +20 similar issues [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-glk5/igt@kms_color_chamelium@pipe-d-degamma.html - shard-iclb: NOTRUN -> [SKIP][116] ([fdo#109278] / [fdo#109284] / [fdo#111827]) [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb4/igt@kms_color_chamelium@pipe-d-degamma.html * igt@kms_content_protection@dp-mst-type-0: - shard-tglb: NOTRUN -> [SKIP][117] ([i915#3116] / [i915#3299]) [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb7/igt@kms_content_protection@dp-mst-type-0.html - shard-iclb: NOTRUN -> [SKIP][118] ([i915#3116]) [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb2/igt@kms_content_protection@dp-mst-type-0.html * igt@kms_content_protection@lic: - shard-apl: NOTRUN -> [TIMEOUT][119] ([i915#1319]) [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-apl6/igt@kms_content_protection@lic.html * igt@kms_content_protection@mei_interface: - shard-iclb: NOTRUN -> [SKIP][120] ([fdo#109300] / [fdo#111066]) [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb1/igt@kms_content_protection@mei_interface.html * igt@kms_content_protection@uevent: - shard-kbl: NOTRUN -> [FAIL][121] ([i915#2105]) [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl1/igt@kms_content_protection@uevent.html - shard-tglb: NOTRUN -> [SKIP][122] ([i915#1063]) +1 similar issue [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb2/igt@kms_content_protection@uevent.html - shard-apl: NOTRUN -> [FAIL][123] ([i915#2105]) [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-apl4/igt@kms_content_protection@uevent.html * igt@kms_cursor_crc@pipe-a-cursor-512x512-offscreen: - shard-iclb: NOTRUN -> [SKIP][124] ([fdo#109278] / [fdo#109279]) +6 similar issues [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb6/igt@kms_cursor_crc@pipe-a-cursor-512x512-offscreen.html * igt@kms_cursor_crc@pipe-c-cursor-32x32-rapid-movement: - shard-tglb: NOTRUN -> [SKIP][125] ([i915#3319]) +1 similar issue [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb7/igt@kms_cursor_crc@pipe-c-cursor-32x32-rapid-movement.html * igt@kms_cursor_crc@pipe-c-cursor-512x512-random: - shard-tglb: NOTRUN -> [SKIP][126] ([fdo#109279] / [i915#3359]) +10 similar issues [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb1/igt@kms_cursor_crc@pipe-c-cursor-512x512-random.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-kbl: NOTRUN -> [DMESG-WARN][127] ([i915#180]) +5 similar issues [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-kbl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html * igt@kms_cursor_crc@pipe-d-cursor-max-size-rapid-movement: - shard-tglb: NOTRUN -> [SKIP][128] ([i915#3359]) +13 similar issues [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb1/igt@kms_cursor_crc@pipe-d-cursor-max-size-rapid-movement.html * igt@kms_cursor_edge_walk@pipe-d-128x128-top-edge: - shard-iclb: NOTRUN -> [SKIP][129] ([fdo#109278]) +71 similar issues [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb2/igt@kms_cursor_edge_walk@pipe-d-128x128-top-edge.html * igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy: - shard-iclb: NOTRUN -> [SKIP][130] ([fdo#109274] / [fdo#109278]) +7 similar issues [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-iclb4/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html * igt@kms_cursor_legacy@cursora-vs-flipb-atomic: - shard-tglb: NOTRUN -> [SKIP][131] ([fdo#109274] / [fdo#111825]) +23 similar issues [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/shard-tglb3/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-glk: [PASS][132] -> [FAIL][133] ([i915#2346]) [132]: https == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6840/index.html [-- Attachment #2: Type: text/html, Size: 34014 bytes --] ^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc
@ 2022-03-29 14:17 Kamil Konieczny
2022-03-29 14:17 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny
0 siblings, 1 reply; 16+ messages in thread
From: Kamil Konieczny @ 2022-03-29 14:17 UTC (permalink / raw)
To: igt-dev
Add noreloc mode for GPU gens without relocations. Also
while at this, add some caching for required properties.
Change also snoop function so it will work on DG1.
v6: resended with corrected commit version desccription in
gem_concurrent_all
v5: move down after reloc functions, add description, use
get_simple_h2l_ahnd function in main() fixture (Zbigniew)
v4: rebase, simplify bit17_require (Zbigniew)
v3: address Zbigniew review: correcting comment style, changed
checks in bit17_require
v2: rebased, fix caching in bit17_require, addressed Zbigniew
review comments
Cc: "Zbigniew Kempczyński" <zbigniew.kempczynski@intel.com>
Kamil Konieczny (2):
lib/intel_batchbuffer: add create without relocs
tests/i915/gem_concurrent_all: Add no-reloc capability
lib/intel_batchbuffer.c | 21 ++++
lib/intel_batchbuffer.h | 1 +
tests/i915/gem_concurrent_all.c | 175 ++++++++++++++++++++++++++------
3 files changed, 166 insertions(+), 31 deletions(-)
--
2.32.0
^ permalink raw reply [flat|nested] 16+ messages in thread* [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability 2022-03-29 14:17 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny @ 2022-03-29 14:17 ` Kamil Konieczny 0 siblings, 0 replies; 16+ messages in thread From: Kamil Konieczny @ 2022-03-29 14:17 UTC (permalink / raw) To: igt-dev Add noreloc mode for GPU gens without relocations. Also while at this, add some caching for required properties. Change also snoop function so it will work on DG1. Tested with ./gem_concurrent_blit --run '4KiB-tiny-gpu-*' and 256KiB with modified drm-tip to allow softpinning and second run with relocs. v8: In main fixture, first try to open allocator should be done with get_simple_h2l_ahnd so only on no-relocs gens we will later use intel_allocator_open_full function (Zbigniew). v7: rebase, cleanup bit17 caching (Zbigniew comments) v6: correct comment, rewrite bit17 caching (Zbigniew) v5: rebase, fix caching in bit17_require, changes according to Zbigniew review: simplify cache of !gem_has_llc, drop multiprocess start/stop, use ALLOC_STRATEGY_HIGH_TO_LOW, correct offset and flags v4: corrected alloc_open and first ahnd setting Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> --- tests/i915/gem_concurrent_all.c | 175 ++++++++++++++++++++++++++------ 1 file changed, 144 insertions(+), 31 deletions(-) diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c index d0f9b62e..92c13f33 100644 --- a/tests/i915/gem_concurrent_all.c +++ b/tests/i915/gem_concurrent_all.c @@ -60,6 +60,7 @@ int fd, devid, gen; int vgem_drv = -1; int all; int pass; +uint64_t ahnd; struct create { const char *name; @@ -239,8 +240,16 @@ unmapped_create_bo(const struct buffers *b) static void create_snoop_require(const struct create *create, unsigned count) { + static bool check_llc = true; + static bool has_snoop; + create_cpu_require(create, count); - igt_require(!gem_has_llc(fd)); + if (check_llc) { + has_snoop = !gem_has_llc(fd); + check_llc = false; + } + + igt_require(has_snoop); } static struct intel_buf * @@ -249,7 +258,7 @@ snoop_create_bo(const struct buffers *b) struct intel_buf *buf; buf = unmapped_create_bo(b); - gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); + __gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); return buf; } @@ -572,22 +581,33 @@ gttX_create_bo(const struct buffers *b) static void bit17_require(void) { - static struct drm_i915_gem_get_tiling2 { - uint32_t handle; - uint32_t tiling_mode; - uint32_t swizzle_mode; - uint32_t phys_swizzle_mode; - } arg; + static bool has_tiling2, checked; + #define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) - if (arg.handle == 0) { + if (!checked) { + struct drm_i915_gem_get_tiling2 { + uint32_t handle; + uint32_t tiling_mode; + uint32_t swizzle_mode; + uint32_t phys_swizzle_mode; + } arg = {}; + int err; + + checked = true; arg.handle = gem_create(fd, 4096); - gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); + err = __gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); + if (!err) { + igt_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); + if (!errno && arg.phys_swizzle_mode == arg.swizzle_mode) + has_tiling2 = true; + } - do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); + errno = 0; gem_close(fd, arg.handle); } - igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); + + igt_require(has_tiling2); } static void wc_require(void) @@ -670,11 +690,21 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) struct drm_i915_gem_exec_object2 gem_exec[2]; struct drm_i915_gem_execbuffer2 execbuf; uint32_t tmp[10], *b; + uint64_t addr = 0; memset(reloc, 0, sizeof(reloc)); memset(gem_exec, 0, sizeof(gem_exec)); memset(&execbuf, 0, sizeof(execbuf)); + if (ahnd) { + addr = buf->addr.offset; + if (INVALID_ADDR(addr)) { + addr = intel_allocator_alloc(buffers->ibb->allocator_handle, + buf->handle, buf->size, 0); + buf->addr.offset = addr; + } + } + b = tmp; *b++ = XY_COLOR_BLT_CMD_NOLEN | ((gen >= 8) ? 5 : 4) | @@ -691,9 +721,9 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) reloc[0].target_handle = buf->handle; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; - *b++ = 0; + *b++ = addr; if (gen >= 8) - *b++ = 0; + *b++ = addr >> 32; *b++ = val; *b++ = MI_BATCH_BUFFER_END; if ((b - tmp) & 1) @@ -703,8 +733,19 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE; gem_exec[1].handle = gem_create(fd, 4096); - gem_exec[1].relocation_count = 1; - gem_exec[1].relocs_ptr = to_user_pointer(reloc); + if (!ahnd) { + gem_exec[1].relocation_count = 1; + gem_exec[1].relocs_ptr = to_user_pointer(reloc); + } else { + gem_exec[1].offset = CANONICAL(intel_allocator_alloc(ahnd, + gem_exec[1].handle, + 4096, 0)); + gem_exec[1].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS; + + gem_exec[0].offset = CANONICAL(buf->addr.offset); + gem_exec[0].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE | + EXEC_OBJECT_SUPPORTS_48B_ADDRESS; + } execbuf.buffers_ptr = to_user_pointer(gem_exec); execbuf.buffer_count = 2; @@ -716,6 +757,7 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) gem_execbuf(fd, &execbuf); gem_close(fd, gem_exec[1].handle); + put_offset(ahnd, gem_exec[1].handle); } static void @@ -766,6 +808,18 @@ static bool set_max_map_count(int num_buffers) return max > num_buffers; } +static uint64_t alloc_open(void) +{ + return ahnd ? intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, + ALLOC_STRATEGY_HIGH_TO_LOW, 0) : 0; +} + +static struct intel_bb *bb_create(int i915, uint32_t size) +{ + return ahnd ? intel_bb_create_no_relocs(i915, size) : + intel_bb_create_with_relocs(i915, size); +} + static void buffers_init(struct buffers *b, const char *name, const struct create *create, @@ -796,7 +850,7 @@ static void buffers_init(struct buffers *b, igt_assert(b->src); b->dst = b->src + num_buffers; - b->ibb = intel_bb_create(_fd, 4096); + b->ibb = bb_create(_fd, 4096); } static void buffers_destroy(struct buffers *b) @@ -829,6 +883,27 @@ static void buffers_destroy(struct buffers *b) } } +static void bb_destroy(struct buffers *b) +{ + if (b->ibb) { + intel_bb_destroy(b->ibb); + b->ibb = NULL; + } +} + +static void __bufs_destroy(struct buffers *b) +{ + buffers_destroy(b); + if (b->ibb) { + intel_bb_destroy(b->ibb); + b->ibb = NULL; + } + if (b->bops) { + buf_ops_destroy(b->bops); + b->bops = NULL; + } +} + static void buffers_create(struct buffers *b) { int count = b->num_buffers; @@ -838,32 +913,57 @@ static void buffers_create(struct buffers *b) igt_assert(b->count == 0); b->count = count; + ahnd = alloc_open(); for (int i = 0; i < count; i++) { b->src[i] = b->mode->create_bo(b); b->dst[i] = b->mode->create_bo(b); } b->spare = b->mode->create_bo(b); b->snoop = snoop_create_bo(b); + if (b->ibb) + intel_bb_destroy(b->ibb); + + b->ibb = bb_create(fd, 4096); } static void buffers_reset(struct buffers *b) { b->bops = buf_ops_create(fd); - b->ibb = intel_bb_create(fd, 4096); + b->ibb = bb_create(fd, 4096); +} + +static void __buffers_create(struct buffers *b) +{ + b->bops = buf_ops_create(fd); + igt_assert(b->bops); + igt_assert(b->num_buffers > 0); + igt_assert(b->mode); + igt_assert(b->mode->create_bo); + + b->count = 0; + for (int i = 0; i < b->num_buffers; i++) { + b->src[i] = b->mode->create_bo(b); + b->dst[i] = b->mode->create_bo(b); + } + b->count = b->num_buffers; + b->spare = b->mode->create_bo(b); + b->snoop = snoop_create_bo(b); + ahnd = alloc_open(); + b->ibb = bb_create(fd, 4096); } static void buffers_fini(struct buffers *b) { if (b->bops == NULL) return; - buffers_destroy(b); free(b->tmp); free(b->src); - - intel_bb_destroy(b->ibb); - buf_ops_destroy(b->bops); + if (b->ibb) + intel_bb_destroy(b->ibb); + if (b->bops) + buf_ops_destroy(b->bops); memset(b, 0, sizeof(*b)); } @@ -1306,6 +1406,8 @@ static void run_single(struct buffers *buffers, do_hang do_hang_func) { pass = 0; + bb_destroy(buffers); + buffers->ibb = bb_create(fd, 4096); do_test_func(buffers, do_copy_func, do_hang_func); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); } @@ -1316,6 +1418,8 @@ static void run_interruptible(struct buffers *buffers, do_hang do_hang_func) { pass = 0; + bb_destroy(buffers); + buffers->ibb = bb_create(fd, 4096); igt_while_interruptible(true) do_test_func(buffers, do_copy_func, do_hang_func); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); @@ -1332,10 +1436,18 @@ static void run_child(struct buffers *buffers, * leading to the child closing an object without the parent knowing. */ pass = 0; - igt_fork(child, 1) + __bufs_destroy(buffers); + + igt_fork(child, 1) { + /* recreate process local variables */ + intel_allocator_init(); + __buffers_create(buffers); do_test_func(buffers, do_copy_func, do_hang_func); + } igt_waitchildren(); + igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); + buffers_reset(buffers); } static void __run_forked(struct buffers *buffers, @@ -1346,24 +1458,20 @@ static void __run_forked(struct buffers *buffers, { /* purge the caches before cloing the process */ - buffers_destroy(buffers); - intel_bb_destroy(buffers->ibb); - buf_ops_destroy(buffers->bops); + __bufs_destroy(buffers); igt_fork(child, num_children) { int num_buffers; /* recreate process local variables */ fd = gem_reopen_driver(fd); - + intel_allocator_init(); /* detach from thread */ num_buffers = buffers->num_buffers / num_children; num_buffers += MIN_BUFFERS; if (num_buffers < buffers->num_buffers) buffers->num_buffers = num_buffers; - buffers_reset(buffers); - buffers_create(buffers); - + __buffers_create(buffers); igt_while_interruptible(interrupt) { for (pass = 0; pass < loops; pass++) do_test_func(buffers, @@ -1773,6 +1881,7 @@ igt_main { "16MiB", 2048, 2048 }, { NULL} }; + uint64_t pin_sz = 0; void *pinned = NULL; char name[80]; @@ -1792,6 +1901,11 @@ igt_main rendercopy = igt_get_render_copyfunc(devid); vgem_drv = __drm_open_driver(DRIVER_VGEM); + + ahnd = get_simple_h2l_ahnd(fd, 0); + put_ahnd(ahnd); + if (ahnd) + intel_bb_track(true); } for (const struct create *c = create; c->name; c++) { @@ -1864,7 +1978,6 @@ igt_main igt_fixture igt_stop_shrink_helper(); } - /* Use the entire mappable aperture, force swapping */ snprintf(name, sizeof(name), "%s%s-%s", c->name, s->name, "swap"); -- 2.32.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc
@ 2022-03-29 13:49 Kamil Konieczny
2022-03-29 13:49 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny
0 siblings, 1 reply; 16+ messages in thread
From: Kamil Konieczny @ 2022-03-29 13:49 UTC (permalink / raw)
To: igt-dev
Add noreloc mode for GPU gens without relocations. Also
while at this, add some caching for required properties.
Change also snoop function so it will work on DG1.
v5: move down after reloc functions, add description, use
simpler function in main() fixture (Zbigniew)
v4: rebase, simplify bit17_require (Zbigniew)
v3: address Zbigniew review: correcting comment style, changed
checks in bit17_require
v2: rebased, fix caching in bit17_require, addressed Zbigniew
review comments
Cc: "Zbigniew Kempczyński" <zbigniew.kempczynski@intel.com>
Kamil Konieczny (2):
lib/intel_batchbuffer: add create without relocs
tests/i915/gem_concurrent_all: Add no-reloc capability
lib/intel_batchbuffer.c | 21 ++++
lib/intel_batchbuffer.h | 1 +
tests/i915/gem_concurrent_all.c | 175 ++++++++++++++++++++++++++------
3 files changed, 166 insertions(+), 31 deletions(-)
--
2.32.0
^ permalink raw reply [flat|nested] 16+ messages in thread* [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability 2022-03-29 13:49 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny @ 2022-03-29 13:49 ` Kamil Konieczny 0 siblings, 0 replies; 16+ messages in thread From: Kamil Konieczny @ 2022-03-29 13:49 UTC (permalink / raw) To: igt-dev Add noreloc mode for GPU gens without relocations. Also while at this, add some caching for required properties. Change also snoop function so it will work on DG1. Tested with ./gem_concurrent_blit --run '4KiB-tiny-gpu-*' and 256KiB with modified drm-tip to allow softpinning and second run with relocs. v8: In main first call to allocator only checks if there are no relocs so it can use simpler function. v7: rebase, cleanup bit17 caching (Zbigniew comments) v6: correct comment, rewrite bit17 caching (Zbigniew) v5: rebase, fix caching in bit17_require, changes according to Zbigniew review: simplify cache of !gem_has_llc, drop multiprocess start/stop, use ALLOC_STRATEGY_HIGH_TO_LOW, correct offset and flags v4: corrected alloc_open and first ahnd setting Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> --- tests/i915/gem_concurrent_all.c | 175 ++++++++++++++++++++++++++------ 1 file changed, 144 insertions(+), 31 deletions(-) diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c index d0f9b62e..92c13f33 100644 --- a/tests/i915/gem_concurrent_all.c +++ b/tests/i915/gem_concurrent_all.c @@ -60,6 +60,7 @@ int fd, devid, gen; int vgem_drv = -1; int all; int pass; +uint64_t ahnd; struct create { const char *name; @@ -239,8 +240,16 @@ unmapped_create_bo(const struct buffers *b) static void create_snoop_require(const struct create *create, unsigned count) { + static bool check_llc = true; + static bool has_snoop; + create_cpu_require(create, count); - igt_require(!gem_has_llc(fd)); + if (check_llc) { + has_snoop = !gem_has_llc(fd); + check_llc = false; + } + + igt_require(has_snoop); } static struct intel_buf * @@ -249,7 +258,7 @@ snoop_create_bo(const struct buffers *b) struct intel_buf *buf; buf = unmapped_create_bo(b); - gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); + __gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); return buf; } @@ -572,22 +581,33 @@ gttX_create_bo(const struct buffers *b) static void bit17_require(void) { - static struct drm_i915_gem_get_tiling2 { - uint32_t handle; - uint32_t tiling_mode; - uint32_t swizzle_mode; - uint32_t phys_swizzle_mode; - } arg; + static bool has_tiling2, checked; + #define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) - if (arg.handle == 0) { + if (!checked) { + struct drm_i915_gem_get_tiling2 { + uint32_t handle; + uint32_t tiling_mode; + uint32_t swizzle_mode; + uint32_t phys_swizzle_mode; + } arg = {}; + int err; + + checked = true; arg.handle = gem_create(fd, 4096); - gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); + err = __gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); + if (!err) { + igt_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); + if (!errno && arg.phys_swizzle_mode == arg.swizzle_mode) + has_tiling2 = true; + } - do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); + errno = 0; gem_close(fd, arg.handle); } - igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); + + igt_require(has_tiling2); } static void wc_require(void) @@ -670,11 +690,21 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) struct drm_i915_gem_exec_object2 gem_exec[2]; struct drm_i915_gem_execbuffer2 execbuf; uint32_t tmp[10], *b; + uint64_t addr = 0; memset(reloc, 0, sizeof(reloc)); memset(gem_exec, 0, sizeof(gem_exec)); memset(&execbuf, 0, sizeof(execbuf)); + if (ahnd) { + addr = buf->addr.offset; + if (INVALID_ADDR(addr)) { + addr = intel_allocator_alloc(buffers->ibb->allocator_handle, + buf->handle, buf->size, 0); + buf->addr.offset = addr; + } + } + b = tmp; *b++ = XY_COLOR_BLT_CMD_NOLEN | ((gen >= 8) ? 5 : 4) | @@ -691,9 +721,9 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) reloc[0].target_handle = buf->handle; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; - *b++ = 0; + *b++ = addr; if (gen >= 8) - *b++ = 0; + *b++ = addr >> 32; *b++ = val; *b++ = MI_BATCH_BUFFER_END; if ((b - tmp) & 1) @@ -703,8 +733,19 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE; gem_exec[1].handle = gem_create(fd, 4096); - gem_exec[1].relocation_count = 1; - gem_exec[1].relocs_ptr = to_user_pointer(reloc); + if (!ahnd) { + gem_exec[1].relocation_count = 1; + gem_exec[1].relocs_ptr = to_user_pointer(reloc); + } else { + gem_exec[1].offset = CANONICAL(intel_allocator_alloc(ahnd, + gem_exec[1].handle, + 4096, 0)); + gem_exec[1].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS; + + gem_exec[0].offset = CANONICAL(buf->addr.offset); + gem_exec[0].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE | + EXEC_OBJECT_SUPPORTS_48B_ADDRESS; + } execbuf.buffers_ptr = to_user_pointer(gem_exec); execbuf.buffer_count = 2; @@ -716,6 +757,7 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) gem_execbuf(fd, &execbuf); gem_close(fd, gem_exec[1].handle); + put_offset(ahnd, gem_exec[1].handle); } static void @@ -766,6 +808,18 @@ static bool set_max_map_count(int num_buffers) return max > num_buffers; } +static uint64_t alloc_open(void) +{ + return ahnd ? intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, + ALLOC_STRATEGY_HIGH_TO_LOW, 0) : 0; +} + +static struct intel_bb *bb_create(int i915, uint32_t size) +{ + return ahnd ? intel_bb_create_no_relocs(i915, size) : + intel_bb_create_with_relocs(i915, size); +} + static void buffers_init(struct buffers *b, const char *name, const struct create *create, @@ -796,7 +850,7 @@ static void buffers_init(struct buffers *b, igt_assert(b->src); b->dst = b->src + num_buffers; - b->ibb = intel_bb_create(_fd, 4096); + b->ibb = bb_create(_fd, 4096); } static void buffers_destroy(struct buffers *b) @@ -829,6 +883,27 @@ static void buffers_destroy(struct buffers *b) } } +static void bb_destroy(struct buffers *b) +{ + if (b->ibb) { + intel_bb_destroy(b->ibb); + b->ibb = NULL; + } +} + +static void __bufs_destroy(struct buffers *b) +{ + buffers_destroy(b); + if (b->ibb) { + intel_bb_destroy(b->ibb); + b->ibb = NULL; + } + if (b->bops) { + buf_ops_destroy(b->bops); + b->bops = NULL; + } +} + static void buffers_create(struct buffers *b) { int count = b->num_buffers; @@ -838,32 +913,57 @@ static void buffers_create(struct buffers *b) igt_assert(b->count == 0); b->count = count; + ahnd = alloc_open(); for (int i = 0; i < count; i++) { b->src[i] = b->mode->create_bo(b); b->dst[i] = b->mode->create_bo(b); } b->spare = b->mode->create_bo(b); b->snoop = snoop_create_bo(b); + if (b->ibb) + intel_bb_destroy(b->ibb); + + b->ibb = bb_create(fd, 4096); } static void buffers_reset(struct buffers *b) { b->bops = buf_ops_create(fd); - b->ibb = intel_bb_create(fd, 4096); + b->ibb = bb_create(fd, 4096); +} + +static void __buffers_create(struct buffers *b) +{ + b->bops = buf_ops_create(fd); + igt_assert(b->bops); + igt_assert(b->num_buffers > 0); + igt_assert(b->mode); + igt_assert(b->mode->create_bo); + + b->count = 0; + for (int i = 0; i < b->num_buffers; i++) { + b->src[i] = b->mode->create_bo(b); + b->dst[i] = b->mode->create_bo(b); + } + b->count = b->num_buffers; + b->spare = b->mode->create_bo(b); + b->snoop = snoop_create_bo(b); + ahnd = alloc_open(); + b->ibb = bb_create(fd, 4096); } static void buffers_fini(struct buffers *b) { if (b->bops == NULL) return; - buffers_destroy(b); free(b->tmp); free(b->src); - - intel_bb_destroy(b->ibb); - buf_ops_destroy(b->bops); + if (b->ibb) + intel_bb_destroy(b->ibb); + if (b->bops) + buf_ops_destroy(b->bops); memset(b, 0, sizeof(*b)); } @@ -1306,6 +1406,8 @@ static void run_single(struct buffers *buffers, do_hang do_hang_func) { pass = 0; + bb_destroy(buffers); + buffers->ibb = bb_create(fd, 4096); do_test_func(buffers, do_copy_func, do_hang_func); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); } @@ -1316,6 +1418,8 @@ static void run_interruptible(struct buffers *buffers, do_hang do_hang_func) { pass = 0; + bb_destroy(buffers); + buffers->ibb = bb_create(fd, 4096); igt_while_interruptible(true) do_test_func(buffers, do_copy_func, do_hang_func); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); @@ -1332,10 +1436,18 @@ static void run_child(struct buffers *buffers, * leading to the child closing an object without the parent knowing. */ pass = 0; - igt_fork(child, 1) + __bufs_destroy(buffers); + + igt_fork(child, 1) { + /* recreate process local variables */ + intel_allocator_init(); + __buffers_create(buffers); do_test_func(buffers, do_copy_func, do_hang_func); + } igt_waitchildren(); + igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); + buffers_reset(buffers); } static void __run_forked(struct buffers *buffers, @@ -1346,24 +1458,20 @@ static void __run_forked(struct buffers *buffers, { /* purge the caches before cloing the process */ - buffers_destroy(buffers); - intel_bb_destroy(buffers->ibb); - buf_ops_destroy(buffers->bops); + __bufs_destroy(buffers); igt_fork(child, num_children) { int num_buffers; /* recreate process local variables */ fd = gem_reopen_driver(fd); - + intel_allocator_init(); /* detach from thread */ num_buffers = buffers->num_buffers / num_children; num_buffers += MIN_BUFFERS; if (num_buffers < buffers->num_buffers) buffers->num_buffers = num_buffers; - buffers_reset(buffers); - buffers_create(buffers); - + __buffers_create(buffers); igt_while_interruptible(interrupt) { for (pass = 0; pass < loops; pass++) do_test_func(buffers, @@ -1773,6 +1881,7 @@ igt_main { "16MiB", 2048, 2048 }, { NULL} }; + uint64_t pin_sz = 0; void *pinned = NULL; char name[80]; @@ -1792,6 +1901,11 @@ igt_main rendercopy = igt_get_render_copyfunc(devid); vgem_drv = __drm_open_driver(DRIVER_VGEM); + + ahnd = get_simple_h2l_ahnd(fd, 0); + put_ahnd(ahnd); + if (ahnd) + intel_bb_track(true); } for (const struct create *c = create; c->name; c++) { @@ -1864,7 +1978,6 @@ igt_main igt_fixture igt_stop_shrink_helper(); } - /* Use the entire mappable aperture, force swapping */ snprintf(name, sizeof(name), "%s%s-%s", c->name, s->name, "swap"); -- 2.32.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc
@ 2022-03-28 8:31 Kamil Konieczny
2022-03-28 8:31 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny
0 siblings, 1 reply; 16+ messages in thread
From: Kamil Konieczny @ 2022-03-28 8:31 UTC (permalink / raw)
To: igt-dev
Add noreloc mode for GPU gens without relocations. Also
while at this, add some caching for required properties.
Change also snoop function so it will work on DG1.
v3: address Zbigniew review: correcting comment style, changed
checks in bit17_require
v2: rebased, fix caching in bit17_require, addressed Zbigniew
review comments
Cc: "Zbigniew Kempczyński" <zbigniew.kempczynski@intel.com>
Kamil Konieczny (2):
lib/intel_batchbuffer: add create without relocs
tests/i915/gem_concurrent_all: Add no-reloc capability
lib/intel_batchbuffer.c | 7 ++
lib/intel_batchbuffer.h | 1 +
tests/i915/gem_concurrent_all.c | 167 +++++++++++++++++++++++++++-----
3 files changed, 152 insertions(+), 23 deletions(-)
--
2.32.0
^ permalink raw reply [flat|nested] 16+ messages in thread* [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability 2022-03-28 8:31 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny @ 2022-03-28 8:31 ` Kamil Konieczny 2022-03-28 12:33 ` Zbigniew Kempczyński 0 siblings, 1 reply; 16+ messages in thread From: Kamil Konieczny @ 2022-03-28 8:31 UTC (permalink / raw) To: igt-dev Add noreloc mode for GPU gens without relocations. Also while at this, add some caching for required properties. Change also snoop function so it will work on DG1. Tested with ./gem_concurrent_blit --run '4KiB-tiny-gpu-*' and 256KiB with modified drm-tip to allow softpinning. v6: correct comment, rewrite bit17 caching (Zbigniew) v5: rebase, fix caching in bit17_require, changes according to Zbigniew review: simplify cache of !gem_has_llc, drop multiprocess start/stop, use ALLOC_STRATEGY_HIGH_TO_LOW, correct offset and flags v4: corrected alloc_open and first ahnd setting Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> --- tests/i915/gem_concurrent_all.c | 167 +++++++++++++++++++++++++++----- 1 file changed, 144 insertions(+), 23 deletions(-) diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c index d0f9b62e..3e650233 100644 --- a/tests/i915/gem_concurrent_all.c +++ b/tests/i915/gem_concurrent_all.c @@ -60,6 +60,7 @@ int fd, devid, gen; int vgem_drv = -1; int all; int pass; +uint64_t ahnd; struct create { const char *name; @@ -239,8 +240,16 @@ unmapped_create_bo(const struct buffers *b) static void create_snoop_require(const struct create *create, unsigned count) { + static bool check_llc = true; + static bool has_snoop; + create_cpu_require(create, count); - igt_require(!gem_has_llc(fd)); + if (check_llc) { + has_snoop = !gem_has_llc(fd); + check_llc = false; + } + + igt_require(has_snoop); } static struct intel_buf * @@ -249,7 +258,7 @@ snoop_create_bo(const struct buffers *b) struct intel_buf *buf; buf = unmapped_create_bo(b); - gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); + __gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); return buf; } @@ -581,11 +590,29 @@ static void bit17_require(void) #define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) if (arg.handle == 0) { + bool has_tiling2; + int err_tiling; + + has_tiling2 = false; arg.handle = gem_create(fd, 4096); - gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); + err_tiling = __gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); + if (!err_tiling) { + igt_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); + if (!errno) + has_tiling2 = true; + + errno = 0; + } - do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); gem_close(fd, arg.handle); + if (err_tiling || !has_tiling2) + if (arg.phys_swizzle_mode == arg.swizzle_mode) { + arg.phys_swizzle_mode = 0; + arg.swizzle_mode = -1; + } + + igt_require(!err_tiling); + igt_require(has_tiling2); } igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); } @@ -670,11 +697,21 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) struct drm_i915_gem_exec_object2 gem_exec[2]; struct drm_i915_gem_execbuffer2 execbuf; uint32_t tmp[10], *b; + uint64_t addr = 0; memset(reloc, 0, sizeof(reloc)); memset(gem_exec, 0, sizeof(gem_exec)); memset(&execbuf, 0, sizeof(execbuf)); + if (ahnd) { + addr = buf->addr.offset; + if (INVALID_ADDR(addr)) { + addr = intel_allocator_alloc(buffers->ibb->allocator_handle, + buf->handle, buf->size, 0); + buf->addr.offset = addr; + } + } + b = tmp; *b++ = XY_COLOR_BLT_CMD_NOLEN | ((gen >= 8) ? 5 : 4) | @@ -691,9 +728,9 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) reloc[0].target_handle = buf->handle; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; - *b++ = 0; + *b++ = addr; if (gen >= 8) - *b++ = 0; + *b++ = addr >> 32; *b++ = val; *b++ = MI_BATCH_BUFFER_END; if ((b - tmp) & 1) @@ -703,8 +740,19 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE; gem_exec[1].handle = gem_create(fd, 4096); - gem_exec[1].relocation_count = 1; - gem_exec[1].relocs_ptr = to_user_pointer(reloc); + if (!ahnd) { + gem_exec[1].relocation_count = 1; + gem_exec[1].relocs_ptr = to_user_pointer(reloc); + } else { + gem_exec[1].offset = CANONICAL(intel_allocator_alloc(ahnd, + gem_exec[1].handle, + 4096, 0)); + gem_exec[1].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS; + + gem_exec[0].offset = CANONICAL(buf->addr.offset); + gem_exec[0].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE | + EXEC_OBJECT_SUPPORTS_48B_ADDRESS; + } execbuf.buffers_ptr = to_user_pointer(gem_exec); execbuf.buffer_count = 2; @@ -716,6 +764,7 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) gem_execbuf(fd, &execbuf); gem_close(fd, gem_exec[1].handle); + put_offset(ahnd, gem_exec[1].handle); } static void @@ -766,6 +815,18 @@ static bool set_max_map_count(int num_buffers) return max > num_buffers; } +static uint64_t alloc_open(void) +{ + return ahnd ? intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, + ALLOC_STRATEGY_HIGH_TO_LOW, 0) : 0; +} + +static struct intel_bb *bb_create(int i915, uint32_t size) +{ + return ahnd ? intel_bb_create_no_relocs(i915, size) : + intel_bb_create_with_relocs(i915, size); +} + static void buffers_init(struct buffers *b, const char *name, const struct create *create, @@ -796,7 +857,7 @@ static void buffers_init(struct buffers *b, igt_assert(b->src); b->dst = b->src + num_buffers; - b->ibb = intel_bb_create(_fd, 4096); + b->ibb = bb_create(_fd, 4096); } static void buffers_destroy(struct buffers *b) @@ -829,6 +890,27 @@ static void buffers_destroy(struct buffers *b) } } +static void bb_destroy(struct buffers *b) +{ + if (b->ibb) { + intel_bb_destroy(b->ibb); + b->ibb = NULL; + } +} + +static void __bufs_destroy(struct buffers *b) +{ + buffers_destroy(b); + if (b->ibb) { + intel_bb_destroy(b->ibb); + b->ibb = NULL; + } + if (b->bops) { + buf_ops_destroy(b->bops); + b->bops = NULL; + } +} + static void buffers_create(struct buffers *b) { int count = b->num_buffers; @@ -838,32 +920,57 @@ static void buffers_create(struct buffers *b) igt_assert(b->count == 0); b->count = count; + ahnd = alloc_open(); for (int i = 0; i < count; i++) { b->src[i] = b->mode->create_bo(b); b->dst[i] = b->mode->create_bo(b); } b->spare = b->mode->create_bo(b); b->snoop = snoop_create_bo(b); + if (b->ibb) + intel_bb_destroy(b->ibb); + + b->ibb = bb_create(fd, 4096); } static void buffers_reset(struct buffers *b) { b->bops = buf_ops_create(fd); - b->ibb = intel_bb_create(fd, 4096); + b->ibb = bb_create(fd, 4096); +} + +static void __buffers_create(struct buffers *b) +{ + b->bops = buf_ops_create(fd); + igt_assert(b->bops); + igt_assert(b->num_buffers > 0); + igt_assert(b->mode); + igt_assert(b->mode->create_bo); + + b->count = 0; + for (int i = 0; i < b->num_buffers; i++) { + b->src[i] = b->mode->create_bo(b); + b->dst[i] = b->mode->create_bo(b); + } + b->count = b->num_buffers; + b->spare = b->mode->create_bo(b); + b->snoop = snoop_create_bo(b); + ahnd = alloc_open(); + b->ibb = bb_create(fd, 4096); } static void buffers_fini(struct buffers *b) { if (b->bops == NULL) return; - buffers_destroy(b); free(b->tmp); free(b->src); - - intel_bb_destroy(b->ibb); - buf_ops_destroy(b->bops); + if (b->ibb) + intel_bb_destroy(b->ibb); + if (b->bops) + buf_ops_destroy(b->bops); memset(b, 0, sizeof(*b)); } @@ -1306,6 +1413,8 @@ static void run_single(struct buffers *buffers, do_hang do_hang_func) { pass = 0; + bb_destroy(buffers); + buffers->ibb = bb_create(fd, 4096); do_test_func(buffers, do_copy_func, do_hang_func); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); } @@ -1316,6 +1425,8 @@ static void run_interruptible(struct buffers *buffers, do_hang do_hang_func) { pass = 0; + bb_destroy(buffers); + buffers->ibb = bb_create(fd, 4096); igt_while_interruptible(true) do_test_func(buffers, do_copy_func, do_hang_func); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); @@ -1332,10 +1443,18 @@ static void run_child(struct buffers *buffers, * leading to the child closing an object without the parent knowing. */ pass = 0; - igt_fork(child, 1) + __bufs_destroy(buffers); + + igt_fork(child, 1) { + /* recreate process local variables */ + intel_allocator_init(); + __buffers_create(buffers); do_test_func(buffers, do_copy_func, do_hang_func); + } igt_waitchildren(); + igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); + buffers_reset(buffers); } static void __run_forked(struct buffers *buffers, @@ -1346,24 +1465,20 @@ static void __run_forked(struct buffers *buffers, { /* purge the caches before cloing the process */ - buffers_destroy(buffers); - intel_bb_destroy(buffers->ibb); - buf_ops_destroy(buffers->bops); + __bufs_destroy(buffers); igt_fork(child, num_children) { int num_buffers; /* recreate process local variables */ fd = gem_reopen_driver(fd); - + intel_allocator_init(); /* detach from thread */ num_buffers = buffers->num_buffers / num_children; num_buffers += MIN_BUFFERS; if (num_buffers < buffers->num_buffers) buffers->num_buffers = num_buffers; - buffers_reset(buffers); - buffers_create(buffers); - + __buffers_create(buffers); igt_while_interruptible(interrupt) { for (pass = 0; pass < loops; pass++) do_test_func(buffers, @@ -1773,6 +1888,7 @@ igt_main { "16MiB", 2048, 2048 }, { NULL} }; + uint64_t pin_sz = 0; void *pinned = NULL; char name[80]; @@ -1792,6 +1908,12 @@ igt_main rendercopy = igt_get_render_copyfunc(devid); vgem_drv = __drm_open_driver(DRIVER_VGEM); + + ahnd = intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, + ALLOC_STRATEGY_HIGH_TO_LOW, 0); + put_ahnd(ahnd); + if (ahnd) + intel_bb_track(true); } for (const struct create *c = create; c->name; c++) { @@ -1864,7 +1986,6 @@ igt_main igt_fixture igt_stop_shrink_helper(); } - /* Use the entire mappable aperture, force swapping */ snprintf(name, sizeof(name), "%s%s-%s", c->name, s->name, "swap"); -- 2.32.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability 2022-03-28 8:31 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny @ 2022-03-28 12:33 ` Zbigniew Kempczyński 0 siblings, 0 replies; 16+ messages in thread From: Zbigniew Kempczyński @ 2022-03-28 12:33 UTC (permalink / raw) To: Kamil Konieczny; +Cc: igt-dev On Mon, Mar 28, 2022 at 10:31:40AM +0200, Kamil Konieczny wrote: > Add noreloc mode for GPU gens without relocations. Also > while at this, add some caching for required properties. > Change also snoop function so it will work on DG1. > > Tested with ./gem_concurrent_blit --run '4KiB-tiny-gpu-*' > and 256KiB with modified drm-tip to allow softpinning. > > v6: correct comment, rewrite bit17 caching (Zbigniew) > v5: rebase, fix caching in bit17_require, changes according > to Zbigniew review: simplify cache of !gem_has_llc, drop > multiprocess start/stop, use ALLOC_STRATEGY_HIGH_TO_LOW, > correct offset and flags > v4: corrected alloc_open and first ahnd setting > > Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> > Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> > --- > tests/i915/gem_concurrent_all.c | 167 +++++++++++++++++++++++++++----- > 1 file changed, 144 insertions(+), 23 deletions(-) > > diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c > index d0f9b62e..3e650233 100644 > --- a/tests/i915/gem_concurrent_all.c > +++ b/tests/i915/gem_concurrent_all.c > @@ -60,6 +60,7 @@ int fd, devid, gen; > int vgem_drv = -1; > int all; > int pass; > +uint64_t ahnd; > > struct create { > const char *name; > @@ -239,8 +240,16 @@ unmapped_create_bo(const struct buffers *b) > > static void create_snoop_require(const struct create *create, unsigned count) > { > + static bool check_llc = true; > + static bool has_snoop; > + > create_cpu_require(create, count); > - igt_require(!gem_has_llc(fd)); > + if (check_llc) { > + has_snoop = !gem_has_llc(fd); > + check_llc = false; > + } > + > + igt_require(has_snoop); > } > > static struct intel_buf * > @@ -249,7 +258,7 @@ snoop_create_bo(const struct buffers *b) > struct intel_buf *buf; > > buf = unmapped_create_bo(b); > - gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); > + __gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); > > return buf; > } > @@ -581,11 +590,29 @@ static void bit17_require(void) > #define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) > > if (arg.handle == 0) { > + bool has_tiling2; > + int err_tiling; > + > + has_tiling2 = false; > arg.handle = gem_create(fd, 4096); > - gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); > + err_tiling = __gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); > + if (!err_tiling) { > + igt_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); > + if (!errno) > + has_tiling2 = true; > + > + errno = 0; > + } > > - do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); > gem_close(fd, arg.handle); > + if (err_tiling || !has_tiling2) > + if (arg.phys_swizzle_mode == arg.swizzle_mode) { > + arg.phys_swizzle_mode = 0; > + arg.swizzle_mode = -1; > + } > + > + igt_require(!err_tiling); > + igt_require(has_tiling2); Still little bit overengineered. set/get were provided in pairs, so trying to set on gen which doesn't support can immediately go out with require (apart of gem_close() which should be done to avoid fd leakage). So calling get-tiling and gathering / faking information is a little bit confusing. -- Zbigniew > } > igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); > } > @@ -670,11 +697,21 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > struct drm_i915_gem_exec_object2 gem_exec[2]; > struct drm_i915_gem_execbuffer2 execbuf; > uint32_t tmp[10], *b; > + uint64_t addr = 0; > > memset(reloc, 0, sizeof(reloc)); > memset(gem_exec, 0, sizeof(gem_exec)); > memset(&execbuf, 0, sizeof(execbuf)); > > + if (ahnd) { > + addr = buf->addr.offset; > + if (INVALID_ADDR(addr)) { > + addr = intel_allocator_alloc(buffers->ibb->allocator_handle, > + buf->handle, buf->size, 0); > + buf->addr.offset = addr; > + } > + } > + > b = tmp; > *b++ = XY_COLOR_BLT_CMD_NOLEN | > ((gen >= 8) ? 5 : 4) | > @@ -691,9 +728,9 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > reloc[0].target_handle = buf->handle; > reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; > reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; > - *b++ = 0; > + *b++ = addr; > if (gen >= 8) > - *b++ = 0; > + *b++ = addr >> 32; > *b++ = val; > *b++ = MI_BATCH_BUFFER_END; > if ((b - tmp) & 1) > @@ -703,8 +740,19 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE; > > gem_exec[1].handle = gem_create(fd, 4096); > - gem_exec[1].relocation_count = 1; > - gem_exec[1].relocs_ptr = to_user_pointer(reloc); > + if (!ahnd) { > + gem_exec[1].relocation_count = 1; > + gem_exec[1].relocs_ptr = to_user_pointer(reloc); > + } else { > + gem_exec[1].offset = CANONICAL(intel_allocator_alloc(ahnd, > + gem_exec[1].handle, > + 4096, 0)); > + gem_exec[1].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS; > + > + gem_exec[0].offset = CANONICAL(buf->addr.offset); > + gem_exec[0].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE | > + EXEC_OBJECT_SUPPORTS_48B_ADDRESS; > + } > > execbuf.buffers_ptr = to_user_pointer(gem_exec); > execbuf.buffer_count = 2; > @@ -716,6 +764,7 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > gem_execbuf(fd, &execbuf); > > gem_close(fd, gem_exec[1].handle); > + put_offset(ahnd, gem_exec[1].handle); > } > > static void > @@ -766,6 +815,18 @@ static bool set_max_map_count(int num_buffers) > return max > num_buffers; > } > > +static uint64_t alloc_open(void) > +{ > + return ahnd ? intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, > + ALLOC_STRATEGY_HIGH_TO_LOW, 0) : 0; > +} > + > +static struct intel_bb *bb_create(int i915, uint32_t size) > +{ > + return ahnd ? intel_bb_create_no_relocs(i915, size) : > + intel_bb_create_with_relocs(i915, size); > +} > + > static void buffers_init(struct buffers *b, > const char *name, > const struct create *create, > @@ -796,7 +857,7 @@ static void buffers_init(struct buffers *b, > igt_assert(b->src); > b->dst = b->src + num_buffers; > > - b->ibb = intel_bb_create(_fd, 4096); > + b->ibb = bb_create(_fd, 4096); > } > > static void buffers_destroy(struct buffers *b) > @@ -829,6 +890,27 @@ static void buffers_destroy(struct buffers *b) > } > } > > +static void bb_destroy(struct buffers *b) > +{ > + if (b->ibb) { > + intel_bb_destroy(b->ibb); > + b->ibb = NULL; > + } > +} > + > +static void __bufs_destroy(struct buffers *b) > +{ > + buffers_destroy(b); > + if (b->ibb) { > + intel_bb_destroy(b->ibb); > + b->ibb = NULL; > + } > + if (b->bops) { > + buf_ops_destroy(b->bops); > + b->bops = NULL; > + } > +} > + > static void buffers_create(struct buffers *b) > { > int count = b->num_buffers; > @@ -838,32 +920,57 @@ static void buffers_create(struct buffers *b) > igt_assert(b->count == 0); > b->count = count; > > + ahnd = alloc_open(); > for (int i = 0; i < count; i++) { > b->src[i] = b->mode->create_bo(b); > b->dst[i] = b->mode->create_bo(b); > } > b->spare = b->mode->create_bo(b); > b->snoop = snoop_create_bo(b); > + if (b->ibb) > + intel_bb_destroy(b->ibb); > + > + b->ibb = bb_create(fd, 4096); > } > > static void buffers_reset(struct buffers *b) > { > b->bops = buf_ops_create(fd); > - b->ibb = intel_bb_create(fd, 4096); > + b->ibb = bb_create(fd, 4096); > +} > + > +static void __buffers_create(struct buffers *b) > +{ > + b->bops = buf_ops_create(fd); > + igt_assert(b->bops); > + igt_assert(b->num_buffers > 0); > + igt_assert(b->mode); > + igt_assert(b->mode->create_bo); > + > + b->count = 0; > + for (int i = 0; i < b->num_buffers; i++) { > + b->src[i] = b->mode->create_bo(b); > + b->dst[i] = b->mode->create_bo(b); > + } > + b->count = b->num_buffers; > + b->spare = b->mode->create_bo(b); > + b->snoop = snoop_create_bo(b); > + ahnd = alloc_open(); > + b->ibb = bb_create(fd, 4096); > } > > static void buffers_fini(struct buffers *b) > { > if (b->bops == NULL) > return; > - > buffers_destroy(b); > > free(b->tmp); > free(b->src); > - > - intel_bb_destroy(b->ibb); > - buf_ops_destroy(b->bops); > + if (b->ibb) > + intel_bb_destroy(b->ibb); > + if (b->bops) > + buf_ops_destroy(b->bops); > > memset(b, 0, sizeof(*b)); > } > @@ -1306,6 +1413,8 @@ static void run_single(struct buffers *buffers, > do_hang do_hang_func) > { > pass = 0; > + bb_destroy(buffers); > + buffers->ibb = bb_create(fd, 4096); > do_test_func(buffers, do_copy_func, do_hang_func); > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > } > @@ -1316,6 +1425,8 @@ static void run_interruptible(struct buffers *buffers, > do_hang do_hang_func) > { > pass = 0; > + bb_destroy(buffers); > + buffers->ibb = bb_create(fd, 4096); > igt_while_interruptible(true) > do_test_func(buffers, do_copy_func, do_hang_func); > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > @@ -1332,10 +1443,18 @@ static void run_child(struct buffers *buffers, > * leading to the child closing an object without the parent knowing. > */ > pass = 0; > - igt_fork(child, 1) > + __bufs_destroy(buffers); > + > + igt_fork(child, 1) { > + /* recreate process local variables */ > + intel_allocator_init(); > + __buffers_create(buffers); > do_test_func(buffers, do_copy_func, do_hang_func); > + } > igt_waitchildren(); > + > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > + buffers_reset(buffers); > } > > static void __run_forked(struct buffers *buffers, > @@ -1346,24 +1465,20 @@ static void __run_forked(struct buffers *buffers, > > { > /* purge the caches before cloing the process */ > - buffers_destroy(buffers); > - intel_bb_destroy(buffers->ibb); > - buf_ops_destroy(buffers->bops); > + __bufs_destroy(buffers); > > igt_fork(child, num_children) { > int num_buffers; > > /* recreate process local variables */ > fd = gem_reopen_driver(fd); > - > + intel_allocator_init(); /* detach from thread */ > num_buffers = buffers->num_buffers / num_children; > num_buffers += MIN_BUFFERS; > if (num_buffers < buffers->num_buffers) > buffers->num_buffers = num_buffers; > > - buffers_reset(buffers); > - buffers_create(buffers); > - > + __buffers_create(buffers); > igt_while_interruptible(interrupt) { > for (pass = 0; pass < loops; pass++) > do_test_func(buffers, > @@ -1773,6 +1888,7 @@ igt_main > { "16MiB", 2048, 2048 }, > { NULL} > }; > + > uint64_t pin_sz = 0; > void *pinned = NULL; > char name[80]; > @@ -1792,6 +1908,12 @@ igt_main > rendercopy = igt_get_render_copyfunc(devid); > > vgem_drv = __drm_open_driver(DRIVER_VGEM); > + > + ahnd = intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, > + ALLOC_STRATEGY_HIGH_TO_LOW, 0); > + put_ahnd(ahnd); > + if (ahnd) > + intel_bb_track(true); > } > > for (const struct create *c = create; c->name; c++) { > @@ -1864,7 +1986,6 @@ igt_main > igt_fixture > igt_stop_shrink_helper(); > } > - > /* Use the entire mappable aperture, force swapping */ > snprintf(name, sizeof(name), "%s%s-%s", > c->name, s->name, "swap"); > -- > 2.32.0 > ^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc
@ 2022-03-24 14:19 Kamil Konieczny
2022-03-24 14:19 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny
0 siblings, 1 reply; 16+ messages in thread
From: Kamil Konieczny @ 2022-03-24 14:19 UTC (permalink / raw)
To: igt-dev
Add noreloc mode for GPU gens without relocations. Also
while at this, add some caching for required properties.
Change also snoop function so it will work on DG1.
v2: rebased, fix caching in bit17_require, addressed Zbigniew
review comments
Cc: "Zbigniew Kempczyński" <zbigniew.kempczynski@intel.com>
Kamil Konieczny (2):
lib/intel_batchbuffer: add create without relocs
tests/i915/gem_concurrent_all: Add no-reloc capability
lib/intel_batchbuffer.c | 7 ++
lib/intel_batchbuffer.h | 1 +
tests/i915/gem_concurrent_all.c | 165 +++++++++++++++++++++++++++-----
3 files changed, 150 insertions(+), 23 deletions(-)
--
2.32.0
^ permalink raw reply [flat|nested] 16+ messages in thread* [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability 2022-03-24 14:19 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny @ 2022-03-24 14:19 ` Kamil Konieczny 2022-03-28 6:41 ` Zbigniew Kempczyński 0 siblings, 1 reply; 16+ messages in thread From: Kamil Konieczny @ 2022-03-24 14:19 UTC (permalink / raw) To: igt-dev Add noreloc mode for GPU gens without relocations. Also while at this, add some caching for required properties. Change also snoop function so it will work on DG1. Tested with ./gem_concurrent_blit --run '4KiB-tiny-gpu-*' and 256KiB with modified drm-tip to allow softpinning. v5: rebase, fix caching in bit17_require, changes according to Zbigniew review: simplify cache of !gem_has_llc, drop multiprocess start/stop, use ALLOC_STRATEGY_HIGH_TO_LOW, correct offset and flags v4: corrected alloc_open and first ahnd setting Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> --- tests/i915/gem_concurrent_all.c | 165 +++++++++++++++++++++++++++----- 1 file changed, 142 insertions(+), 23 deletions(-) diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c index d0f9b62e..d17c19fc 100644 --- a/tests/i915/gem_concurrent_all.c +++ b/tests/i915/gem_concurrent_all.c @@ -60,6 +60,7 @@ int fd, devid, gen; int vgem_drv = -1; int all; int pass; +uint64_t ahnd; struct create { const char *name; @@ -239,8 +240,16 @@ unmapped_create_bo(const struct buffers *b) static void create_snoop_require(const struct create *create, unsigned count) { + static bool check_llc = true; + static bool has_snoop; + create_cpu_require(create, count); - igt_require(!gem_has_llc(fd)); + if (check_llc) { + has_snoop = !gem_has_llc(fd); + check_llc = false; + } + + igt_require(has_snoop); } static struct intel_buf * @@ -249,7 +258,7 @@ snoop_create_bo(const struct buffers *b) struct intel_buf *buf; buf = unmapped_create_bo(b); - gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); + __gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); return buf; } @@ -578,16 +587,32 @@ static void bit17_require(void) uint32_t swizzle_mode; uint32_t phys_swizzle_mode; } arg; + static bool has_tiling2; #define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) if (arg.handle == 0) { + bool has_tiling; + int err; + + has_tiling2 = false; arg.handle = gem_create(fd, 4096); - gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); + err = __gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); + if (!err) { + has_tiling = true; + igt_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); + if (!errno) + has_tiling2 = true; + + errno = 0; + } else { + has_tiling = false; + } - do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); gem_close(fd, arg.handle); + igt_require(has_tiling); } igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); + igt_require(has_tiling2); } static void wc_require(void) @@ -670,11 +695,21 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) struct drm_i915_gem_exec_object2 gem_exec[2]; struct drm_i915_gem_execbuffer2 execbuf; uint32_t tmp[10], *b; + uint64_t addr = 0; memset(reloc, 0, sizeof(reloc)); memset(gem_exec, 0, sizeof(gem_exec)); memset(&execbuf, 0, sizeof(execbuf)); + if (ahnd) { + addr = buf->addr.offset; + if (INVALID_ADDR(addr)) { + addr = intel_allocator_alloc(buffers->ibb->allocator_handle, + buf->handle, buf->size, 0); + buf->addr.offset = addr; + } + } + b = tmp; *b++ = XY_COLOR_BLT_CMD_NOLEN | ((gen >= 8) ? 5 : 4) | @@ -691,9 +726,9 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) reloc[0].target_handle = buf->handle; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; - *b++ = 0; + *b++ = addr; if (gen >= 8) - *b++ = 0; + *b++ = addr >> 32; *b++ = val; *b++ = MI_BATCH_BUFFER_END; if ((b - tmp) & 1) @@ -703,8 +738,19 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE; gem_exec[1].handle = gem_create(fd, 4096); - gem_exec[1].relocation_count = 1; - gem_exec[1].relocs_ptr = to_user_pointer(reloc); + if (!ahnd) { + gem_exec[1].relocation_count = 1; + gem_exec[1].relocs_ptr = to_user_pointer(reloc); + } else { + gem_exec[1].offset = CANONICAL(intel_allocator_alloc(ahnd, + gem_exec[1].handle, + 4096, 0)); + gem_exec[1].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS; + + gem_exec[0].offset = CANONICAL(buf->addr.offset); + gem_exec[0].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE | + EXEC_OBJECT_SUPPORTS_48B_ADDRESS; + } execbuf.buffers_ptr = to_user_pointer(gem_exec); execbuf.buffer_count = 2; @@ -716,6 +762,7 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) gem_execbuf(fd, &execbuf); gem_close(fd, gem_exec[1].handle); + put_offset(ahnd, gem_exec[1].handle); } static void @@ -766,6 +813,18 @@ static bool set_max_map_count(int num_buffers) return max > num_buffers; } +static uint64_t alloc_open(void) +{ + return ahnd ? intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, + ALLOC_STRATEGY_HIGH_TO_LOW, 0) : 0; +} + +static struct intel_bb *bb_create(int i915, uint32_t size) +{ + return ahnd ? intel_bb_create_no_relocs(i915, size) : + intel_bb_create_with_relocs(i915, size); +} + static void buffers_init(struct buffers *b, const char *name, const struct create *create, @@ -796,7 +855,7 @@ static void buffers_init(struct buffers *b, igt_assert(b->src); b->dst = b->src + num_buffers; - b->ibb = intel_bb_create(_fd, 4096); + b->ibb = bb_create(_fd, 4096); } static void buffers_destroy(struct buffers *b) @@ -829,6 +888,27 @@ static void buffers_destroy(struct buffers *b) } } +static void bb_destroy(struct buffers *b) +{ + if (b->ibb) { + intel_bb_destroy(b->ibb); + b->ibb = NULL; + } +} + +static void __bufs_destroy(struct buffers *b) +{ + buffers_destroy(b); + if (b->ibb) { + intel_bb_destroy(b->ibb); + b->ibb = NULL; + } + if (b->bops) { + buf_ops_destroy(b->bops); + b->bops = NULL; + } +} + static void buffers_create(struct buffers *b) { int count = b->num_buffers; @@ -838,32 +918,57 @@ static void buffers_create(struct buffers *b) igt_assert(b->count == 0); b->count = count; + ahnd = alloc_open(); for (int i = 0; i < count; i++) { b->src[i] = b->mode->create_bo(b); b->dst[i] = b->mode->create_bo(b); } b->spare = b->mode->create_bo(b); b->snoop = snoop_create_bo(b); + if (b->ibb) + intel_bb_destroy(b->ibb); + + b->ibb = bb_create(fd, 4096); } static void buffers_reset(struct buffers *b) { b->bops = buf_ops_create(fd); - b->ibb = intel_bb_create(fd, 4096); + b->ibb = bb_create(fd, 4096); +} + +static void __buffers_create(struct buffers *b) +{ + b->bops = buf_ops_create(fd); + igt_assert(b->bops); + igt_assert(b->num_buffers > 0); + igt_assert(b->mode); + igt_assert(b->mode->create_bo); + + b->count = 0; + for (int i = 0; i < b->num_buffers; i++) { + b->src[i] = b->mode->create_bo(b); + b->dst[i] = b->mode->create_bo(b); + } + b->count = b->num_buffers; + b->spare = b->mode->create_bo(b); + b->snoop = snoop_create_bo(b); + ahnd = alloc_open(); + b->ibb = bb_create(fd, 4096); } static void buffers_fini(struct buffers *b) { if (b->bops == NULL) return; - buffers_destroy(b); free(b->tmp); free(b->src); - - intel_bb_destroy(b->ibb); - buf_ops_destroy(b->bops); + if (b->ibb) + intel_bb_destroy(b->ibb); + if (b->bops) + buf_ops_destroy(b->bops); memset(b, 0, sizeof(*b)); } @@ -1306,6 +1411,8 @@ static void run_single(struct buffers *buffers, do_hang do_hang_func) { pass = 0; + bb_destroy(buffers); + buffers->ibb = bb_create(fd, 4096); do_test_func(buffers, do_copy_func, do_hang_func); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); } @@ -1316,6 +1423,8 @@ static void run_interruptible(struct buffers *buffers, do_hang do_hang_func) { pass = 0; + bb_destroy(buffers); + buffers->ibb = bb_create(fd, 4096); igt_while_interruptible(true) do_test_func(buffers, do_copy_func, do_hang_func); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); @@ -1332,10 +1441,18 @@ static void run_child(struct buffers *buffers, * leading to the child closing an object without the parent knowing. */ pass = 0; - igt_fork(child, 1) + __bufs_destroy(buffers); + + igt_fork(child, 1) { + /* recreate process local variables */ + intel_allocator_init(); + __buffers_create(buffers); do_test_func(buffers, do_copy_func, do_hang_func); + } igt_waitchildren(); + igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); + buffers_reset(buffers); } static void __run_forked(struct buffers *buffers, @@ -1346,24 +1463,20 @@ static void __run_forked(struct buffers *buffers, { /* purge the caches before cloing the process */ - buffers_destroy(buffers); - intel_bb_destroy(buffers->ibb); - buf_ops_destroy(buffers->bops); + __bufs_destroy(buffers); igt_fork(child, num_children) { int num_buffers; /* recreate process local variables */ fd = gem_reopen_driver(fd); - + intel_allocator_init(); //detach from thread num_buffers = buffers->num_buffers / num_children; num_buffers += MIN_BUFFERS; if (num_buffers < buffers->num_buffers) buffers->num_buffers = num_buffers; - buffers_reset(buffers); - buffers_create(buffers); - + __buffers_create(buffers); igt_while_interruptible(interrupt) { for (pass = 0; pass < loops; pass++) do_test_func(buffers, @@ -1773,6 +1886,7 @@ igt_main { "16MiB", 2048, 2048 }, { NULL} }; + uint64_t pin_sz = 0; void *pinned = NULL; char name[80]; @@ -1792,6 +1906,12 @@ igt_main rendercopy = igt_get_render_copyfunc(devid); vgem_drv = __drm_open_driver(DRIVER_VGEM); + + ahnd = intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, + ALLOC_STRATEGY_HIGH_TO_LOW, 0); + put_ahnd(ahnd); + if (ahnd) + intel_bb_track(true); } for (const struct create *c = create; c->name; c++) { @@ -1864,7 +1984,6 @@ igt_main igt_fixture igt_stop_shrink_helper(); } - /* Use the entire mappable aperture, force swapping */ snprintf(name, sizeof(name), "%s%s-%s", c->name, s->name, "swap"); -- 2.32.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability 2022-03-24 14:19 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny @ 2022-03-28 6:41 ` Zbigniew Kempczyński 0 siblings, 0 replies; 16+ messages in thread From: Zbigniew Kempczyński @ 2022-03-28 6:41 UTC (permalink / raw) To: Kamil Konieczny; +Cc: igt-dev On Thu, Mar 24, 2022 at 03:19:17PM +0100, Kamil Konieczny wrote: > Add noreloc mode for GPU gens without relocations. Also > while at this, add some caching for required properties. > Change also snoop function so it will work on DG1. > > Tested with ./gem_concurrent_blit --run '4KiB-tiny-gpu-*' > and 256KiB with modified drm-tip to allow softpinning. > > v5: rebase, fix caching in bit17_require, changes according > to Zbigniew review: simplify cache of !gem_has_llc, drop > multiprocess start/stop, use ALLOC_STRATEGY_HIGH_TO_LOW, > correct offset and flags > v4: corrected alloc_open and first ahnd setting > > Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> > Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> > --- > tests/i915/gem_concurrent_all.c | 165 +++++++++++++++++++++++++++----- > 1 file changed, 142 insertions(+), 23 deletions(-) > > diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c > index d0f9b62e..d17c19fc 100644 > --- a/tests/i915/gem_concurrent_all.c > +++ b/tests/i915/gem_concurrent_all.c > @@ -60,6 +60,7 @@ int fd, devid, gen; > int vgem_drv = -1; > int all; > int pass; > +uint64_t ahnd; > > struct create { > const char *name; > @@ -239,8 +240,16 @@ unmapped_create_bo(const struct buffers *b) > > static void create_snoop_require(const struct create *create, unsigned count) > { > + static bool check_llc = true; > + static bool has_snoop; > + > create_cpu_require(create, count); > - igt_require(!gem_has_llc(fd)); > + if (check_llc) { > + has_snoop = !gem_has_llc(fd); > + check_llc = false; > + } > + > + igt_require(has_snoop); > } > > static struct intel_buf * > @@ -249,7 +258,7 @@ snoop_create_bo(const struct buffers *b) > struct intel_buf *buf; > > buf = unmapped_create_bo(b); > - gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); > + __gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); > > return buf; > } > @@ -578,16 +587,32 @@ static void bit17_require(void) > uint32_t swizzle_mode; > uint32_t phys_swizzle_mode; > } arg; > + static bool has_tiling2; > #define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) > > if (arg.handle == 0) { > + bool has_tiling; > + int err; > + > + has_tiling2 = false; > arg.handle = gem_create(fd, 4096); > - gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); > + err = __gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); > + if (!err) { > + has_tiling = true; > + igt_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); > + if (!errno) > + has_tiling2 = true; > + > + errno = 0; > + } else { > + has_tiling = false; > + } > > - do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); > gem_close(fd, arg.handle); > + igt_require(has_tiling); > } > igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); > + igt_require(has_tiling2); I think you can simplify this to: if (arg.handle == 0) { int err; arg.handle = gem_create(fd, 4096); err = __gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); igt_require(!err); igt_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); gem_close(fd, arg.handle); } igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); If first set_tiling() is failing we can immediate skip. But if we can set-tiling on bo then after get-tiling2 swizzle mode must be same. Maybe someone will complain on igt_require(!err), but imo looking at set-tiling it is clear - we need to support this, if not test can be skipped. > } > > static void wc_require(void) > @@ -670,11 +695,21 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > struct drm_i915_gem_exec_object2 gem_exec[2]; > struct drm_i915_gem_execbuffer2 execbuf; > uint32_t tmp[10], *b; > + uint64_t addr = 0; > > memset(reloc, 0, sizeof(reloc)); > memset(gem_exec, 0, sizeof(gem_exec)); > memset(&execbuf, 0, sizeof(execbuf)); > > + if (ahnd) { > + addr = buf->addr.offset; > + if (INVALID_ADDR(addr)) { > + addr = intel_allocator_alloc(buffers->ibb->allocator_handle, > + buf->handle, buf->size, 0); > + buf->addr.offset = addr; > + } > + } > + > b = tmp; > *b++ = XY_COLOR_BLT_CMD_NOLEN | > ((gen >= 8) ? 5 : 4) | > @@ -691,9 +726,9 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > reloc[0].target_handle = buf->handle; > reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; > reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; > - *b++ = 0; > + *b++ = addr; > if (gen >= 8) > - *b++ = 0; > + *b++ = addr >> 32; > *b++ = val; > *b++ = MI_BATCH_BUFFER_END; > if ((b - tmp) & 1) > @@ -703,8 +738,19 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE; > > gem_exec[1].handle = gem_create(fd, 4096); > - gem_exec[1].relocation_count = 1; > - gem_exec[1].relocs_ptr = to_user_pointer(reloc); > + if (!ahnd) { > + gem_exec[1].relocation_count = 1; > + gem_exec[1].relocs_ptr = to_user_pointer(reloc); > + } else { > + gem_exec[1].offset = CANONICAL(intel_allocator_alloc(ahnd, > + gem_exec[1].handle, > + 4096, 0)); > + gem_exec[1].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS; > + > + gem_exec[0].offset = CANONICAL(buf->addr.offset); > + gem_exec[0].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE | > + EXEC_OBJECT_SUPPORTS_48B_ADDRESS; > + } > > execbuf.buffers_ptr = to_user_pointer(gem_exec); > execbuf.buffer_count = 2; > @@ -716,6 +762,7 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > gem_execbuf(fd, &execbuf); > > gem_close(fd, gem_exec[1].handle); > + put_offset(ahnd, gem_exec[1].handle); > } > > static void > @@ -766,6 +813,18 @@ static bool set_max_map_count(int num_buffers) > return max > num_buffers; > } > > +static uint64_t alloc_open(void) > +{ > + return ahnd ? intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, > + ALLOC_STRATEGY_HIGH_TO_LOW, 0) : 0; > +} > + > +static struct intel_bb *bb_create(int i915, uint32_t size) > +{ > + return ahnd ? intel_bb_create_no_relocs(i915, size) : > + intel_bb_create_with_relocs(i915, size); > +} > + > static void buffers_init(struct buffers *b, > const char *name, > const struct create *create, > @@ -796,7 +855,7 @@ static void buffers_init(struct buffers *b, > igt_assert(b->src); > b->dst = b->src + num_buffers; > > - b->ibb = intel_bb_create(_fd, 4096); > + b->ibb = bb_create(_fd, 4096); > } > > static void buffers_destroy(struct buffers *b) > @@ -829,6 +888,27 @@ static void buffers_destroy(struct buffers *b) > } > } > > +static void bb_destroy(struct buffers *b) > +{ > + if (b->ibb) { > + intel_bb_destroy(b->ibb); > + b->ibb = NULL; > + } > +} > + > +static void __bufs_destroy(struct buffers *b) > +{ > + buffers_destroy(b); > + if (b->ibb) { > + intel_bb_destroy(b->ibb); > + b->ibb = NULL; > + } > + if (b->bops) { > + buf_ops_destroy(b->bops); > + b->bops = NULL; > + } > +} > + > static void buffers_create(struct buffers *b) > { > int count = b->num_buffers; > @@ -838,32 +918,57 @@ static void buffers_create(struct buffers *b) > igt_assert(b->count == 0); > b->count = count; > > + ahnd = alloc_open(); > for (int i = 0; i < count; i++) { > b->src[i] = b->mode->create_bo(b); > b->dst[i] = b->mode->create_bo(b); > } > b->spare = b->mode->create_bo(b); > b->snoop = snoop_create_bo(b); > + if (b->ibb) > + intel_bb_destroy(b->ibb); > + > + b->ibb = bb_create(fd, 4096); > } > > static void buffers_reset(struct buffers *b) > { > b->bops = buf_ops_create(fd); > - b->ibb = intel_bb_create(fd, 4096); > + b->ibb = bb_create(fd, 4096); > +} > + > +static void __buffers_create(struct buffers *b) > +{ > + b->bops = buf_ops_create(fd); > + igt_assert(b->bops); > + igt_assert(b->num_buffers > 0); > + igt_assert(b->mode); > + igt_assert(b->mode->create_bo); > + > + b->count = 0; > + for (int i = 0; i < b->num_buffers; i++) { > + b->src[i] = b->mode->create_bo(b); > + b->dst[i] = b->mode->create_bo(b); > + } > + b->count = b->num_buffers; > + b->spare = b->mode->create_bo(b); > + b->snoop = snoop_create_bo(b); > + ahnd = alloc_open(); > + b->ibb = bb_create(fd, 4096); > } > > static void buffers_fini(struct buffers *b) > { > if (b->bops == NULL) > return; > - > buffers_destroy(b); > > free(b->tmp); > free(b->src); > - > - intel_bb_destroy(b->ibb); > - buf_ops_destroy(b->bops); > + if (b->ibb) > + intel_bb_destroy(b->ibb); > + if (b->bops) > + buf_ops_destroy(b->bops); > > memset(b, 0, sizeof(*b)); > } > @@ -1306,6 +1411,8 @@ static void run_single(struct buffers *buffers, > do_hang do_hang_func) > { > pass = 0; > + bb_destroy(buffers); > + buffers->ibb = bb_create(fd, 4096); > do_test_func(buffers, do_copy_func, do_hang_func); > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > } > @@ -1316,6 +1423,8 @@ static void run_interruptible(struct buffers *buffers, > do_hang do_hang_func) > { > pass = 0; > + bb_destroy(buffers); > + buffers->ibb = bb_create(fd, 4096); > igt_while_interruptible(true) > do_test_func(buffers, do_copy_func, do_hang_func); > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > @@ -1332,10 +1441,18 @@ static void run_child(struct buffers *buffers, > * leading to the child closing an object without the parent knowing. > */ > pass = 0; > - igt_fork(child, 1) > + __bufs_destroy(buffers); > + > + igt_fork(child, 1) { > + /* recreate process local variables */ > + intel_allocator_init(); > + __buffers_create(buffers); > do_test_func(buffers, do_copy_func, do_hang_func); > + } > igt_waitchildren(); > + > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > + buffers_reset(buffers); > } > > static void __run_forked(struct buffers *buffers, > @@ -1346,24 +1463,20 @@ static void __run_forked(struct buffers *buffers, > > { > /* purge the caches before cloing the process */ > - buffers_destroy(buffers); > - intel_bb_destroy(buffers->ibb); > - buf_ops_destroy(buffers->bops); > + __bufs_destroy(buffers); > > igt_fork(child, num_children) { > int num_buffers; > > /* recreate process local variables */ > fd = gem_reopen_driver(fd); > - > + intel_allocator_init(); //detach from thread We agreed to use C-style comments, so change to /* */ or remove. > num_buffers = buffers->num_buffers / num_children; > num_buffers += MIN_BUFFERS; > if (num_buffers < buffers->num_buffers) > buffers->num_buffers = num_buffers; > > - buffers_reset(buffers); > - buffers_create(buffers); > - > + __buffers_create(buffers); > igt_while_interruptible(interrupt) { > for (pass = 0; pass < loops; pass++) > do_test_func(buffers, > @@ -1773,6 +1886,7 @@ igt_main > { "16MiB", 2048, 2048 }, > { NULL} > }; > + > uint64_t pin_sz = 0; > void *pinned = NULL; > char name[80]; > @@ -1792,6 +1906,12 @@ igt_main > rendercopy = igt_get_render_copyfunc(devid); > > vgem_drv = __drm_open_driver(DRIVER_VGEM); > + > + ahnd = intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, > + ALLOC_STRATEGY_HIGH_TO_LOW, 0); > + put_ahnd(ahnd); > + if (ahnd) > + intel_bb_track(true); > } > > for (const struct create *c = create; c->name; c++) { > @@ -1864,7 +1984,6 @@ igt_main > igt_fixture > igt_stop_shrink_helper(); > } > - > /* Use the entire mappable aperture, force swapping */ > snprintf(name, sizeof(name), "%s%s-%s", > c->name, s->name, "swap"); > -- > 2.32.0 > Other things looks fine for me. Please change above and I'm going to merge this. -- Zbigniew ^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc @ 2022-02-24 13:04 Kamil Konieczny 2022-02-24 13:04 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny 0 siblings, 1 reply; 16+ messages in thread From: Kamil Konieczny @ 2022-02-24 13:04 UTC (permalink / raw) To: igt-dev Add noreloc mode for GPU gens without relocations. Also while at this, add some caching for required properties. Change also snoop function so it will work on DG1. Cc: "Zbigniew Kempczyński" <zbigniew.kempczynski@intel.com> Kamil Konieczny (2): lib/intel_batchbuffer: add create without relocs tests/i915/gem_concurrent_all: Add no-reloc capability lib/intel_batchbuffer.c | 9 +- lib/intel_batchbuffer.h | 1 + tests/i915/gem_concurrent_all.c | 162 +++++++++++++++++++++++++++----- 3 files changed, 148 insertions(+), 24 deletions(-) -- 2.32.0 ^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability 2022-02-24 13:04 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny @ 2022-02-24 13:04 ` Kamil Konieczny 2022-03-22 19:34 ` Zbigniew Kempczyński 0 siblings, 1 reply; 16+ messages in thread From: Kamil Konieczny @ 2022-02-24 13:04 UTC (permalink / raw) To: igt-dev Add noreloc mode for GPU gens without relocations. Also while at this, add some caching for required properties. Change also snoop function so it will work on DG1. v4: corrected alloc_open and first ahnd setting Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> --- tests/i915/gem_concurrent_all.c | 162 +++++++++++++++++++++++++++----- 1 file changed, 139 insertions(+), 23 deletions(-) diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c index d0f9b62e..24009da4 100644 --- a/tests/i915/gem_concurrent_all.c +++ b/tests/i915/gem_concurrent_all.c @@ -60,6 +60,7 @@ int fd, devid, gen; int vgem_drv = -1; int all; int pass; +uint64_t ahnd; struct create { const char *name; @@ -239,8 +240,16 @@ unmapped_create_bo(const struct buffers *b) static void create_snoop_require(const struct create *create, unsigned count) { + static bool check_llc = true; + static bool has_snoop; + create_cpu_require(create, count); - igt_require(!gem_has_llc(fd)); + if (check_llc) { + has_snoop = !gem_has_llc(fd); + check_llc = false; + igt_require(!gem_has_llc(fd)); + } else + igt_require(has_snoop); } static struct intel_buf * @@ -249,7 +258,7 @@ snoop_create_bo(const struct buffers *b) struct intel_buf *buf; buf = unmapped_create_bo(b); - gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); + __gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); return buf; } @@ -578,16 +587,27 @@ static void bit17_require(void) uint32_t swizzle_mode; uint32_t phys_swizzle_mode; } arg; + bool has_tiling2; + int has_tiling; #define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) if (arg.handle == 0) { + has_tiling2 = false; arg.handle = gem_create(fd, 4096); - gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); + has_tiling = __gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); + if (!has_tiling) { + igt_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); + if (!errno) + has_tiling2 = true; + + errno = 0; + } - do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); gem_close(fd, arg.handle); + igt_require(has_tiling); } igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); + igt_require(has_tiling2); } static void wc_require(void) @@ -670,11 +690,21 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) struct drm_i915_gem_exec_object2 gem_exec[2]; struct drm_i915_gem_execbuffer2 execbuf; uint32_t tmp[10], *b; + uint64_t addr = 0; memset(reloc, 0, sizeof(reloc)); memset(gem_exec, 0, sizeof(gem_exec)); memset(&execbuf, 0, sizeof(execbuf)); + if (ahnd) { + addr = buf->addr.offset; + if (INVALID_ADDR(addr)) { + addr = intel_allocator_alloc(buffers->ibb->allocator_handle, + buf->handle, buf->size, 0); + buf->addr.offset = addr; + } + } + b = tmp; *b++ = XY_COLOR_BLT_CMD_NOLEN | ((gen >= 8) ? 5 : 4) | @@ -691,9 +721,9 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) reloc[0].target_handle = buf->handle; reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; - *b++ = 0; + *b++ = addr; if (gen >= 8) - *b++ = 0; + *b++ = addr >> 32; *b++ = val; *b++ = MI_BATCH_BUFFER_END; if ((b - tmp) & 1) @@ -703,8 +733,17 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE; gem_exec[1].handle = gem_create(fd, 4096); - gem_exec[1].relocation_count = 1; - gem_exec[1].relocs_ptr = to_user_pointer(reloc); + if (!ahnd) { + gem_exec[1].relocation_count = 1; + gem_exec[1].relocs_ptr = to_user_pointer(reloc); + } else { + gem_exec[1].offset = intel_allocator_alloc(ahnd, + gem_exec[1].handle, 4096, 4096); + gem_exec[1].flags |= EXEC_OBJECT_PINNED; + + gem_exec[0].offset = buf->addr.offset; + gem_exec[0].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE; + } execbuf.buffers_ptr = to_user_pointer(gem_exec); execbuf.buffer_count = 2; @@ -716,6 +755,7 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) gem_execbuf(fd, &execbuf); gem_close(fd, gem_exec[1].handle); + put_offset(ahnd, gem_exec[1].handle); } static void @@ -766,6 +806,18 @@ static bool set_max_map_count(int num_buffers) return max > num_buffers; } +static uint64_t alloc_open(void) +{ + return ahnd ? intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, + ALLOC_STRATEGY_LOW_TO_HIGH) : 0; +} + +static struct intel_bb *bb_create(int i915, uint32_t size) +{ + return ahnd ? intel_bb_create_no_relocs(i915, size) : + intel_bb_create_with_relocs(i915, size); +} + static void buffers_init(struct buffers *b, const char *name, const struct create *create, @@ -796,7 +848,7 @@ static void buffers_init(struct buffers *b, igt_assert(b->src); b->dst = b->src + num_buffers; - b->ibb = intel_bb_create(_fd, 4096); + b->ibb = bb_create(_fd, 4096); } static void buffers_destroy(struct buffers *b) @@ -829,6 +881,27 @@ static void buffers_destroy(struct buffers *b) } } +static void bb_destroy(struct buffers *b) +{ + if (b->ibb) { + intel_bb_destroy(b->ibb); + b->ibb = NULL; + } +} + +static void __bufs_destroy(struct buffers *b) +{ + buffers_destroy(b); + if (b->ibb) { + intel_bb_destroy(b->ibb); + b->ibb = NULL; + } + if (b->bops) { + buf_ops_destroy(b->bops); + b->bops = NULL; + } +} + static void buffers_create(struct buffers *b) { int count = b->num_buffers; @@ -838,32 +911,57 @@ static void buffers_create(struct buffers *b) igt_assert(b->count == 0); b->count = count; + ahnd = alloc_open(); for (int i = 0; i < count; i++) { b->src[i] = b->mode->create_bo(b); b->dst[i] = b->mode->create_bo(b); } b->spare = b->mode->create_bo(b); b->snoop = snoop_create_bo(b); + if (b->ibb) + intel_bb_destroy(b->ibb); + + b->ibb = bb_create(fd, 4096); } static void buffers_reset(struct buffers *b) { b->bops = buf_ops_create(fd); - b->ibb = intel_bb_create(fd, 4096); + b->ibb = bb_create(fd, 4096); +} + +static void __buffers_create(struct buffers *b) +{ + b->bops = buf_ops_create(fd); + igt_assert(b->bops); + igt_assert(b->num_buffers > 0); + igt_assert(b->mode); + igt_assert(b->mode->create_bo); + + b->count = 0; + for (int i = 0; i < b->num_buffers; i++) { + b->src[i] = b->mode->create_bo(b); + b->dst[i] = b->mode->create_bo(b); + } + b->count = b->num_buffers; + b->spare = b->mode->create_bo(b); + b->snoop = snoop_create_bo(b); + ahnd = alloc_open(); + b->ibb = bb_create(fd, 4096); } static void buffers_fini(struct buffers *b) { if (b->bops == NULL) return; - buffers_destroy(b); free(b->tmp); free(b->src); - - intel_bb_destroy(b->ibb); - buf_ops_destroy(b->bops); + if (b->ibb) + intel_bb_destroy(b->ibb); + if (b->bops) + buf_ops_destroy(b->bops); memset(b, 0, sizeof(*b)); } @@ -1306,6 +1404,8 @@ static void run_single(struct buffers *buffers, do_hang do_hang_func) { pass = 0; + bb_destroy(buffers); + buffers->ibb = bb_create(fd, 4096); do_test_func(buffers, do_copy_func, do_hang_func); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); } @@ -1316,6 +1416,8 @@ static void run_interruptible(struct buffers *buffers, do_hang do_hang_func) { pass = 0; + bb_destroy(buffers); + buffers->ibb = bb_create(fd, 4096); igt_while_interruptible(true) do_test_func(buffers, do_copy_func, do_hang_func); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); @@ -1332,10 +1434,20 @@ static void run_child(struct buffers *buffers, * leading to the child closing an object without the parent knowing. */ pass = 0; - igt_fork(child, 1) + __bufs_destroy(buffers); + intel_allocator_multiprocess_start(); + + igt_fork(child, 1) { + /* recreate process local variables */ + intel_allocator_init(); + __buffers_create(buffers); do_test_func(buffers, do_copy_func, do_hang_func); + } igt_waitchildren(); + intel_allocator_multiprocess_stop(); + igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); + buffers_reset(buffers); } static void __run_forked(struct buffers *buffers, @@ -1346,24 +1458,21 @@ static void __run_forked(struct buffers *buffers, { /* purge the caches before cloing the process */ - buffers_destroy(buffers); - intel_bb_destroy(buffers->ibb); - buf_ops_destroy(buffers->bops); + __bufs_destroy(buffers); + intel_allocator_multiprocess_start(); igt_fork(child, num_children) { int num_buffers; /* recreate process local variables */ fd = gem_reopen_driver(fd); - + intel_allocator_init(); //detach from thread num_buffers = buffers->num_buffers / num_children; num_buffers += MIN_BUFFERS; if (num_buffers < buffers->num_buffers) buffers->num_buffers = num_buffers; - buffers_reset(buffers); - buffers_create(buffers); - + __buffers_create(buffers); igt_while_interruptible(interrupt) { for (pass = 0; pass < loops; pass++) do_test_func(buffers, @@ -1372,6 +1481,7 @@ static void __run_forked(struct buffers *buffers, } } igt_waitchildren(); + intel_allocator_multiprocess_stop(); igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); buffers_reset(buffers); @@ -1773,6 +1883,7 @@ igt_main { "16MiB", 2048, 2048 }, { NULL} }; + uint64_t pin_sz = 0; void *pinned = NULL; char name[80]; @@ -1792,6 +1903,12 @@ igt_main rendercopy = igt_get_render_copyfunc(devid); vgem_drv = __drm_open_driver(DRIVER_VGEM); + + ahnd = intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, + ALLOC_STRATEGY_LOW_TO_HIGH); + put_ahnd(ahnd); + if (ahnd) + intel_bb_track(true); } for (const struct create *c = create; c->name; c++) { @@ -1864,7 +1981,6 @@ igt_main igt_fixture igt_stop_shrink_helper(); } - /* Use the entire mappable aperture, force swapping */ snprintf(name, sizeof(name), "%s%s-%s", c->name, s->name, "swap"); -- 2.32.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability 2022-02-24 13:04 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny @ 2022-03-22 19:34 ` Zbigniew Kempczyński 0 siblings, 0 replies; 16+ messages in thread From: Zbigniew Kempczyński @ 2022-03-22 19:34 UTC (permalink / raw) To: Kamil Konieczny; +Cc: igt-dev On Thu, Feb 24, 2022 at 02:04:44PM +0100, Kamil Konieczny wrote: > Add noreloc mode for GPU gens without relocations. Also > while at this, add some caching for required properties. > Change also snoop function so it will work on DG1. > > v4: corrected alloc_open and first ahnd setting > > Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> > Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> > --- > tests/i915/gem_concurrent_all.c | 162 +++++++++++++++++++++++++++----- > 1 file changed, 139 insertions(+), 23 deletions(-) > > diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c > index d0f9b62e..24009da4 100644 > --- a/tests/i915/gem_concurrent_all.c > +++ b/tests/i915/gem_concurrent_all.c > @@ -60,6 +60,7 @@ int fd, devid, gen; > int vgem_drv = -1; > int all; > int pass; > +uint64_t ahnd; > > struct create { > const char *name; > @@ -239,8 +240,16 @@ unmapped_create_bo(const struct buffers *b) > > static void create_snoop_require(const struct create *create, unsigned count) > { > + static bool check_llc = true; > + static bool has_snoop; > + > create_cpu_require(create, count); > - igt_require(!gem_has_llc(fd)); > + if (check_llc) { > + has_snoop = !gem_has_llc(fd); > + check_llc = false; > + igt_require(!gem_has_llc(fd)); > + } else > + igt_require(has_snoop); > } For this case (gem_concurrent_blit) you may cache - there's no reopening of another device. But be careful for other tests. I think above can be simplified to: if (check_llc) { has_snoop = !gem_has_llc(fd); check_llc = false; } igt_require(has_snoop); > > static struct intel_buf * > @@ -249,7 +258,7 @@ snoop_create_bo(const struct buffers *b) > struct intel_buf *buf; > > buf = unmapped_create_bo(b); > - gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); > + __gem_set_caching(fd, buf->handle, I915_CACHING_CACHED); > > return buf; > } > @@ -578,16 +587,27 @@ static void bit17_require(void) > uint32_t swizzle_mode; > uint32_t phys_swizzle_mode; > } arg; > + bool has_tiling2; > + int has_tiling; > #define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) > > if (arg.handle == 0) { > + has_tiling2 = false; > arg.handle = gem_create(fd, 4096); > - gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); > + has_tiling = __gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); > + if (!has_tiling) { > + igt_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); > + if (!errno) > + has_tiling2 = true; > + > + errno = 0; > + } > > - do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg); > gem_close(fd, arg.handle); > + igt_require(has_tiling); > } > igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); > + igt_require(has_tiling2); > } > > static void wc_require(void) > @@ -670,11 +690,21 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > struct drm_i915_gem_exec_object2 gem_exec[2]; > struct drm_i915_gem_execbuffer2 execbuf; > uint32_t tmp[10], *b; > + uint64_t addr = 0; > > memset(reloc, 0, sizeof(reloc)); > memset(gem_exec, 0, sizeof(gem_exec)); > memset(&execbuf, 0, sizeof(execbuf)); > > + if (ahnd) { > + addr = buf->addr.offset; > + if (INVALID_ADDR(addr)) { > + addr = intel_allocator_alloc(buffers->ibb->allocator_handle, > + buf->handle, buf->size, 0); > + buf->addr.offset = addr; > + } > + } > + > b = tmp; > *b++ = XY_COLOR_BLT_CMD_NOLEN | > ((gen >= 8) ? 5 : 4) | > @@ -691,9 +721,9 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > reloc[0].target_handle = buf->handle; > reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; > reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; > - *b++ = 0; > + *b++ = addr; > if (gen >= 8) > - *b++ = 0; > + *b++ = addr >> 32; > *b++ = val; > *b++ = MI_BATCH_BUFFER_END; > if ((b - tmp) & 1) > @@ -703,8 +733,17 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE; > > gem_exec[1].handle = gem_create(fd, 4096); It is tempting place to use gem_create_from_pool() call. > - gem_exec[1].relocation_count = 1; > - gem_exec[1].relocs_ptr = to_user_pointer(reloc); > + if (!ahnd) { > + gem_exec[1].relocation_count = 1; > + gem_exec[1].relocs_ptr = to_user_pointer(reloc); > + } else { > + gem_exec[1].offset = intel_allocator_alloc(ahnd, > + gem_exec[1].handle, 4096, 4096); Use 0 as last argument - allocator will use safe alignment and we won't get surprises. > + gem_exec[1].flags |= EXEC_OBJECT_PINNED; > + > + gem_exec[0].offset = buf->addr.offset; > + gem_exec[0].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE; > + } Use CANONICAL() + EXEC_OBJECT_SUPPORTS_48B_ADDRESS and it is HIGH_TO_LOW ready. > > execbuf.buffers_ptr = to_user_pointer(gem_exec); > execbuf.buffer_count = 2; > @@ -716,6 +755,7 @@ gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val) > gem_execbuf(fd, &execbuf); > > gem_close(fd, gem_exec[1].handle); > + put_offset(ahnd, gem_exec[1].handle); > } > > static void > @@ -766,6 +806,18 @@ static bool set_max_map_count(int num_buffers) > return max > num_buffers; > } > > +static uint64_t alloc_open(void) > +{ > + return ahnd ? intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, > + ALLOC_STRATEGY_LOW_TO_HIGH) : 0; HIGH_TO_LOW. > +} > + > +static struct intel_bb *bb_create(int i915, uint32_t size) > +{ > + return ahnd ? intel_bb_create_no_relocs(i915, size) : > + intel_bb_create_with_relocs(i915, size); > +} > + > static void buffers_init(struct buffers *b, > const char *name, > const struct create *create, > @@ -796,7 +848,7 @@ static void buffers_init(struct buffers *b, > igt_assert(b->src); > b->dst = b->src + num_buffers; > > - b->ibb = intel_bb_create(_fd, 4096); > + b->ibb = bb_create(_fd, 4096); > } > > static void buffers_destroy(struct buffers *b) > @@ -829,6 +881,27 @@ static void buffers_destroy(struct buffers *b) > } > } > > +static void bb_destroy(struct buffers *b) > +{ > + if (b->ibb) { > + intel_bb_destroy(b->ibb); > + b->ibb = NULL; > + } > +} > + > +static void __bufs_destroy(struct buffers *b) > +{ > + buffers_destroy(b); > + if (b->ibb) { > + intel_bb_destroy(b->ibb); > + b->ibb = NULL; > + } > + if (b->bops) { > + buf_ops_destroy(b->bops); > + b->bops = NULL; > + } > +} > + > static void buffers_create(struct buffers *b) > { > int count = b->num_buffers; > @@ -838,32 +911,57 @@ static void buffers_create(struct buffers *b) > igt_assert(b->count == 0); > b->count = count; > > + ahnd = alloc_open(); > for (int i = 0; i < count; i++) { > b->src[i] = b->mode->create_bo(b); > b->dst[i] = b->mode->create_bo(b); > } > b->spare = b->mode->create_bo(b); > b->snoop = snoop_create_bo(b); > + if (b->ibb) > + intel_bb_destroy(b->ibb); > + > + b->ibb = bb_create(fd, 4096); > } > > static void buffers_reset(struct buffers *b) > { > b->bops = buf_ops_create(fd); > - b->ibb = intel_bb_create(fd, 4096); > + b->ibb = bb_create(fd, 4096); > +} > + > +static void __buffers_create(struct buffers *b) > +{ > + b->bops = buf_ops_create(fd); > + igt_assert(b->bops); > + igt_assert(b->num_buffers > 0); > + igt_assert(b->mode); > + igt_assert(b->mode->create_bo); > + > + b->count = 0; > + for (int i = 0; i < b->num_buffers; i++) { > + b->src[i] = b->mode->create_bo(b); > + b->dst[i] = b->mode->create_bo(b); > + } > + b->count = b->num_buffers; > + b->spare = b->mode->create_bo(b); > + b->snoop = snoop_create_bo(b); > + ahnd = alloc_open(); > + b->ibb = bb_create(fd, 4096); > } > > static void buffers_fini(struct buffers *b) > { > if (b->bops == NULL) > return; > - > buffers_destroy(b); > > free(b->tmp); > free(b->src); > - > - intel_bb_destroy(b->ibb); > - buf_ops_destroy(b->bops); > + if (b->ibb) > + intel_bb_destroy(b->ibb); > + if (b->bops) > + buf_ops_destroy(b->bops); > > memset(b, 0, sizeof(*b)); > } > @@ -1306,6 +1404,8 @@ static void run_single(struct buffers *buffers, > do_hang do_hang_func) > { > pass = 0; > + bb_destroy(buffers); > + buffers->ibb = bb_create(fd, 4096); > do_test_func(buffers, do_copy_func, do_hang_func); > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > } > @@ -1316,6 +1416,8 @@ static void run_interruptible(struct buffers *buffers, > do_hang do_hang_func) > { > pass = 0; > + bb_destroy(buffers); > + buffers->ibb = bb_create(fd, 4096); > igt_while_interruptible(true) > do_test_func(buffers, do_copy_func, do_hang_func); > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > @@ -1332,10 +1434,20 @@ static void run_child(struct buffers *buffers, > * leading to the child closing an object without the parent knowing. > */ > pass = 0; > - igt_fork(child, 1) > + __bufs_destroy(buffers); > + intel_allocator_multiprocess_start(); Imo you don't need to create multiprocess infra as you're initializing standalone allocator within child. > + > + igt_fork(child, 1) { > + /* recreate process local variables */ > + intel_allocator_init(); > + __buffers_create(buffers); > do_test_func(buffers, do_copy_func, do_hang_func); > + } > igt_waitchildren(); > + intel_allocator_multiprocess_stop(); Same here. > + > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > + buffers_reset(buffers); > } > > static void __run_forked(struct buffers *buffers, > @@ -1346,24 +1458,21 @@ static void __run_forked(struct buffers *buffers, > > { > /* purge the caches before cloing the process */ > - buffers_destroy(buffers); > - intel_bb_destroy(buffers->ibb); > - buf_ops_destroy(buffers->bops); > + __bufs_destroy(buffers); > + intel_allocator_multiprocess_start(); Same here. > > igt_fork(child, num_children) { > int num_buffers; > > /* recreate process local variables */ > fd = gem_reopen_driver(fd); > - > + intel_allocator_init(); //detach from thread > num_buffers = buffers->num_buffers / num_children; > num_buffers += MIN_BUFFERS; > if (num_buffers < buffers->num_buffers) > buffers->num_buffers = num_buffers; > > - buffers_reset(buffers); > - buffers_create(buffers); > - > + __buffers_create(buffers); > igt_while_interruptible(interrupt) { > for (pass = 0; pass < loops; pass++) > do_test_func(buffers, > @@ -1372,6 +1481,7 @@ static void __run_forked(struct buffers *buffers, > } > } > igt_waitchildren(); > + intel_allocator_multiprocess_stop(); And here. > igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); > > buffers_reset(buffers); > @@ -1773,6 +1883,7 @@ igt_main > { "16MiB", 2048, 2048 }, > { NULL} > }; > + > uint64_t pin_sz = 0; > void *pinned = NULL; > char name[80]; > @@ -1792,6 +1903,12 @@ igt_main > rendercopy = igt_get_render_copyfunc(devid); > > vgem_drv = __drm_open_driver(DRIVER_VGEM); > + > + ahnd = intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, > + ALLOC_STRATEGY_LOW_TO_HIGH); Keep HIGH_TO_LOW. Anyway - changes you did work for me, but I would like to keep intel-bb intact (high-to-low strategy). -- Zbigniew > + put_ahnd(ahnd); > + if (ahnd) > + intel_bb_track(true); > } > > for (const struct create *c = create; c->name; c++) { > @@ -1864,7 +1981,6 @@ igt_main > igt_fixture > igt_stop_shrink_helper(); > } > - > /* Use the entire mappable aperture, force swapping */ > snprintf(name, sizeof(name), "%s%s-%s", > c->name, s->name, "swap"); > -- > 2.32.0 > ^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2022-03-29 14:17 UTC | newest] Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-03-28 16:55 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny 2022-03-28 16:55 ` [igt-dev] [PATCH i-g-t 1/2] lib/intel_batchbuffer: add create without relocs Kamil Konieczny 2022-03-29 8:01 ` Zbigniew Kempczyński 2022-03-28 16:55 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny 2022-03-29 8:10 ` Zbigniew Kempczyński 2022-03-29 12:56 ` Kamil Konieczny 2022-03-28 18:46 ` [igt-dev] ✓ Fi.CI.BAT: success for i915/gem_concurrent_all: Add no-reloc (rev4) Patchwork 2022-03-28 21:34 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork -- strict thread matches above, loose matches on Subject: below -- 2022-03-29 14:17 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny 2022-03-29 14:17 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny 2022-03-29 13:49 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny 2022-03-29 13:49 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny 2022-03-28 8:31 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny 2022-03-28 8:31 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny 2022-03-28 12:33 ` Zbigniew Kempczyński 2022-03-24 14:19 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny 2022-03-24 14:19 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny 2022-03-28 6:41 ` Zbigniew Kempczyński 2022-02-24 13:04 [igt-dev] [PATCH i-g-t 0/2] i915/gem_concurrent_all: Add no-reloc Kamil Konieczny 2022-02-24 13:04 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_concurrent_all: Add no-reloc capability Kamil Konieczny 2022-03-22 19:34 ` Zbigniew Kempczyński
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