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From: Conor Dooley <conor.dooley@microchip.com>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>, <linux-kernel@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>, <daire.mcnamara@microchip.com>,
	<lewis.hanly@microchip.com>, <cyril.jean@microchip.com>,
	Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v2 1/4] riscv: select peripheral drivers for polarfire soc
Date: Thu, 21 Apr 2022 09:58:03 +0100	[thread overview]
Message-ID: <20220421085805.1220195-2-conor.dooley@microchip.com> (raw)
In-Reply-To: <20220421085805.1220195-1-conor.dooley@microchip.com>

Update the SOC_MICROCHIP_POLARFIRE kconfig entry to select, where
applicable, the supported drivers for the SoC.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/Kconfig.socs | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 34592d00dde8..7f93c729d51c 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -3,6 +3,10 @@ menu "SoC selection"
 config SOC_MICROCHIP_POLARFIRE
 	bool "Microchip PolarFire SoCs"
 	select MCHP_CLK_MPFS
+	select POLARFIRE_SOC_MAILBOX if MAILBOX
+	select POLARFIRE_SOC_SYS_CTRL if MAILBOX
+	select HW_RANDOM_POLARFIRE_SOC if POLARFIRE_SOC_SYS_CTRL
+	select PCIE_MICROCHIP_HOST if PCI_MSI && OF
 	select SIFIVE_PLIC
 	help
 	  This enables support for Microchip PolarFire SoC platforms.
-- 
2.35.2


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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor.dooley@microchip.com>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>, <linux-kernel@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>, <daire.mcnamara@microchip.com>,
	<lewis.hanly@microchip.com>, <cyril.jean@microchip.com>,
	Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v2 1/4] riscv: select peripheral drivers for polarfire soc
Date: Thu, 21 Apr 2022 09:58:03 +0100	[thread overview]
Message-ID: <20220421085805.1220195-2-conor.dooley@microchip.com> (raw)
In-Reply-To: <20220421085805.1220195-1-conor.dooley@microchip.com>

Update the SOC_MICROCHIP_POLARFIRE kconfig entry to select, where
applicable, the supported drivers for the SoC.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/Kconfig.socs | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 34592d00dde8..7f93c729d51c 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -3,6 +3,10 @@ menu "SoC selection"
 config SOC_MICROCHIP_POLARFIRE
 	bool "Microchip PolarFire SoCs"
 	select MCHP_CLK_MPFS
+	select POLARFIRE_SOC_MAILBOX if MAILBOX
+	select POLARFIRE_SOC_SYS_CTRL if MAILBOX
+	select HW_RANDOM_POLARFIRE_SOC if POLARFIRE_SOC_SYS_CTRL
+	select PCIE_MICROCHIP_HOST if PCI_MSI && OF
 	select SIFIVE_PLIC
 	help
 	  This enables support for Microchip PolarFire SoC platforms.
-- 
2.35.2


  reply	other threads:[~2022-04-21  8:59 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-21  8:58 [PATCH v2 0/4] polarfire soc kconfig/maintainers updates Conor Dooley
2022-04-21  8:58 ` Conor Dooley
2022-04-21  8:58 ` Conor Dooley [this message]
2022-04-21  8:58   ` [PATCH v2 1/4] riscv: select peripheral drivers for polarfire soc Conor Dooley
2022-04-21  8:58 ` [PATCH v2 2/4] riscv: config: enable the mailbox framework Conor Dooley
2022-04-21  8:58   ` Conor Dooley
2022-04-21  8:58 ` [PATCH v2 3/4] riscv: select vitesse phy driver for polarfire soc Conor Dooley
2022-04-21  8:58   ` Conor Dooley
2022-04-22  0:18   ` kernel test robot
2022-04-22  0:18     ` kernel test robot
2022-04-22  1:29   ` kernel test robot
2022-04-22  1:29     ` kernel test robot
2022-04-21  8:58 ` [PATCH v2 4/4] MAINTAINERS: add polarfire rng, pci and clock drivers Conor Dooley
2022-04-21  8:58   ` Conor Dooley

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