From: Matt Roper <matthew.d.roper@intel.com> To: intel-gfx@lists.freedesktop.org Cc: Lucas De Marchi <lucas.demarchi@intel.com>, dri-devel@lists.freedesktop.org Subject: [PATCH 0/2] i915: Turn on compute engine support Date: Fri, 22 Apr 2022 12:50:05 -0700 [thread overview] Message-ID: <20220422195007.4019661-1-matthew.d.roper@intel.com> (raw) Now that the necessary GuC-based hardware workarounds have landed, we're finally ready to actually enable compute engines for use by userspace. All of the "under-the-hood" heavy lifting already landed a while back in other series so all that remains now is to add I915_ENGINE_CLASS_COMPUTE to the uapi enum and add the CCS engines to the engine lists for the Xe_HP SDV and DG2. Userspace (both Mesa and compute drivers) are linked in the ABI patch. Existing IGT tests (e.g., i915_hangman) provide test coverage for general engine behavior since compute engines should follow the same general rules as other engines. We've also recently added some additional subtests like igt@gem_reset_stats@shared-reset-domain to cover the user-visible impacts of the compute engines sharing the same hardware reset domain as the render engine. Cc: Lucas De Marchi <lucas.demarchi@intel.com> Daniele Ceraolo Spurio (1): drm/i915: Xe_HP SDV and DG2 have up to 4 CCS engines Matt Roper (1): drm/i915/xehp: Add compute engine ABI drivers/gpu/drm/i915/gt/intel_engine_user.c | 2 +- drivers/gpu/drm/i915/gt/intel_gt.c | 1 + drivers/gpu/drm/i915/i915_drm_client.c | 1 + drivers/gpu/drm/i915/i915_drm_client.h | 2 +- drivers/gpu/drm/i915/i915_pci.c | 6 +- include/uapi/drm/i915_drm.h | 62 +++++++++++++++++++-- 6 files changed, 64 insertions(+), 10 deletions(-) -- 2.35.1
WARNING: multiple messages have this Message-ID (diff)
From: Matt Roper <matthew.d.roper@intel.com> To: intel-gfx@lists.freedesktop.org Cc: Lucas De Marchi <lucas.demarchi@intel.com>, dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 0/2] i915: Turn on compute engine support Date: Fri, 22 Apr 2022 12:50:05 -0700 [thread overview] Message-ID: <20220422195007.4019661-1-matthew.d.roper@intel.com> (raw) Now that the necessary GuC-based hardware workarounds have landed, we're finally ready to actually enable compute engines for use by userspace. All of the "under-the-hood" heavy lifting already landed a while back in other series so all that remains now is to add I915_ENGINE_CLASS_COMPUTE to the uapi enum and add the CCS engines to the engine lists for the Xe_HP SDV and DG2. Userspace (both Mesa and compute drivers) are linked in the ABI patch. Existing IGT tests (e.g., i915_hangman) provide test coverage for general engine behavior since compute engines should follow the same general rules as other engines. We've also recently added some additional subtests like igt@gem_reset_stats@shared-reset-domain to cover the user-visible impacts of the compute engines sharing the same hardware reset domain as the render engine. Cc: Lucas De Marchi <lucas.demarchi@intel.com> Daniele Ceraolo Spurio (1): drm/i915: Xe_HP SDV and DG2 have up to 4 CCS engines Matt Roper (1): drm/i915/xehp: Add compute engine ABI drivers/gpu/drm/i915/gt/intel_engine_user.c | 2 +- drivers/gpu/drm/i915/gt/intel_gt.c | 1 + drivers/gpu/drm/i915/i915_drm_client.c | 1 + drivers/gpu/drm/i915/i915_drm_client.h | 2 +- drivers/gpu/drm/i915/i915_pci.c | 6 +- include/uapi/drm/i915_drm.h | 62 +++++++++++++++++++-- 6 files changed, 64 insertions(+), 10 deletions(-) -- 2.35.1
next reply other threads:[~2022-04-22 19:50 UTC|newest] Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-04-22 19:50 Matt Roper [this message] 2022-04-22 19:50 ` [Intel-gfx] [PATCH 0/2] i915: Turn on compute engine support Matt Roper 2022-04-22 19:50 ` [PATCH 1/2] drm/i915/xehp: Add compute engine ABI Matt Roper 2022-04-22 19:50 ` [Intel-gfx] " Matt Roper 2022-04-25 10:41 ` Tvrtko Ursulin 2022-04-25 10:41 ` [Intel-gfx] " Tvrtko Ursulin 2022-04-25 17:35 ` Matt Roper 2022-04-25 17:35 ` [Intel-gfx] " Matt Roper 2022-04-25 18:40 ` Yang, Fei 2022-04-25 18:40 ` [Intel-gfx] " Yang, Fei 2022-04-26 7:25 ` Tvrtko Ursulin 2022-04-26 7:25 ` [Intel-gfx] " Tvrtko Ursulin 2022-04-28 0:27 ` Kumar Valsan, Prathap 2022-04-28 3:44 ` Matt Roper 2022-04-28 3:44 ` [Intel-gfx] " Matt Roper 2022-04-25 14:48 ` Andi Shyti 2022-04-22 19:50 ` [PATCH 2/2] drm/i915: Xe_HP SDV and DG2 have up to 4 CCS engines Matt Roper 2022-04-22 19:50 ` [Intel-gfx] " Matt Roper 2022-04-25 14:48 ` Andi Shyti 2022-04-22 20:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: Turn on compute engine support Patchwork 2022-04-22 20:47 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork 2022-04-22 21:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: Turn on compute engine support (rev2) Patchwork 2022-04-22 22:07 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork 2022-04-22 22:33 ` Matt Roper 2022-04-22 23:02 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: Turn on compute engine support (rev3) Patchwork 2022-04-22 23:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2022-04-23 1:18 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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