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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH v4 11/45] target/arm: Store cpregs key in the hash table directly
Date: Sat, 30 Apr 2022 22:49:53 -0700	[thread overview]
Message-ID: <20220501055028.646596-12-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220501055028.646596-1-richard.henderson@linaro.org>

Cast the uint32_t key into a gpointer directly, which
allows us to avoid allocating storage for each key.

Use g_hash_table_lookup when we already have a gpointer
(e.g. for callbacks like count_cpreg), or when using
get_arm_cp_reginfo would require casting away const.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
v4: Adjust usage of functions to match new note above.
---
 target/arm/cpu.c     |  4 ++--
 target/arm/gdbstub.c |  2 +-
 target/arm/helper.c  | 41 ++++++++++++++++++-----------------------
 3 files changed, 21 insertions(+), 26 deletions(-)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 268274ce89..e81d96c3c1 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1088,8 +1088,8 @@ static void arm_cpu_initfn(Object *obj)
     ARMCPU *cpu = ARM_CPU(obj);
 
     cpu_set_cpustate_pointers(cpu);
-    cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal,
-                                         g_free, cpreg_hashtable_data_destroy);
+    cpu->cp_regs = g_hash_table_new_full(g_direct_hash, g_direct_equal,
+                                         NULL, cpreg_hashtable_data_destroy);
 
     QLIST_INIT(&cpu->pre_el_change_hooks);
     QLIST_INIT(&cpu->el_change_hooks);
diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c
index f01a126108..f5b35cd55f 100644
--- a/target/arm/gdbstub.c
+++ b/target/arm/gdbstub.c
@@ -273,7 +273,7 @@ static void arm_gen_one_xml_sysreg_tag(GString *s, DynamicGDBXMLInfo *dyn_xml,
 static void arm_register_sysreg_for_xml(gpointer key, gpointer value,
                                         gpointer p)
 {
-    uint32_t ri_key = *(uint32_t *)key;
+    uint32_t ri_key = (uintptr_t)key;
     ARMCPRegInfo *ri = value;
     RegisterSysregXmlParam *param = (RegisterSysregXmlParam *)p;
     GString *s = param->s;
diff --git a/target/arm/helper.c b/target/arm/helper.c
index e5fc22bb69..edfb5c3d38 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -214,11 +214,8 @@ bool write_list_to_cpustate(ARMCPU *cpu)
 static void add_cpreg_to_list(gpointer key, gpointer opaque)
 {
     ARMCPU *cpu = opaque;
-    uint64_t regidx;
-    const ARMCPRegInfo *ri;
-
-    regidx = *(uint32_t *)key;
-    ri = get_arm_cp_reginfo(cpu->cp_regs, regidx);
+    uint32_t regidx = (uintptr_t)key;
+    const ARMCPRegInfo *ri = get_arm_cp_reginfo(cpu->cp_regs, regidx);
 
     if (!(ri->type & (ARM_CP_NO_RAW|ARM_CP_ALIAS))) {
         cpu->cpreg_indexes[cpu->cpreg_array_len] = cpreg_to_kvm_id(regidx);
@@ -230,11 +227,9 @@ static void add_cpreg_to_list(gpointer key, gpointer opaque)
 static void count_cpreg(gpointer key, gpointer opaque)
 {
     ARMCPU *cpu = opaque;
-    uint64_t regidx;
     const ARMCPRegInfo *ri;
 
-    regidx = *(uint32_t *)key;
-    ri = get_arm_cp_reginfo(cpu->cp_regs, regidx);
+    ri = g_hash_table_lookup(cpu->cp_regs, key);
 
     if (!(ri->type & (ARM_CP_NO_RAW|ARM_CP_ALIAS))) {
         cpu->cpreg_array_len++;
@@ -243,8 +238,8 @@ static void count_cpreg(gpointer key, gpointer opaque)
 
 static gint cpreg_key_compare(gconstpointer a, gconstpointer b)
 {
-    uint64_t aidx = cpreg_to_kvm_id(*(uint32_t *)a);
-    uint64_t bidx = cpreg_to_kvm_id(*(uint32_t *)b);
+    uint64_t aidx = cpreg_to_kvm_id((uintptr_t)a);
+    uint64_t bidx = cpreg_to_kvm_id((uintptr_t)b);
 
     if (aidx > bidx) {
         return 1;
@@ -5915,15 +5910,16 @@ static void define_arm_vh_e2h_redirects_aliases(ARMCPU *cpu)
     for (i = 0; i < ARRAY_SIZE(aliases); i++) {
         const struct E2HAlias *a = &aliases[i];
         ARMCPRegInfo *src_reg, *dst_reg, *new_reg;
-        uint32_t *new_key;
         bool ok;
 
         if (a->feature && !a->feature(&cpu->isar)) {
             continue;
         }
 
-        src_reg = g_hash_table_lookup(cpu->cp_regs, &a->src_key);
-        dst_reg = g_hash_table_lookup(cpu->cp_regs, &a->dst_key);
+        src_reg = g_hash_table_lookup(cpu->cp_regs,
+                                      (gpointer)(uintptr_t)a->src_key);
+        dst_reg = g_hash_table_lookup(cpu->cp_regs,
+                                      (gpointer)(uintptr_t)a->dst_key);
         g_assert(src_reg != NULL);
         g_assert(dst_reg != NULL);
 
@@ -5936,14 +5932,14 @@ static void define_arm_vh_e2h_redirects_aliases(ARMCPU *cpu)
 
         /* Create alias before redirection so we dup the right data. */
         new_reg = g_memdup(src_reg, sizeof(ARMCPRegInfo));
-        new_key = g_memdup(&a->new_key, sizeof(uint32_t));
 
         new_reg->name = a->new_name;
         new_reg->type |= ARM_CP_ALIAS;
         /* Remove PL1/PL0 access, leaving PL2/PL3 R/W in place.  */
         new_reg->access &= PL2_RW;
 
-        ok = g_hash_table_insert(cpu->cp_regs, new_key, new_reg);
+        ok = g_hash_table_insert(cpu->cp_regs,
+                                 (gpointer)(uintptr_t)a->new_key, new_reg);
         g_assert(ok);
 
         src_reg->opaque = dst_reg;
@@ -8509,7 +8505,7 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, const ARMCPRegInfo *r,
     /* Private utility function for define_one_arm_cp_reg_with_opaque():
      * add a single reginfo struct to the hash table.
      */
-    uint32_t *key = g_new(uint32_t, 1);
+    uint32_t key;
     ARMCPRegInfo *r2 = g_memdup(r, sizeof(ARMCPRegInfo));
     int is64 = (r->type & ARM_CP_64BIT) ? 1 : 0;
     int ns = (secstate & ARM_CP_SECSTATE_NS) ? 1 : 0;
@@ -8576,10 +8572,10 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, const ARMCPRegInfo *r,
         if (r->cp == 0 || r->state == ARM_CP_STATE_BOTH) {
             r2->cp = CP_REG_ARM64_SYSREG_CP;
         }
-        *key = ENCODE_AA64_CP_REG(r2->cp, r2->crn, crm,
-                                  r2->opc0, opc1, opc2);
+        key = ENCODE_AA64_CP_REG(r2->cp, r2->crn, crm,
+                                 r2->opc0, opc1, opc2);
     } else {
-        *key = ENCODE_CP_REG(r2->cp, is64, ns, r2->crn, crm, opc1, opc2);
+        key = ENCODE_CP_REG(r2->cp, is64, ns, r2->crn, crm, opc1, opc2);
     }
     if (opaque) {
         r2->opaque = opaque;
@@ -8621,8 +8617,7 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, const ARMCPRegInfo *r,
      * requested.
      */
     if (!(r->type & ARM_CP_OVERRIDE)) {
-        ARMCPRegInfo *oldreg;
-        oldreg = g_hash_table_lookup(cpu->cp_regs, key);
+        const ARMCPRegInfo *oldreg = get_arm_cp_reginfo(cpu->cp_regs, key);
         if (oldreg && !(oldreg->type & ARM_CP_OVERRIDE)) {
             fprintf(stderr, "Register redefined: cp=%d %d bit "
                     "crn=%d crm=%d opc1=%d opc2=%d, "
@@ -8632,7 +8627,7 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, const ARMCPRegInfo *r,
             g_assert_not_reached();
         }
     }
-    g_hash_table_insert(cpu->cp_regs, key, r2);
+    g_hash_table_insert(cpu->cp_regs, (gpointer)(uintptr_t)key, r2);
 }
 
 
@@ -8864,7 +8859,7 @@ void modify_arm_cp_regs_with_len(ARMCPRegInfo *regs, size_t regs_len,
 
 const ARMCPRegInfo *get_arm_cp_reginfo(GHashTable *cpregs, uint32_t encoded_cp)
 {
-    return g_hash_table_lookup(cpregs, &encoded_cp);
+    return g_hash_table_lookup(cpregs, (gpointer)(uintptr_t)encoded_cp);
 }
 
 void arm_cp_write_ignore(CPUARMState *env, const ARMCPRegInfo *ri,
-- 
2.34.1



  parent reply	other threads:[~2022-05-01  6:04 UTC|newest]

Thread overview: 67+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-01  5:49 [PATCH v4 00/45] target/arm: Cleanups, new features, new cpus Richard Henderson
2022-05-01  5:49 ` [PATCH v4 01/45] target/arm: Split out cpregs.h Richard Henderson
2022-05-01  5:49 ` [PATCH v4 02/45] target/arm: Reorg CPAccessResult and access_check_cp_reg Richard Henderson
2022-05-01  5:49 ` [PATCH v4 03/45] target/arm: Replace sentinels with ARRAY_SIZE in cpregs.h Richard Henderson
2022-05-01  5:49 ` [PATCH v4 04/45] target/arm: Make some more cpreg data static const Richard Henderson
2022-05-01  5:49 ` [PATCH v4 05/45] target/arm: Reorg ARMCPRegInfo type field bits Richard Henderson
2022-05-03 15:58   ` Peter Maydell
2022-05-01  5:49 ` [PATCH v4 06/45] target/arm: Avoid bare abort() or assert(0) Richard Henderson
2022-05-01 10:47   ` Peter Maydell
2022-05-01  5:49 ` [PATCH v4 07/45] target/arm: Change cpreg access permissions to enum Richard Henderson
2022-05-01  5:49 ` [PATCH v4 08/45] target/arm: Name CPState type Richard Henderson
2022-05-01  5:49 ` [PATCH v4 09/45] target/arm: Name CPSecureState type Richard Henderson
2022-05-01  5:49 ` [PATCH v4 10/45] target/arm: Drop always-true test in define_arm_vh_e2h_redirects_aliases Richard Henderson
2022-05-03 15:59   ` Peter Maydell
2022-05-01  5:49 ` Richard Henderson [this message]
2022-05-03 16:02   ` [PATCH v4 11/45] target/arm: Store cpregs key in the hash table directly Peter Maydell
2022-05-01  5:49 ` [PATCH v4 12/45] target/arm: Merge allocation of the cpreg and its name Richard Henderson
2022-05-03 16:07   ` Peter Maydell
2022-05-01  5:49 ` [PATCH v4 13/45] target/arm: Hoist computation of key in add_cpreg_to_hashtable Richard Henderson
2022-05-03 16:13   ` Peter Maydell
2022-05-01  5:49 ` [PATCH v4 14/45] target/arm: Consolidate cpreg updates " Richard Henderson
2022-05-03 16:15   ` Peter Maydell
2022-05-01  5:49 ` [PATCH v4 15/45] target/arm: Use bool for is64 and ns " Richard Henderson
2022-05-03 16:15   ` Peter Maydell
2022-05-01  5:49 ` [PATCH v4 16/45] target/arm: Hoist isbanked computation " Richard Henderson
2022-05-03 16:16   ` Peter Maydell
2022-05-01  5:49 ` [PATCH v4 17/45] target/arm: Perform override check early " Richard Henderson
2022-05-03 16:21   ` Peter Maydell
2022-05-01  5:50 ` [PATCH v4 18/45] target/arm: Reformat comments " Richard Henderson
2022-05-03 16:22   ` Peter Maydell
2022-05-01  5:50 ` [PATCH v4 19/45] target/arm: Remove HOST_BIG_ENDIAN ifdef " Richard Henderson
2022-05-03 16:25   ` Peter Maydell
2022-05-01  5:50 ` [PATCH v4 20/45] target/arm: Handle cpreg registration for missing EL Richard Henderson
2022-05-03 16:34   ` Peter Maydell
2022-05-03 16:45     ` Richard Henderson
2022-05-03 16:50       ` Peter Maydell
2022-05-01  5:50 ` [PATCH v4 21/45] target/arm: Drop EL3 no EL2 fallbacks Richard Henderson
2022-05-03 17:13   ` Peter Maydell
2022-05-01  5:50 ` [PATCH v4 22/45] target/arm: Merge zcr reginfo Richard Henderson
2022-05-03 17:12   ` Peter Maydell
2022-05-01  5:50 ` [PATCH v4 23/45] target/arm: Add isar predicates for FEAT_Debugv8p2 Richard Henderson
2022-05-01  5:50 ` [PATCH v4 24/45] target/arm: Adjust definition of CONTEXTIDR_EL2 Richard Henderson
2022-05-01  5:50 ` [PATCH v4 25/45] target/arm: Move cortex impdef sysregs to cpu_tcg.c Richard Henderson
2022-05-01  5:50 ` [PATCH v4 26/45] target/arm: Update qemu-system-arm -cpu max to cortex-a57 Richard Henderson
2022-05-01  5:50 ` [PATCH v4 27/45] target/arm: Set ID_DFR0.PerfMon for qemu-system-arm -cpu max Richard Henderson
2022-05-01  5:50 ` [PATCH v4 28/45] target/arm: Split out aa32_max_features Richard Henderson
2022-05-01  5:50 ` [PATCH v4 29/45] target/arm: Annotate arm_max_initfn with FEAT identifiers Richard Henderson
2022-05-01  5:50 ` [PATCH v4 30/45] target/arm: Use field names for manipulating EL2 and EL3 modes Richard Henderson
2022-05-01  5:50 ` [PATCH v4 31/45] target/arm: Enable FEAT_Debugv8p2 for -cpu max Richard Henderson
2022-05-01  5:50 ` [PATCH v4 32/45] target/arm: Enable FEAT_Debugv8p4 " Richard Henderson
2022-05-01  5:50 ` [PATCH v4 33/45] target/arm: Add isar_feature_{aa64,any}_ras Richard Henderson
2022-05-01  5:50 ` [PATCH v4 34/45] target/arm: Add minimal RAS registers Richard Henderson
2022-05-03 16:58   ` Peter Maydell
2022-05-01  5:50 ` [PATCH v4 35/45] target/arm: Enable SCR and HCR bits for RAS Richard Henderson
2022-05-01  5:50 ` [PATCH v4 36/45] target/arm: Implement virtual SError exceptions Richard Henderson
2022-05-01  5:50 ` [PATCH v4 37/45] target/arm: Implement ESB instruction Richard Henderson
2022-05-01  5:50 ` [PATCH v4 38/45] target/arm: Enable FEAT_RAS for -cpu max Richard Henderson
2022-05-01  5:50 ` [PATCH v4 39/45] target/arm: Enable FEAT_IESB " Richard Henderson
2022-05-01  5:50 ` [PATCH v4 40/45] target/arm: Enable FEAT_CSV2 " Richard Henderson
2022-05-01  5:50 ` [PATCH v4 41/45] target/arm: Enable FEAT_CSV2_2 " Richard Henderson
2022-05-03 17:10   ` Peter Maydell
2022-05-03 19:33     ` Richard Henderson
2022-05-01  5:50 ` [PATCH v4 42/45] target/arm: Enable FEAT_CSV3 " Richard Henderson
2022-05-01  5:50 ` [PATCH v4 43/45] target/arm: Enable FEAT_DGH " Richard Henderson
2022-05-01  5:50 ` [PATCH v4 44/45] target/arm: Define cortex-a76 Richard Henderson
2022-05-01  5:50 ` [PATCH v4 45/45] target/arm: Define neoverse-n1 Richard Henderson
2022-05-03 16:47 ` [PATCH v4 00/45] target/arm: Cleanups, new features, new cpus Peter Maydell

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