[Intel-gfx] [PATCH 01/16] drm/i915: Drop has_llc from device info

[Intel-gfx] [PATCH 01/16] drm/i915: Drop has_llc from device info

[José Roberto de Souza]

This feature is supported in graphics version 6 and newer in all
integrated GPUs not including VLC and CHV, so we can drop this flag
for a not so complicated macro check.

For this flag we were lucky as XE_HP_FEATURES was setting it to true
while DGFX_FEATURES was setting it to false and xehpsdv and DG2 were
using those macros in this givin order if it was the other way around,
some code paths would follow the HAS_LLC path while LLC is not
available in hardware and was not initialized in software.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_llc.c      | 2 +-
 drivers/gpu/drm/i915/i915_drv.h          | 5 ++++-
 drivers/gpu/drm/i915/i915_pci.c          | 4 ----
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 4 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c b/drivers/gpu/drm/i915/gt/intel_llc.c
index 40e2e28ee6c75..ffcff51ee6e47 100644
--- a/drivers/gpu/drm/i915/gt/intel_llc.c
+++ b/drivers/gpu/drm/i915/gt/intel_llc.c
@@ -52,7 +52,7 @@ static bool get_ia_constants(struct intel_llc *llc,
 	struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
 	struct intel_rps *rps = &llc_to_gt(llc)->rps;
 
-	if (!HAS_LLC(i915) || IS_DGFX(i915))
+	if (!HAS_LLC(i915))
 		return false;
 
 	if (rps->max_freq <= rps->min_freq)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6dfaf7fce9156..fd5269845e9ad 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1236,7 +1236,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
  */
 #define CMDPARSER_USES_GGTT(dev_priv) (GRAPHICS_VER(dev_priv) == 7)
 
-#define HAS_LLC(dev_priv)	(INTEL_INFO(dev_priv)->has_llc)
+#define HAS_LLC(dev_priv)	(!IS_DGFX(dev_priv) && (GRAPHICS_VER(dev_priv) >= 8 || \
+							IS_HASWELL(dev_priv) || \
+							IS_IVYBRIDGE(dev_priv) || \
+							IS_SANDYBRIDGE(dev_priv)))
 #define HAS_4TILE(dev_priv)	(INTEL_INFO(dev_priv)->has_4tile)
 #define HAS_SNOOP(dev_priv)	(INTEL_INFO(dev_priv)->has_snoop)
 #define HAS_EDRAM(dev_priv)	((dev_priv)->edram_size_mb)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 799573a5e5a6f..30a32a5d0e3c9 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -404,7 +404,6 @@ static const struct intel_device_info ilk_m_info = {
 	.display.fbc_mask = BIT(INTEL_FBC_A), \
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
 	.has_coherent_ggtt = true, \
-	.has_llc = 1, \
 	.has_rc6p = 1, \
 	.has_rps = true, \
 	.dma_mask_size = 40, \
@@ -454,7 +453,6 @@ static const struct intel_device_info snb_m_gt2_info = {
 	.display.fbc_mask = BIT(INTEL_FBC_A), \
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
 	.has_coherent_ggtt = true, \
-	.has_llc = 1, \
 	.has_rc6p = 1, \
 	.has_rps = true, \
 	.dma_mask_size = 40, \
@@ -878,7 +876,6 @@ static const struct intel_device_info rkl_info = {
 
 #define DGFX_FEATURES \
 	.memory_regions = REGION_SMEM | REGION_LMEM | REGION_STOLEN_LMEM, \
-	.has_llc = 0, \
 	.has_pxp = 0, \
 	.has_snoop = 1, \
 	.is_dgfx = 1, \
@@ -985,7 +982,6 @@ static const struct intel_device_info adl_p_info = {
 	.has_64bit_reloc = 1, \
 	.has_flat_ccs = 1, \
 	.has_global_mocs = 1, \
-	.has_llc = 1, \
 	.has_logical_ring_contexts = 1, \
 	.has_mslices = 1, \
 	.has_rps = 1, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index a2e53b8683285..e8d53c7a1bd83 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -149,7 +149,6 @@ enum intel_ppgtt_type {
 	func(has_heci_gscfi); \
 	func(has_guc_deprivilege); \
 	func(has_l3_dpf); \
-	func(has_llc); \
 	func(has_logical_ring_contexts); \
 	func(has_mslices); \
 	func(has_pooled_eu); \
-- 
2.36.0

[Intel-gfx] [PATCH 02/16] drm/i915: Drop has_ipc from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as all platforms with display version 9 or newer supports this
feature.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

v2:
- making this available to all platforms 9 and newer

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 2 +-
 drivers/gpu/drm/i915/i915_pci.c          | 3 ---
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fd5269845e9ad..8d00d24e16dc5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1350,7 +1350,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
  */
 #define NEEDS_COMPACT_PT(dev_priv) (INTEL_INFO(dev_priv)->needs_compact_pt)
 
-#define HAS_IPC(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_ipc)
+#define HAS_IPC(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9)
 
 #define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i))
 #define HAS_LMEM(i915) HAS_REGION(i915, REGION_LMEM)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 30a32a5d0e3c9..8a7f7aad1a5d2 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -632,7 +632,6 @@ static const struct intel_device_info chv_info = {
 	GEN9_DEFAULT_PAGE_SIZES, \
 	.display.has_dmc = 1, \
 	.display.has_hdcp = 1, \
-	.display.has_ipc = 1, \
 	.display.has_psr_hw_tracking = 1, \
 	.dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \
 	.dbuf.slice_mask = BIT(DBUF_S1)
@@ -691,7 +690,6 @@ static const struct intel_device_info skl_gt4_info = {
 	.ppgtt_size = 48, \
 	.has_snoop = true, \
 	.has_coherent_ggtt = false, \
-	.display.has_ipc = 1, \
 	HSW_PIPE_OFFSETS, \
 	IVB_CURSOR_OFFSETS, \
 	IVB_COLORS, \
@@ -930,7 +928,6 @@ static const struct intel_device_info adl_s_info = {
 	.display.has_fpga_dbg = 1,						\
 	.display.has_hdcp = 1,							\
 	.display.has_hotplug = 1,						\
-	.display.has_ipc = 1,							\
 	.display.ver = 13,							\
 	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),	\
 	.pipe_offsets = {							\
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index e8d53c7a1bd83..f614f29267273 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -173,7 +173,6 @@ enum intel_ppgtt_type {
 	func(has_hdcp); \
 	func(has_hotplug); \
 	func(has_hti); \
-	func(has_ipc); \
 	func(has_modular_fia); \
 	func(has_overlay); \
 	func(has_psr_hw_tracking); \
-- 
2.36.0

[Intel-gfx] [PATCH 03/16] drm/i915/display: Disable DSB for DG2 and Alderlake-P

[José Roberto de Souza]

Commit 99510e1afb48 ("drm/i915: Disable DSB usage for now") disabled
DSB for all display 12 platforms because it is not properly
programming gamma LUT but left display 13 platforms with it enabled
what I believe is not intentional.

kms_color@pipe-a-gamma test is still passing on TGL with DSB enabled
like reported in https://gitlab.freedesktop.org/drm/intel/-/issues/3916
and got the same behavior on Alderlake-P.

So here disabling DSB for all platforms and to avoid this mistake in
future platforms dropping the it from intel_device_info struct.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Fixes: 99510e1afb48 ("drm/i915: Disable DSB usage for now")
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c          | 4 +---
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8d00d24e16dc5..4a93ea3bf4949 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -938,7 +938,8 @@ static inline struct intel_gt *to_gt(struct drm_i915_private *i915)
 
 #define INTEL_REVID(dev_priv)	(to_pci_dev((dev_priv)->drm.dev)->revision)
 
-#define HAS_DSB(dev_priv)	(INTEL_INFO(dev_priv)->display.has_dsb)
+/* FIXME: LUT load is broken with DSB */
+#define HAS_DSB(dev_priv)	(DISPLAY_VER(i915) >= 12 && 0)
 
 #define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.display_step)
 #define INTEL_GRAPHICS_STEP(__i915) (RUNTIME_INFO(__i915)->step.graphics_step)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 8a7f7aad1a5d2..58653e5c24d35 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -848,8 +848,7 @@ static const struct intel_device_info jsl_info = {
 	}, \
 	TGL_CURSOR_OFFSETS, \
 	.has_global_mocs = 1, \
-	.has_pxp = 1, \
-	.display.has_dsb = 0 /* FIXME: LUT load is broken with DSB */
+	.has_pxp = 1
 
 static const struct intel_device_info tgl_info = {
 	GEN12_FEATURES,
@@ -922,7 +921,6 @@ static const struct intel_device_info adl_s_info = {
 	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) |		\
 		BIT(DBUF_S4),							\
 	.display.has_dmc = 1,							\
-	.display.has_dsb = 1,							\
 	.display.has_dsc = 1,							\
 	.display.fbc_mask = BIT(INTEL_FBC_A),					\
 	.display.has_fpga_dbg = 1,						\
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index f614f29267273..d4fb2af3b8be8 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -166,7 +166,6 @@ enum intel_ppgtt_type {
 	func(cursor_needs_physical); \
 	func(has_cdclk_crawl); \
 	func(has_dmc); \
-	func(has_dsb); \
 	func(has_dsc); \
 	func(has_fpga_dbg); \
 	func(has_gmch); \
-- 
2.36.0

[Intel-gfx] [PATCH 04/16] drm/i915: Drop has_rc6p from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as it was only supported in sandybridge and ivybridge platforms.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

v2:
- simplified check

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 2 +-
 drivers/gpu/drm/i915/i915_pci.c          | 3 ---
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4a93ea3bf4949..27dccddfadd84 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1315,7 +1315,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 /* ilk does support rc6, but we do not implement [power] contexts */
 #define HAS_RC6(dev_priv)		 (GRAPHICS_VER(dev_priv) >= 6)
-#define HAS_RC6p(dev_priv)		 (INTEL_INFO(dev_priv)->has_rc6p)
+#define HAS_RC6p(dev_priv)		 (IS_SANDYBRIDGE(dev_priv) || IS_IVYBRIDGE(dev_priv))
 #define HAS_RC6pp(dev_priv)		 (false) /* HW was never validated */
 
 #define HAS_RPS(dev_priv)	(INTEL_INFO(dev_priv)->has_rps)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 58653e5c24d35..41bcc692e54c7 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -404,7 +404,6 @@ static const struct intel_device_info ilk_m_info = {
 	.display.fbc_mask = BIT(INTEL_FBC_A), \
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
 	.has_coherent_ggtt = true, \
-	.has_rc6p = 1, \
 	.has_rps = true, \
 	.dma_mask_size = 40, \
 	.ppgtt_type = INTEL_PPGTT_ALIASING, \
@@ -453,7 +452,6 @@ static const struct intel_device_info snb_m_gt2_info = {
 	.display.fbc_mask = BIT(INTEL_FBC_A), \
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
 	.has_coherent_ggtt = true, \
-	.has_rc6p = 1, \
 	.has_rps = true, \
 	.dma_mask_size = 40, \
 	.ppgtt_type = INTEL_PPGTT_ALIASING, \
@@ -534,7 +532,6 @@ static const struct intel_device_info vlv_info = {
 	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
 		BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
 	.display.has_fpga_dbg = 1, \
-	.has_rc6p = 0 /* RC6p removed-by HSW */, \
 	HSW_PIPE_OFFSETS, \
 	.has_runtime_pm = 1
 
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index d4fb2af3b8be8..5bc866de9b17c 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -153,7 +153,6 @@ enum intel_ppgtt_type {
 	func(has_mslices); \
 	func(has_pooled_eu); \
 	func(has_pxp); \
-	func(has_rc6p); \
 	func(has_rps); \
 	func(has_runtime_pm); \
 	func(has_snoop); \
-- 
2.36.0

[Intel-gfx] [PATCH 05/16] drm/i915: Drop has_psr_hw_tracking from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as this feature was only supported by display 9, 10 and 11, tigerlake
and DG1, no newer platforms will have this feature.

While at it also moving it to intel_psr.c as this is the only place
were it is used.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

v2:
- moved macro to intel_psr.c

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 5 +++++
 drivers/gpu/drm/i915/i915_drv.h          | 2 --
 drivers/gpu/drm/i915/i915_pci.c          | 5 -----
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 4 files changed, 5 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 06db407e2749f..9521360440748 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -84,6 +84,11 @@
  * use page flips.
  */
 
+#define HAS_PSR_HW_TRACKING(dev_priv) ((DISPLAY_VER(dev_priv) >= 9 && \
+					DISPLAY_VER(dev_priv) <= 11) || \
+					IS_TIGERLAKE(dev_priv) || \
+					IS_DG1(dev_priv))
+
 static bool psr_global_enabled(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 27dccddfadd84..98160fe2bc074 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1308,8 +1308,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define HAS_DP_MST(dev_priv)		 (HAS_DDI(dev_priv))
 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
 #define HAS_PSR(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9)
-#define HAS_PSR_HW_TRACKING(dev_priv) \
-	(INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
 #define HAS_PSR2_SEL_FETCH(dev_priv)	 (DISPLAY_VER(dev_priv) >= 12)
 #define HAS_TRANSCODER(dev_priv, trans)	 ((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0)
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 41bcc692e54c7..00c61e3b49c97 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -629,7 +629,6 @@ static const struct intel_device_info chv_info = {
 	GEN9_DEFAULT_PAGE_SIZES, \
 	.display.has_dmc = 1, \
 	.display.has_hdcp = 1, \
-	.display.has_psr_hw_tracking = 1, \
 	.dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \
 	.dbuf.slice_mask = BIT(DBUF_S1)
 
@@ -677,7 +676,6 @@ static const struct intel_device_info skl_gt4_info = {
 	.display.has_fpga_dbg = 1, \
 	.display.fbc_mask = BIT(INTEL_FBC_A), \
 	.display.has_hdcp = 1, \
-	.display.has_psr_hw_tracking = 1, \
 	.has_runtime_pm = 1, \
 	.display.has_dmc = 1, \
 	.has_rps = true, \
@@ -863,7 +861,6 @@ static const struct intel_device_info rkl_info = {
 	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
 		BIT(TRANSCODER_C),
 	.display.has_hti = 1,
-	.display.has_psr_hw_tracking = 0,
 	.platform_engine_mask =
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0),
 };
@@ -894,7 +891,6 @@ static const struct intel_device_info adl_s_info = {
 	PLATFORM(INTEL_ALDERLAKE_S),
 	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
 	.display.has_hti = 1,
-	.display.has_psr_hw_tracking = 0,
 	.platform_engine_mask =
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
 	.dma_mask_size = 39,
@@ -952,7 +948,6 @@ static const struct intel_device_info adl_p_info = {
 			       BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1),
 	.display.has_cdclk_crawl = 1,
 	.display.has_modular_fia = 1,
-	.display.has_psr_hw_tracking = 0,
 	.platform_engine_mask =
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
 	.ppgtt_size = 48,
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 5bc866de9b17c..5a39e42029877 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -173,7 +173,6 @@ enum intel_ppgtt_type {
 	func(has_hti); \
 	func(has_modular_fia); \
 	func(has_overlay); \
-	func(has_psr_hw_tracking); \
 	func(overlay_needs_physical); \
 	func(supports_tv);
 
-- 
2.36.0

[Intel-gfx] [PATCH 06/16] drm/i915: Drop supports_tv from device info

[José Roberto de Souza]

Only four platforms ever support this feature so we can elimitate
this from device info and use platform checks instead.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c          | 4 ----
 drivers/gpu/drm/i915/intel_device_info.h | 3 +--
 3 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 98160fe2bc074..c107ff03c1fbc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1290,7 +1290,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
  */
 #define HAS_128_BYTE_Y_TILING(dev_priv) (GRAPHICS_VER(dev_priv) != 2 && \
 					 !(IS_I915G(dev_priv) || IS_I915GM(dev_priv)))
-#define SUPPORTS_TV(dev_priv)		(INTEL_INFO(dev_priv)->display.supports_tv)
+#define SUPPORTS_TV(dev_priv)		(IS_I915GM(dev_priv) || IS_I945GM(dev_priv) || \
+					 IS_I965GM(dev_priv) || IS_GM45(dev_priv))
 #define I915_HAS_HOTPLUG(dev_priv)	(INTEL_INFO(dev_priv)->display.has_hotplug)
 
 #define HAS_FW_BLC(dev_priv)	(DISPLAY_VER(dev_priv) > 2)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 00c61e3b49c97..f4d484ea4c712 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -259,7 +259,6 @@ static const struct intel_device_info i915gm_info = {
 	.display.cursor_needs_physical = 1,
 	.display.has_overlay = 1,
 	.display.overlay_needs_physical = 1,
-	.display.supports_tv = 1,
 	.display.fbc_mask = BIT(INTEL_FBC_A),
 	.hws_needs_physical = 1,
 	.unfenced_needs_alignment = 1,
@@ -284,7 +283,6 @@ static const struct intel_device_info i945gm_info = {
 	.display.cursor_needs_physical = 1,
 	.display.has_overlay = 1,
 	.display.overlay_needs_physical = 1,
-	.display.supports_tv = 1,
 	.display.fbc_mask = BIT(INTEL_FBC_A),
 	.hws_needs_physical = 1,
 	.unfenced_needs_alignment = 1,
@@ -346,7 +344,6 @@ static const struct intel_device_info i965gm_info = {
 	.is_mobile = 1,
 	.display.fbc_mask = BIT(INTEL_FBC_A),
 	.display.has_overlay = 1,
-	.display.supports_tv = 1,
 	.hws_needs_physical = 1,
 	.has_snoop = false,
 };
@@ -363,7 +360,6 @@ static const struct intel_device_info gm45_info = {
 	PLATFORM(INTEL_GM45),
 	.is_mobile = 1,
 	.display.fbc_mask = BIT(INTEL_FBC_A),
-	.display.supports_tv = 1,
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0),
 	.gpu_reset_clobbers_display = false,
 };
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 5a39e42029877..0974e3ff24cf8 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -173,8 +173,7 @@ enum intel_ppgtt_type {
 	func(has_hti); \
 	func(has_modular_fia); \
 	func(has_overlay); \
-	func(overlay_needs_physical); \
-	func(supports_tv);
+	func(overlay_needs_physical);
 
 struct ip_version {
 	u8 ver;
-- 
2.36.0

[Intel-gfx] [PATCH 07/16] drm/i915: Drop has_4tile from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct as this
tiling format is supported in platforms with graphics 12.50 or
newer what was missed in xehpsdv.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

BSpec: 44917
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 2 +-
 drivers/gpu/drm/i915/i915_pci.c          | 1 -
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c107ff03c1fbc..c22846d77d8de 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1241,7 +1241,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 							IS_HASWELL(dev_priv) || \
 							IS_IVYBRIDGE(dev_priv) || \
 							IS_SANDYBRIDGE(dev_priv)))
-#define HAS_4TILE(dev_priv)	(INTEL_INFO(dev_priv)->has_4tile)
+#define HAS_4TILE(dev_priv)	(GRAPHICS_VER_FULL(dev_priv) >= IP_VER(12, 50))
 #define HAS_SNOOP(dev_priv)	(INTEL_INFO(dev_priv)->has_snoop)
 #define HAS_EDRAM(dev_priv)	((dev_priv)->edram_size_mb)
 #define HAS_SECURE_BATCHES(dev_priv) (GRAPHICS_VER(dev_priv) < 6)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f4d484ea4c712..d8b6f357ae4fa 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1001,7 +1001,6 @@ static const struct intel_device_info xehpsdv_info = {
 	.graphics.rel = 55, \
 	.media.rel = 55, \
 	PLATFORM(INTEL_DG2), \
-	.has_4tile = 1, \
 	.has_64k_pages = 1, \
 	.has_guc_deprivilege = 1, \
 	.has_heci_pxp = 1, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 0974e3ff24cf8..fa42ee085bc8f 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -142,7 +142,6 @@ enum intel_ppgtt_type {
 	func(has_64k_pages); \
 	func(needs_compact_pt); \
 	func(gpu_reset_clobbers_display); \
-	func(has_4tile); \
 	func(has_flat_ccs); \
 	func(has_global_mocs); \
 	func(has_heci_pxp); \
-- 
2.36.0

[Intel-gfx] [PATCH 08/16] drm/i915: Drop has_64bit_reloc from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as all platforms with graphics version 8 or newer have software
support for this feature.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 2 +-
 drivers/gpu/drm/i915/i915_pci.c          | 6 +-----
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c22846d77d8de..1552a44a1fafe 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1332,7 +1332,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define HAS_MSO(i915)		(DISPLAY_VER(i915) >= 12)
 
 #define HAS_RUNTIME_PM(dev_priv) (INTEL_INFO(dev_priv)->has_runtime_pm)
-#define HAS_64BIT_RELOC(dev_priv) (INTEL_INFO(dev_priv)->has_64bit_reloc)
+#define HAS_64BIT_RELOC(dev_priv) (GRAPHICS_VER(dev_priv) >= 8)
 
 #define HAS_MSLICES(dev_priv) \
 	(INTEL_INFO(dev_priv)->has_mslices)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index d8b6f357ae4fa..0e326b5ccf10f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -557,8 +557,7 @@ static const struct intel_device_info hsw_gt3_info = {
 	.has_logical_ring_contexts = 1, \
 	.dma_mask_size = 39, \
 	.ppgtt_type = INTEL_PPGTT_FULL, \
-	.ppgtt_size = 48, \
-	.has_64bit_reloc = 1
+	.ppgtt_size = 48
 
 #define BDW_PLATFORM \
 	GEN8_FEATURES, \
@@ -597,7 +596,6 @@ static const struct intel_device_info chv_info = {
 	.display.has_hotplug = 1,
 	.is_lp = 1,
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
-	.has_64bit_reloc = 1,
 	.has_runtime_pm = 1,
 	.has_rps = true,
 	.has_logical_ring_contexts = 1,
@@ -668,7 +666,6 @@ static const struct intel_device_info skl_gt4_info = {
 	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
 		BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
 		BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
-	.has_64bit_reloc = 1, \
 	.display.has_fpga_dbg = 1, \
 	.display.fbc_mask = BIT(INTEL_FBC_A), \
 	.display.has_hdcp = 1, \
@@ -962,7 +959,6 @@ static const struct intel_device_info adl_p_info = {
 	.graphics.rel = 50, \
 	XE_HP_PAGE_SIZES, \
 	.dma_mask_size = 46, \
-	.has_64bit_reloc = 1, \
 	.has_flat_ccs = 1, \
 	.has_global_mocs = 1, \
 	.has_logical_ring_contexts = 1, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index fa42ee085bc8f..e0b9a7547acc2 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -138,7 +138,6 @@ enum intel_ppgtt_type {
 	func(require_force_probe); \
 	func(is_dgfx); \
 	/* Keep has_* in alphabetical order */ \
-	func(has_64bit_reloc); \
 	func(has_64k_pages); \
 	func(needs_compact_pt); \
 	func(gpu_reset_clobbers_display); \
-- 
2.36.0

[Intel-gfx] [PATCH 09/16] drm/i915: Drop has_global_mocs from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as all platforms with graphics version 12 or newer has this feature.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 2 +-
 drivers/gpu/drm/i915/i915_pci.c          | 2 --
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1552a44a1fafe..cf896cbf107e5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1365,7 +1365,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_POOLED_EU(dev_priv)	(INTEL_INFO(dev_priv)->has_pooled_eu)
 
-#define HAS_GLOBAL_MOCS_REGISTERS(dev_priv)	(INTEL_INFO(dev_priv)->has_global_mocs)
+#define HAS_GLOBAL_MOCS_REGISTERS(dev_priv)	(GRAPHICS_VER(dev_priv) >= 12)
 
 #define HAS_PXP(dev_priv)  ((IS_ENABLED(CONFIG_DRM_I915_PXP) && \
 			    INTEL_INFO(dev_priv)->has_pxp) && \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 0e326b5ccf10f..e03c640ff05d5 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -835,7 +835,6 @@ static const struct intel_device_info jsl_info = {
 		[TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
 	}, \
 	TGL_CURSOR_OFFSETS, \
-	.has_global_mocs = 1, \
 	.has_pxp = 1
 
 static const struct intel_device_info tgl_info = {
@@ -960,7 +959,6 @@ static const struct intel_device_info adl_p_info = {
 	XE_HP_PAGE_SIZES, \
 	.dma_mask_size = 46, \
 	.has_flat_ccs = 1, \
-	.has_global_mocs = 1, \
 	.has_logical_ring_contexts = 1, \
 	.has_mslices = 1, \
 	.has_rps = 1, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index e0b9a7547acc2..bf192b9498d4b 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -142,7 +142,6 @@ enum intel_ppgtt_type {
 	func(needs_compact_pt); \
 	func(gpu_reset_clobbers_display); \
 	func(has_flat_ccs); \
-	func(has_global_mocs); \
 	func(has_heci_pxp); \
 	func(has_heci_gscfi); \
 	func(has_guc_deprivilege); \
-- 
2.36.0

[Intel-gfx] [PATCH 10/16] drm/i915: Drop has_guc_deprivilege from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as all platforms with graphics version 12.55 or newer has this
feature.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 3 +--
 drivers/gpu/drm/i915/i915_pci.c          | 1 -
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cf896cbf107e5..6daf4b82c131f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1395,8 +1395,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define INTEL_DISPLAY_ENABLED(dev_priv) \
 	(drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)), !(dev_priv)->params.disable_display)
 
-#define HAS_GUC_DEPRIVILEGE(dev_priv) \
-	(INTEL_INFO(dev_priv)->has_guc_deprivilege)
+#define HAS_GUC_DEPRIVILEGE(dev_priv) (GRAPHICS_VER_FULL(dev_priv) >= IP_VER(12, 55))
 
 #define HAS_PERCTX_PREEMPT_CTRL(i915) \
 	((GRAPHICS_VER(i915) >= 9) &&  GRAPHICS_VER_FULL(i915) < IP_VER(12, 55))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index e03c640ff05d5..48cfb0ee56bf3 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -996,7 +996,6 @@ static const struct intel_device_info xehpsdv_info = {
 	.media.rel = 55, \
 	PLATFORM(INTEL_DG2), \
 	.has_64k_pages = 1, \
-	.has_guc_deprivilege = 1, \
 	.has_heci_pxp = 1, \
 	.needs_compact_pt = 1, \
 	.platform_engine_mask = \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index bf192b9498d4b..a199031b5a6ec 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -144,7 +144,6 @@ enum intel_ppgtt_type {
 	func(has_flat_ccs); \
 	func(has_heci_pxp); \
 	func(has_heci_gscfi); \
-	func(has_guc_deprivilege); \
 	func(has_l3_dpf); \
 	func(has_logical_ring_contexts); \
 	func(has_mslices); \
-- 
2.36.0

[Intel-gfx] [PATCH 11/16] drm/i915: Drop has_pxp from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as all integrated platforms with graphics version 12 or newer supports
this feature.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 2 +-
 drivers/gpu/drm/i915/i915_pci.c          | 4 +---
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6daf4b82c131f..29e5017e64d70 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1368,7 +1368,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv)	(GRAPHICS_VER(dev_priv) >= 12)
 
 #define HAS_PXP(dev_priv)  ((IS_ENABLED(CONFIG_DRM_I915_PXP) && \
-			    INTEL_INFO(dev_priv)->has_pxp) && \
+			    (!IS_DGFX(dev_priv) && GRAPHICS_VER(dev_priv) >= 12) && \
 			    VDBOX_MASK(to_gt(dev_priv)))
 
 #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 48cfb0ee56bf3..e8afaa0344134 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -834,8 +834,7 @@ static const struct intel_device_info jsl_info = {
 		[TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET, \
 		[TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
 	}, \
-	TGL_CURSOR_OFFSETS, \
-	.has_pxp = 1
+	TGL_CURSOR_OFFSETS
 
 static const struct intel_device_info tgl_info = {
 	GEN12_FEATURES,
@@ -859,7 +858,6 @@ static const struct intel_device_info rkl_info = {
 
 #define DGFX_FEATURES \
 	.memory_regions = REGION_SMEM | REGION_LMEM | REGION_STOLEN_LMEM, \
-	.has_pxp = 0, \
 	.has_snoop = 1, \
 	.is_dgfx = 1, \
 	.has_heci_gscfi = 1
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index a199031b5a6ec..edbd76aa31a9c 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -148,7 +148,6 @@ enum intel_ppgtt_type {
 	func(has_logical_ring_contexts); \
 	func(has_mslices); \
 	func(has_pooled_eu); \
-	func(has_pxp); \
 	func(has_rps); \
 	func(has_runtime_pm); \
 	func(has_snoop); \
-- 
2.36.0

[Intel-gfx] [PATCH 12/16] drm/i915: Drop has_heci_gscfi from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as all discrete platforms supports this feature.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 3 +--
 drivers/gpu/drm/i915/i915_pci.c          | 3 +--
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 29e5017e64d70..1431416b7fd60 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1324,8 +1324,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define HAS_HECI_PXP(dev_priv) \
 	(INTEL_INFO(dev_priv)->has_heci_pxp)
 
-#define HAS_HECI_GSCFI(dev_priv) \
-	(INTEL_INFO(dev_priv)->has_heci_gscfi)
+#define HAS_HECI_GSCFI(dev_priv) (IS_DGFX(dev_priv))
 
 #define HAS_HECI_GSC(dev_priv) (HAS_HECI_PXP(dev_priv) || HAS_HECI_GSCFI(dev_priv))
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index e8afaa0344134..e4864b0a59234 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -859,8 +859,7 @@ static const struct intel_device_info rkl_info = {
 #define DGFX_FEATURES \
 	.memory_regions = REGION_SMEM | REGION_LMEM | REGION_STOLEN_LMEM, \
 	.has_snoop = 1, \
-	.is_dgfx = 1, \
-	.has_heci_gscfi = 1
+	.is_dgfx = 1
 
 static const struct intel_device_info dg1_info = {
 	GEN12_FEATURES,
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index edbd76aa31a9c..e40ae78c4c7c9 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -143,7 +143,6 @@ enum intel_ppgtt_type {
 	func(gpu_reset_clobbers_display); \
 	func(has_flat_ccs); \
 	func(has_heci_pxp); \
-	func(has_heci_gscfi); \
 	func(has_l3_dpf); \
 	func(has_logical_ring_contexts); \
 	func(has_mslices); \
-- 
2.36.0

[Intel-gfx] [PATCH 13/16] drm/i915: Drop has_heci_gscfi from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as this feature was only supported in Ivybridge and Haswell.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          |  2 +-
 drivers/gpu/drm/i915/i915_pci.c          | 12 ++++--------
 drivers/gpu/drm/i915/intel_device_info.h |  1 -
 3 files changed, 5 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1431416b7fd60..fad2bb34b47f0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1375,7 +1375,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define HAS_LSPCON(dev_priv) (IS_DISPLAY_VER(dev_priv, 9, 10))
 
 /* DPF == dynamic parity feature */
-#define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)
+#define HAS_L3_DPF(dev_priv) (IS_HASWELL(dev_priv) || IS_IVYBRIDGE(dev_priv))
 #define NUM_L3_SLICES(dev_priv) (IS_HSW_GT3(dev_priv) ? \
 				 2 : HAS_L3_DPF(dev_priv))
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index e4864b0a59234..109f90b40da9b 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -460,8 +460,7 @@ static const struct intel_device_info snb_m_gt2_info = {
 
 #define IVB_D_PLATFORM \
 	GEN7_FEATURES, \
-	PLATFORM(INTEL_IVYBRIDGE), \
-	.has_l3_dpf = 1
+	PLATFORM(INTEL_IVYBRIDGE)
 
 static const struct intel_device_info ivb_d_gt1_info = {
 	IVB_D_PLATFORM,
@@ -476,8 +475,7 @@ static const struct intel_device_info ivb_d_gt2_info = {
 #define IVB_M_PLATFORM \
 	GEN7_FEATURES, \
 	PLATFORM(INTEL_IVYBRIDGE), \
-	.is_mobile = 1, \
-	.has_l3_dpf = 1
+	.is_mobile = 1
 
 static const struct intel_device_info ivb_m_gt1_info = {
 	IVB_M_PLATFORM,
@@ -494,8 +492,7 @@ static const struct intel_device_info ivb_q_info = {
 	PLATFORM(INTEL_IVYBRIDGE),
 	.gt = 2,
 	.display.pipe_mask = 0, /* legal, last one wins */
-	.display.cpu_transcoder_mask = 0,
-	.has_l3_dpf = 1,
+	.display.cpu_transcoder_mask = 0
 };
 
 static const struct intel_device_info vlv_info = {
@@ -533,8 +530,7 @@ static const struct intel_device_info vlv_info = {
 
 #define HSW_PLATFORM \
 	G75_FEATURES, \
-	PLATFORM(INTEL_HASWELL), \
-	.has_l3_dpf = 1
+	PLATFORM(INTEL_HASWELL)
 
 static const struct intel_device_info hsw_gt1_info = {
 	HSW_PLATFORM,
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index e40ae78c4c7c9..952ececab8dba 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -143,7 +143,6 @@ enum intel_ppgtt_type {
 	func(gpu_reset_clobbers_display); \
 	func(has_flat_ccs); \
 	func(has_heci_pxp); \
-	func(has_l3_dpf); \
 	func(has_logical_ring_contexts); \
 	func(has_mslices); \
 	func(has_pooled_eu); \
-- 
2.36.0

[Intel-gfx] [PATCH 14/16] drm/i915: Drop has_runtime_pm from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as this feature is supported in Haswell, Valleyview and all platforms
with graphics version 8 or newer.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 4 +++-
 drivers/gpu/drm/i915/i915_pci.c          | 7 +------
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fad2bb34b47f0..b193374f53f91 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1330,7 +1330,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_MSO(i915)		(DISPLAY_VER(i915) >= 12)
 
-#define HAS_RUNTIME_PM(dev_priv) (INTEL_INFO(dev_priv)->has_runtime_pm)
+#define HAS_RUNTIME_PM(dev_priv) (GRAPHICS_VER(dev_priv) >= 8 || \
+				  IS_HASWELL(dev_priv) || \
+				  IS_VALLEYVIEW(dev_priv))
 #define HAS_64BIT_RELOC(dev_priv) (GRAPHICS_VER(dev_priv) >= 8)
 
 #define HAS_MSLICES(dev_priv) \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 109f90b40da9b..9638949f40eb7 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -501,7 +501,6 @@ static const struct intel_device_info vlv_info = {
 	.is_lp = 1,
 	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
 	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
-	.has_runtime_pm = 1,
 	.has_rps = true,
 	.display.has_gmch = 1,
 	.display.has_hotplug = 1,
@@ -525,8 +524,7 @@ static const struct intel_device_info vlv_info = {
 	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
 		BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
 	.display.has_fpga_dbg = 1, \
-	HSW_PIPE_OFFSETS, \
-	.has_runtime_pm = 1
+	HSW_PIPE_OFFSETS
 
 #define HSW_PLATFORM \
 	G75_FEATURES, \
@@ -592,7 +590,6 @@ static const struct intel_device_info chv_info = {
 	.display.has_hotplug = 1,
 	.is_lp = 1,
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
-	.has_runtime_pm = 1,
 	.has_rps = true,
 	.has_logical_ring_contexts = 1,
 	.display.has_gmch = 1,
@@ -665,7 +662,6 @@ static const struct intel_device_info skl_gt4_info = {
 	.display.has_fpga_dbg = 1, \
 	.display.fbc_mask = BIT(INTEL_FBC_A), \
 	.display.has_hdcp = 1, \
-	.has_runtime_pm = 1, \
 	.display.has_dmc = 1, \
 	.has_rps = true, \
 	.has_logical_ring_contexts = 1, \
@@ -955,7 +951,6 @@ static const struct intel_device_info adl_p_info = {
 	.has_logical_ring_contexts = 1, \
 	.has_mslices = 1, \
 	.has_rps = 1, \
-	.has_runtime_pm = 1, \
 	.ppgtt_size = 48, \
 	.ppgtt_type = INTEL_PPGTT_FULL
 
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 952ececab8dba..7974b3edf42e2 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -147,7 +147,6 @@ enum intel_ppgtt_type {
 	func(has_mslices); \
 	func(has_pooled_eu); \
 	func(has_rps); \
-	func(has_runtime_pm); \
 	func(has_snoop); \
 	func(has_coherent_ggtt); \
 	func(unfenced_needs_alignment); \
-- 
2.36.0

[Intel-gfx] [PATCH 15/16] drm/i915: Drop has_logical_ring_contexts from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as this feature is supported all platforms with graphics version 8 or
newer.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 3 +--
 drivers/gpu/drm/i915/i915_pci.c          | 4 ----
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 1 insertion(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b193374f53f91..4b1025dbaab2a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1249,8 +1249,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HWS_NEEDS_PHYSICAL(dev_priv)	(INTEL_INFO(dev_priv)->hws_needs_physical)
 
-#define HAS_LOGICAL_RING_CONTEXTS(dev_priv) \
-		(INTEL_INFO(dev_priv)->has_logical_ring_contexts)
+#define HAS_LOGICAL_RING_CONTEXTS(dev_priv) (GRAPHICS_VER(dev_priv) >= 8)
 #define HAS_LOGICAL_RING_ELSQ(dev_priv) (GRAPHICS_VER(dev_priv) >= 11)
 
 #define HAS_EXECLISTS(dev_priv) HAS_LOGICAL_RING_CONTEXTS(dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 9638949f40eb7..5a42acb162a15 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -548,7 +548,6 @@ static const struct intel_device_info hsw_gt3_info = {
 #define GEN8_FEATURES \
 	G75_FEATURES, \
 	GEN(8), \
-	.has_logical_ring_contexts = 1, \
 	.dma_mask_size = 39, \
 	.ppgtt_type = INTEL_PPGTT_FULL, \
 	.ppgtt_size = 48
@@ -591,7 +590,6 @@ static const struct intel_device_info chv_info = {
 	.is_lp = 1,
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
 	.has_rps = true,
-	.has_logical_ring_contexts = 1,
 	.display.has_gmch = 1,
 	.dma_mask_size = 39,
 	.ppgtt_type = INTEL_PPGTT_FULL,
@@ -664,7 +662,6 @@ static const struct intel_device_info skl_gt4_info = {
 	.display.has_hdcp = 1, \
 	.display.has_dmc = 1, \
 	.has_rps = true, \
-	.has_logical_ring_contexts = 1, \
 	.dma_mask_size = 39, \
 	.ppgtt_type = INTEL_PPGTT_FULL, \
 	.ppgtt_size = 48, \
@@ -948,7 +945,6 @@ static const struct intel_device_info adl_p_info = {
 	XE_HP_PAGE_SIZES, \
 	.dma_mask_size = 46, \
 	.has_flat_ccs = 1, \
-	.has_logical_ring_contexts = 1, \
 	.has_mslices = 1, \
 	.has_rps = 1, \
 	.ppgtt_size = 48, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 7974b3edf42e2..7581ef4a68f94 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -143,7 +143,6 @@ enum intel_ppgtt_type {
 	func(gpu_reset_clobbers_display); \
 	func(has_flat_ccs); \
 	func(has_heci_pxp); \
-	func(has_logical_ring_contexts); \
 	func(has_mslices); \
 	func(has_pooled_eu); \
 	func(has_rps); \
-- 
2.36.0

[Intel-gfx] [PATCH 16/16] drm/i915: Drop display.has_fpga_db from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as this feature is supported by Broadwell, Haswell all platforms with
display version 9 or newer.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 4 +++-
 drivers/gpu/drm/i915/i915_pci.c          | 3 ---
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4b1025dbaab2a..4a1edf48d37b9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1306,7 +1306,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 					  IS_BROADWELL(dev_priv) || \
 					  IS_HASWELL(dev_priv))
 #define HAS_DP_MST(dev_priv)		 (HAS_DDI(dev_priv))
-#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
+#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (DISPLAY_VER(dev_priv) >= 9 || \
+					  IS_BROADWELL(dev_priv) || \
+					  IS_HASWELL(dev_priv))
 #define HAS_PSR(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9)
 #define HAS_PSR2_SEL_FETCH(dev_priv)	 (DISPLAY_VER(dev_priv) >= 12)
 #define HAS_TRANSCODER(dev_priv, trans)	 ((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 5a42acb162a15..6a5b70b3ea2d7 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -523,7 +523,6 @@ static const struct intel_device_info vlv_info = {
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
 	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
 		BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
-	.display.has_fpga_dbg = 1, \
 	HSW_PIPE_OFFSETS
 
 #define HSW_PLATFORM \
@@ -657,7 +656,6 @@ static const struct intel_device_info skl_gt4_info = {
 	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
 		BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
 		BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
-	.display.has_fpga_dbg = 1, \
 	.display.fbc_mask = BIT(INTEL_FBC_A), \
 	.display.has_hdcp = 1, \
 	.display.has_dmc = 1, \
@@ -894,7 +892,6 @@ static const struct intel_device_info adl_s_info = {
 	.display.has_dmc = 1,							\
 	.display.has_dsc = 1,							\
 	.display.fbc_mask = BIT(INTEL_FBC_A),					\
-	.display.has_fpga_dbg = 1,						\
 	.display.has_hdcp = 1,							\
 	.display.has_hotplug = 1,						\
 	.display.ver = 13,							\
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 7581ef4a68f94..e61a334b611ac 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -157,7 +157,6 @@ enum intel_ppgtt_type {
 	func(has_cdclk_crawl); \
 	func(has_dmc); \
 	func(has_dsc); \
-	func(has_fpga_dbg); \
 	func(has_gmch); \
 	func(has_hdcp); \
 	func(has_hotplug); \
-- 
2.36.0

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/16] drm/i915: Drop has_llc from device info

[Patchwork]

== Series Details ==

Series: series starting with [01/16] drm/i915: Drop has_llc from device info
URL   : https://patchwork.freedesktop.org/series/103718/
State : warning

== Summary ==

Error: dim checkpatch failed
749bad5dad9c drm/i915: Drop has_llc from device info
-:48: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#48: FILE: drivers/gpu/drm/i915/i915_drv.h:1239:
+#define HAS_LLC(dev_priv)	(!IS_DGFX(dev_priv) && (GRAPHICS_VER(dev_priv) >= 8 || \
+							IS_HASWELL(dev_priv) || \
+							IS_IVYBRIDGE(dev_priv) || \
+							IS_SANDYBRIDGE(dev_priv)))

total: 0 errors, 0 warnings, 1 checks, 54 lines checked
54a34a98dcc4 drm/i915: Drop has_ipc from device info
59fd2eb5368e drm/i915/display: Disable DSB for DG2 and Alderlake-P
d0c64ff37c59 drm/i915: Drop has_rc6p from device info
-:33: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#33: FILE: drivers/gpu/drm/i915/i915_drv.h:1318:
+#define HAS_RC6p(dev_priv)		 (IS_SANDYBRIDGE(dev_priv) || IS_IVYBRIDGE(dev_priv))

total: 0 errors, 0 warnings, 1 checks, 36 lines checked
1832f734ee5e drm/i915: Drop has_psr_hw_tracking from device info
-:36: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#36: FILE: drivers/gpu/drm/i915/display/intel_psr.c:87:
+#define HAS_PSR_HW_TRACKING(dev_priv) ((DISPLAY_VER(dev_priv) >= 9 && \
+					DISPLAY_VER(dev_priv) <= 11) || \
+					IS_TIGERLAKE(dev_priv) || \
+					IS_DG1(dev_priv))

total: 0 errors, 0 warnings, 1 checks, 61 lines checked
d3c243f6bed4 drm/i915: Drop supports_tv from device info
-:28: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#28: FILE: drivers/gpu/drm/i915/i915_drv.h:1293:
+#define SUPPORTS_TV(dev_priv)		(IS_I915GM(dev_priv) || IS_I945GM(dev_priv) || \
+					 IS_I965GM(dev_priv) || IS_GM45(dev_priv))

total: 0 errors, 0 warnings, 1 checks, 46 lines checked
d20d70fb49a1 drm/i915: Drop has_4tile from device info
994026183810 drm/i915: Drop has_64bit_reloc from device info
574a028dd3b1 drm/i915: Drop has_global_mocs from device info
5c4257c463e4 drm/i915: Drop has_guc_deprivilege from device info
c1f37fbf76be drm/i915: Drop has_pxp from device info
d32fc5596825 drm/i915: Drop has_heci_gscfi from device info
07cf212d426a drm/i915: Drop has_heci_gscfi from device info
-:28: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#28: FILE: drivers/gpu/drm/i915/i915_drv.h:1378:
+#define HAS_L3_DPF(dev_priv) (IS_HASWELL(dev_priv) || IS_IVYBRIDGE(dev_priv))

total: 0 errors, 0 warnings, 1 checks, 51 lines checked
5198bddb1f82 drm/i915: Drop has_runtime_pm from device info
-:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#29: FILE: drivers/gpu/drm/i915/i915_drv.h:1333:
+#define HAS_RUNTIME_PM(dev_priv) (GRAPHICS_VER(dev_priv) >= 8 || \
+				  IS_HASWELL(dev_priv) || \
+				  IS_VALLEYVIEW(dev_priv))

total: 0 errors, 0 warnings, 1 checks, 54 lines checked
ca6382ffb8b2 drm/i915: Drop has_logical_ring_contexts from device info
850ead5e0d81 drm/i915: Drop display.has_fpga_db from device info
-:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#29: FILE: drivers/gpu/drm/i915/i915_drv.h:1309:
+#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (DISPLAY_VER(dev_priv) >= 9 || \
+					  IS_BROADWELL(dev_priv) || \
+					  IS_HASWELL(dev_priv))

total: 0 errors, 0 warnings, 1 checks, 38 lines checked

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/16] drm/i915: Drop has_llc from device info

[Patchwork]

== Series Details ==

Series: series starting with [01/16] drm/i915: Drop has_llc from device info
URL   : https://patchwork.freedesktop.org/series/103718/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/16] drm/i915: Drop has_llc from device info

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 4170 bytes --]

== Series Details ==

Series: series starting with [01/16] drm/i915: Drop has_llc from device info
URL   : https://patchwork.freedesktop.org/series/103718/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11620 -> Patchwork_103718v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/index.html

Participating hosts (47 -> 34)
------------------------------

  Missing    (13): bat-adls-5 bat-dg1-6 bat-dg1-5 bat-dg2-8 bat-dg2-9 fi-bsw-cyan bat-adlp-6 fi-kbl-guc bat-adln-1 bat-rpls-1 bat-rpls-2 bat-jsl-2 bat-jsl-1 

Known issues
------------

  Here are the changes found in Patchwork_103718v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s0@smem:
    - fi-bdw-gvtdvm:      NOTRUN -> [INCOMPLETE][1] ([i915#4831])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/fi-bdw-gvtdvm/igt@gem_exec_suspend@basic-s0@smem.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-snb-2600:        NOTRUN -> [SKIP][2] ([fdo#109271] / [fdo#111827])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/fi-snb-2600/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-c:
    - fi-bdw-gvtdvm:      NOTRUN -> [SKIP][3] ([fdo#109271]) +26 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/fi-bdw-gvtdvm/igt@kms_pipe_crc_basic@read-crc-pipe-c.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@hangcheck:
    - fi-snb-2600:        [INCOMPLETE][4] ([i915#3921]) -> [PASS][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/fi-snb-2600/igt@i915_selftest@live@hangcheck.html

  * igt@kms_force_connector_basic@force-connector-state:
    - fi-bdw-gvtdvm:      [DMESG-WARN][6] ([i915#5922]) -> [PASS][7]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/fi-bdw-gvtdvm/igt@kms_force_connector_basic@force-connector-state.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/fi-bdw-gvtdvm/igt@kms_force_connector_basic@force-connector-state.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#4831]: https://gitlab.freedesktop.org/drm/intel/issues/4831
  [i915#5922]: https://gitlab.freedesktop.org/drm/intel/issues/5922


Build changes
-------------

  * Linux: CI_DRM_11620 -> Patchwork_103718v1

  CI-20190529: 20190529
  CI_DRM_11620: 21604008b69633f65286f7bb4106ccc6c7f87c98 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6468: cffa5fffe9acddf49565b4caeeb5e3355ff2ea44 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_103718v1: 21604008b69633f65286f7bb4106ccc6c7f87c98 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

d0bab62f3aff drm/i915: Drop display.has_fpga_db from device info
3c996cc3acad drm/i915: Drop has_logical_ring_contexts from device info
692eccacd391 drm/i915: Drop has_runtime_pm from device info
3e2183b37f5c drm/i915: Drop has_heci_gscfi from device info
a3dca6838c1e drm/i915: Drop has_heci_gscfi from device info
9538d7a46287 drm/i915: Drop has_pxp from device info
18ab5dc6a894 drm/i915: Drop has_guc_deprivilege from device info
dd1749c7305c drm/i915: Drop has_global_mocs from device info
42c669d5f0c9 drm/i915: Drop has_64bit_reloc from device info
cd923be5df76 drm/i915: Drop has_4tile from device info
c924281ae16c drm/i915: Drop supports_tv from device info
813eddd87d58 drm/i915: Drop has_psr_hw_tracking from device info
7aaf961f595e drm/i915: Drop has_rc6p from device info
8f88d62c6dc6 drm/i915/display: Disable DSB for DG2 and Alderlake-P
b55040452510 drm/i915: Drop has_ipc from device info
249892390e40 drm/i915: Drop has_llc from device info

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/index.html

[-- Attachment #2: Type: text/html, Size: 5045 bytes --]

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [01/16] drm/i915: Drop has_llc from device info

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 16464 bytes --]

== Series Details ==

Series: series starting with [01/16] drm/i915: Drop has_llc from device info
URL   : https://patchwork.freedesktop.org/series/103718/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11620_full -> Patchwork_103718v1_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/index.html

Participating hosts (10 -> 10)
------------------------------

  Additional (3): shard-rkl shard-dg1 shard-tglu 
  Missing    (3): pig-skl-6260u pig-kbl-iris pig-glk-j5005 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_103718v1_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_plane_scaling@downscale-with-modifier-factor-0-25@pipe-d-hdmi-a-1-downscale-with-modifier:
    - {shard-tglu}:       NOTRUN -> [SKIP][1] +3 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-tglu-2/igt@kms_plane_scaling@downscale-with-modifier-factor-0-25@pipe-d-hdmi-a-1-downscale-with-modifier.html

  * igt@kms_plane_scaling@upscale-with-modifier-factor-0-25:
    - {shard-rkl}:        NOTRUN -> [SKIP][2]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-rkl-5/igt@kms_plane_scaling@upscale-with-modifier-factor-0-25.html

  
Known issues
------------

  Here are the changes found in Patchwork_103718v1_full that come from known issues:

### CI changes ###

#### Possible fixes ####

  * boot:
    - shard-skl:          ([PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [FAIL][24], [PASS][25]) ([i915#5032]) -> ([PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl10/boot.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl10/boot.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl10/boot.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl10/boot.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl10/boot.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl10/boot.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl7/boot.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl7/boot.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl7/boot.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl7/boot.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl7/boot.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl7/boot.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl4/boot.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl4/boot.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl4/boot.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl4/boot.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl4/boot.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl4/boot.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl4/boot.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl3/boot.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl3/boot.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl3/boot.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-skl3/boot.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl10/boot.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl10/boot.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl10/boot.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl10/boot.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl10/boot.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl10/boot.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl10/boot.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl3/boot.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl3/boot.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl3/boot.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl3/boot.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl4/boot.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl4/boot.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl4/boot.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl4/boot.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl4/boot.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl4/boot.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl7/boot.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl7/boot.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl7/boot.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl7/boot.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl7/boot.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-skl7/boot.html

  

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_flush@basic-wb-prw-default:
    - shard-snb:          [PASS][49] -> [SKIP][50] ([fdo#109271])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-snb4/igt@gem_exec_flush@basic-wb-prw-default.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-snb6/igt@gem_exec_flush@basic-wb-prw-default.html

  
#### Possible fixes ####

  * igt@gem_exec_flush@basic-uc-prw-default:
    - shard-snb:          [SKIP][51] ([fdo#109271]) -> [PASS][52] +3 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11620/shard-snb6/igt@gem_exec_flush@basic-uc-prw-default.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/shard-snb4/igt@gem_exec_flush@basic-uc-prw-default.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
  [fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
  [fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
  [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
  [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
  [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
  [fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
  [fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110254]: https://bugs.freedesktop.org/show_bug.cgi?id=110254
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111314]: https://bugs.freedesktop.org/show_bug.cgi?id=111314
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
  [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [fdo#112022]: https://bugs.freedesktop.org/show_bug.cgi?id=112022
  [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
  [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
  [i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1149]: https://gitlab.freedesktop.org/drm/intel/issues/1149
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
  [i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
  [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
  [i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
  [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2849]: https://gitlab.freedesktop.org/drm/intel/issues/2849
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
  [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
  [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
  [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
  [i915#3319]: https://gitlab.freedesktop.org/drm/intel/issues/3319
  [i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3376]: https://gitlab.freedesktop.org/drm/intel/issues/3376
  [i915#3464]: https://gitlab.freedesktop.org/drm/intel/issues/3464
  [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
  [i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3701]: https://gitlab.freedesktop.org/drm/intel/issues/3701
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3810]: https://gitlab.freedesktop.org/drm/intel/issues/3810
  [i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
  [i915#3828]: https://gitlab.freedesktop.org/drm/intel/issues/3828
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
  [i915#3966]: https://gitlab.freedesktop.org/drm/intel/issues/3966
  [i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4278]: https://gitlab.freedesktop.org/drm/intel/issues/4278
  [i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4369]: https://gitlab.freedesktop.org/drm/intel/issues/4369
  [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4877]: https://gitlab.freedesktop.org/drm/intel/issues/4877
  [i915#4941]: https://gitlab.freedesktop.org/drm/intel/issues/4941
  [i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
  [i915#5032]: https://gitlab.freedesktop.org/drm/intel/issues/5032
  [i915#5076]: https://gitlab.freedesktop.org/drm/intel/issues/5076
  [i915#5098]: https://gitlab.freedesktop.org/drm/intel/issues/5098
  [i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5182]: https://gitlab.freedesktop.org/drm/intel/issues/5182
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5287]: https://gitlab.freedesktop.org/drm/intel/issues/5287
  [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
  [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
  [i915#5602]: https://gitlab.freedesktop.org/drm/intel/issues/5602
  [i915#5614]: https://gitlab.freedesktop.org/drm/intel/issues/5614
  [i915#5616]: https://gitlab.freedesktop.org/drm/intel/issues/5616
  [i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658


Build changes
-------------

  * Linux: CI_DRM_11620 -> Patchwork_103718v1
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_11620: 21604008b69633f65286f7bb4106ccc6c7f87c98 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6468: cffa5fffe9acddf49565b4caeeb5e3355ff2ea44 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_103718v1: 21604008b69633f65286f7bb4106ccc6c7f87c98 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103718v1/index.html

[-- Attachment #2: Type: text/html, Size: 8895 bytes --]

Re: [Intel-gfx] [PATCH 11/16] drm/i915: Drop has_pxp from device info

[kernel test robot]

Hi "José,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next linus/master v5.18-rc5 next-20220506]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Jos-Roberto-de-Souza/drm-i915-Drop-has_llc-from-device-info/20220507-213117
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-randconfig-a011 (https://download.01.org/0day-ci/archive/20220508/202205080138.2kBqKQTb-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project af4cf1c6b8ed0d8102fc5e69acdc2fcbbcdaa9a7)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/c1a7677ed60d6907adf2824e35480433cde736ce
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Jos-Roberto-de-Souza/drm-i915-Drop-has_llc-from-device-info/20220507-213117
        git checkout c1a7677ed60d6907adf2824e35480433cde736ce
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/i915/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/i915/pxp/intel_pxp.c:115:3: error: expected ')'
                   return;
                   ^
   drivers/gpu/drm/i915/pxp/intel_pxp.c:114:2: note: to match this '('
           if (!HAS_PXP(gt->i915))
           ^
   include/linux/compiler.h:56:26: note: expanded from macro 'if'
   #define if(cond, ...) if ( __trace_if_var( !!(cond , ## __VA_ARGS__) ) )
                            ^
   1 error generated.
--
>> drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:73:3: error: expected ')'
                   return;
                   ^
   drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:72:2: note: to match this '('
           if (!HAS_PXP((pxp_to_gt(pxp)->i915)))
           ^
   include/linux/compiler.h:56:26: note: expanded from macro 'if'
   #define if(cond, ...) if ( __trace_if_var( !!(cond , ## __VA_ARGS__) ) )
                            ^
   drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:61:6: warning: no previous prototype for function 'intel_pxp_debugfs_register' [-Wmissing-prototypes]
   void intel_pxp_debugfs_register(struct intel_pxp *pxp, struct dentry *gt_root)
        ^
   drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:61:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   void intel_pxp_debugfs_register(struct intel_pxp *pxp, struct dentry *gt_root)
   ^
   static 
   1 warning and 1 error generated.


vim +115 drivers/gpu/drm/i915/pxp/intel_pxp.c

3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  108  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  109  void intel_pxp_init(struct intel_pxp *pxp)
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  110  {
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  111  	struct intel_gt *gt = pxp_to_gt(pxp);
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  112  	int ret;
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  113  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  114  	if (!HAS_PXP(gt->i915))
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24 @115  		return;
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  116  
cbbd3764b2399a Huang, Sean Z          2021-09-24  117  	mutex_init(&pxp->tee_mutex);
cbbd3764b2399a Huang, Sean Z          2021-09-24  118  
2ae096872a2c61 Huang, Sean Z          2021-09-24  119  	/*
2ae096872a2c61 Huang, Sean Z          2021-09-24  120  	 * we'll use the completion to check if there is a termination pending,
2ae096872a2c61 Huang, Sean Z          2021-09-24  121  	 * so we start it as completed and we reinit it when a termination
2ae096872a2c61 Huang, Sean Z          2021-09-24  122  	 * is triggered.
2ae096872a2c61 Huang, Sean Z          2021-09-24  123  	 */
2ae096872a2c61 Huang, Sean Z          2021-09-24  124  	init_completion(&pxp->termination);
2ae096872a2c61 Huang, Sean Z          2021-09-24  125  	complete_all(&pxp->termination);
2ae096872a2c61 Huang, Sean Z          2021-09-24  126  
32271ecd6596e6 Daniele Ceraolo Spurio 2021-09-24  127  	mutex_init(&pxp->arb_mutex);
2ae096872a2c61 Huang, Sean Z          2021-09-24  128  	INIT_WORK(&pxp->session_work, intel_pxp_session_work);
2ae096872a2c61 Huang, Sean Z          2021-09-24  129  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  130  	ret = create_vcs_context(pxp);
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  131  	if (ret)
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  132  		return;
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  133  
0436ac1b008d48 Huang, Sean Z          2021-09-24  134  	ret = intel_pxp_tee_component_init(pxp);
0436ac1b008d48 Huang, Sean Z          2021-09-24  135  	if (ret)
0436ac1b008d48 Huang, Sean Z          2021-09-24  136  		goto out_context;
0436ac1b008d48 Huang, Sean Z          2021-09-24  137  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  138  	drm_info(&gt->i915->drm, "Protected Xe Path (PXP) protected content support initialized\n");
0436ac1b008d48 Huang, Sean Z          2021-09-24  139  
0436ac1b008d48 Huang, Sean Z          2021-09-24  140  	return;
0436ac1b008d48 Huang, Sean Z          2021-09-24  141  
0436ac1b008d48 Huang, Sean Z          2021-09-24  142  out_context:
0436ac1b008d48 Huang, Sean Z          2021-09-24  143  	destroy_vcs_context(pxp);
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  144  }
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  145  

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

Re: [Intel-gfx] [PATCH 11/16] drm/i915: Drop has_pxp from device info

[kernel test robot]

Hi "José,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next linus/master v5.18-rc5 next-20220506]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Jos-Roberto-de-Souza/drm-i915-Drop-has_llc-from-device-info/20220507-213117
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-allyesconfig (https://download.01.org/0day-ci/archive/20220508/202205080306.RJOsIJwU-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.2.0-20) 11.2.0
reproduce (this is a W=1 build):
        # https://github.com/intel-lab-lkp/linux/commit/c1a7677ed60d6907adf2824e35480433cde736ce
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Jos-Roberto-de-Souza/drm-i915-Drop-has_llc-from-device-info/20220507-213117
        git checkout c1a7677ed60d6907adf2824e35480433cde736ce
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        make W=1 O=build_dir ARCH=i386 SHELL=/bin/bash

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/gpu/drm/i915/pxp/intel_pxp.c: In function 'intel_pxp_init':
>> drivers/gpu/drm/i915/pxp/intel_pxp.c:114:32: error: expected ')' before 'return'
     114 |         if (!HAS_PXP(gt->i915))
         |            ~                   ^
         |                                )
     115 |                 return;
         |                 ~~~~~~          
>> drivers/gpu/drm/i915/pxp/intel_pxp.c:144:1: error: expected expression before '}' token
     144 | }
         | ^
>> drivers/gpu/drm/i915/pxp/intel_pxp.c:112:13: error: unused variable 'ret' [-Werror=unused-variable]
     112 |         int ret;
         |             ^~~
   At top level:
>> drivers/gpu/drm/i915/pxp/intel_pxp.c:74:12: error: 'create_vcs_context' defined but not used [-Werror=unused-function]
      74 | static int create_vcs_context(struct intel_pxp *pxp)
         |            ^~~~~~~~~~~~~~~~~~
   cc1: all warnings being treated as errors
--
   drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:61:6: error: no previous prototype for 'intel_pxp_debugfs_register' [-Werror=missing-prototypes]
      61 | void intel_pxp_debugfs_register(struct intel_pxp *pxp, struct dentry *gt_root)
         |      ^~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c: In function 'intel_pxp_debugfs_register':
>> drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:72:46: error: expected ')' before 'return'
      72 |         if (!HAS_PXP((pxp_to_gt(pxp)->i915)))
         |            ~                                 ^
         |                                              )
      73 |                 return;
         |                 ~~~~~~                        
>> drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:80:1: error: expected expression before '}' token
      80 | }
         | ^
>> drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:67:24: error: unused variable 'root' [-Werror=unused-variable]
      67 |         struct dentry *root;
         |                        ^~~~
>> drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:63:51: error: unused variable 'files' [-Werror=unused-variable]
      63 |         static const struct intel_gt_debugfs_file files[] = {
         |                                                   ^~~~~
   At top level:
>> drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:63:51: error: 'files' defined but not used [-Werror=unused-const-variable=]
   cc1: all warnings being treated as errors


vim +114 drivers/gpu/drm/i915/pxp/intel_pxp.c

e0111ce0f5cbd2 Daniele Ceraolo Spurio 2021-09-24   73  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  @74  static int create_vcs_context(struct intel_pxp *pxp)
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   75  {
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   76  	static struct lock_class_key pxp_lock;
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   77  	struct intel_gt *gt = pxp_to_gt(pxp);
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   78  	struct intel_engine_cs *engine;
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   79  	struct intel_context *ce;
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   80  	int i;
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   81  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   82  	/*
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   83  	 * Find the first VCS engine present. We're guaranteed there is one
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   84  	 * if we're in this function due to the check in has_pxp
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   85  	 */
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   86  	for (i = 0, engine = NULL; !engine; i++)
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   87  		engine = gt->engine_class[VIDEO_DECODE_CLASS][i];
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   88  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   89  	GEM_BUG_ON(!engine || engine->class != VIDEO_DECODE_CLASS);
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   90  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   91  	ce = intel_engine_create_pinned_context(engine, engine->gt->vm, SZ_4K,
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   92  						I915_GEM_HWS_PXP_ADDR,
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   93  						&pxp_lock, "pxp_context");
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   94  	if (IS_ERR(ce)) {
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   95  		drm_err(&gt->i915->drm, "failed to create VCS ctx for PXP\n");
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   96  		return PTR_ERR(ce);
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   97  	}
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   98  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24   99  	pxp->ce = ce;
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  100  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  101  	return 0;
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  102  }
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  103  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  104  static void destroy_vcs_context(struct intel_pxp *pxp)
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  105  {
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  106  	intel_engine_destroy_pinned_context(fetch_and_zero(&pxp->ce));
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  107  }
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  108  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  109  void intel_pxp_init(struct intel_pxp *pxp)
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  110  {
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  111  	struct intel_gt *gt = pxp_to_gt(pxp);
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24 @112  	int ret;
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  113  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24 @114  	if (!HAS_PXP(gt->i915))
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  115  		return;
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  116  
cbbd3764b2399a Huang, Sean Z          2021-09-24  117  	mutex_init(&pxp->tee_mutex);
cbbd3764b2399a Huang, Sean Z          2021-09-24  118  
2ae096872a2c61 Huang, Sean Z          2021-09-24  119  	/*
2ae096872a2c61 Huang, Sean Z          2021-09-24  120  	 * we'll use the completion to check if there is a termination pending,
2ae096872a2c61 Huang, Sean Z          2021-09-24  121  	 * so we start it as completed and we reinit it when a termination
2ae096872a2c61 Huang, Sean Z          2021-09-24  122  	 * is triggered.
2ae096872a2c61 Huang, Sean Z          2021-09-24  123  	 */
2ae096872a2c61 Huang, Sean Z          2021-09-24  124  	init_completion(&pxp->termination);
2ae096872a2c61 Huang, Sean Z          2021-09-24  125  	complete_all(&pxp->termination);
2ae096872a2c61 Huang, Sean Z          2021-09-24  126  
32271ecd6596e6 Daniele Ceraolo Spurio 2021-09-24  127  	mutex_init(&pxp->arb_mutex);
2ae096872a2c61 Huang, Sean Z          2021-09-24  128  	INIT_WORK(&pxp->session_work, intel_pxp_session_work);
2ae096872a2c61 Huang, Sean Z          2021-09-24  129  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  130  	ret = create_vcs_context(pxp);
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  131  	if (ret)
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  132  		return;
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  133  
0436ac1b008d48 Huang, Sean Z          2021-09-24  134  	ret = intel_pxp_tee_component_init(pxp);
0436ac1b008d48 Huang, Sean Z          2021-09-24  135  	if (ret)
0436ac1b008d48 Huang, Sean Z          2021-09-24  136  		goto out_context;
0436ac1b008d48 Huang, Sean Z          2021-09-24  137  
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  138  	drm_info(&gt->i915->drm, "Protected Xe Path (PXP) protected content support initialized\n");
0436ac1b008d48 Huang, Sean Z          2021-09-24  139  
0436ac1b008d48 Huang, Sean Z          2021-09-24  140  	return;
0436ac1b008d48 Huang, Sean Z          2021-09-24  141  
0436ac1b008d48 Huang, Sean Z          2021-09-24  142  out_context:
0436ac1b008d48 Huang, Sean Z          2021-09-24  143  	destroy_vcs_context(pxp);
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24 @144  }
3ad2dd9c4caa73 Daniele Ceraolo Spurio 2021-09-24  145  

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

Re: [Intel-gfx] [PATCH 01/16] drm/i915: Drop has_llc from device info

[Matthew Auld]

On Sat, 7 May 2022 at 14:29, José Roberto de Souza <jose.souza@intel.com> wrote:
>
> This feature is supported in graphics version 6 and newer in all
> integrated GPUs not including VLC and CHV, so we can drop this flag
> for a not so complicated macro check.

s/VLC/VLV/ ?

There are also some gen9/10 platforms that only have snooping.

>
> For this flag we were lucky as XE_HP_FEATURES was setting it to true
> while DGFX_FEATURES was setting it to false and xehpsdv and DG2 were
> using those macros in this givin order if it was the other way around,
> some code paths would follow the HAS_LLC path while LLC is not
> available in hardware and was not initialized in software.
>
> As a side effect of the of removal this flag, it will not be printed
> in dmesg during driver load anymore and developers will have to rely
> on to check the macro and compare with platform being used and IP
> versions of it.
>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_llc.c      | 2 +-
>  drivers/gpu/drm/i915/i915_drv.h          | 5 ++++-
>  drivers/gpu/drm/i915/i915_pci.c          | 4 ----
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  4 files changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c b/drivers/gpu/drm/i915/gt/intel_llc.c
> index 40e2e28ee6c75..ffcff51ee6e47 100644
> --- a/drivers/gpu/drm/i915/gt/intel_llc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_llc.c
> @@ -52,7 +52,7 @@ static bool get_ia_constants(struct intel_llc *llc,
>         struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
>         struct intel_rps *rps = &llc_to_gt(llc)->rps;
>
> -       if (!HAS_LLC(i915) || IS_DGFX(i915))
> +       if (!HAS_LLC(i915))
>                 return false;
>
>         if (rps->max_freq <= rps->min_freq)
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 6dfaf7fce9156..fd5269845e9ad 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1236,7 +1236,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>   */
>  #define CMDPARSER_USES_GGTT(dev_priv) (GRAPHICS_VER(dev_priv) == 7)
>
> -#define HAS_LLC(dev_priv)      (INTEL_INFO(dev_priv)->has_llc)
> +#define HAS_LLC(dev_priv)      (!IS_DGFX(dev_priv) && (GRAPHICS_VER(dev_priv) >= 8 || \
> +                                                       IS_HASWELL(dev_priv) || \
> +                                                       IS_IVYBRIDGE(dev_priv) || \
> +                                                       IS_SANDYBRIDGE(dev_priv)))
>  #define HAS_4TILE(dev_priv)    (INTEL_INFO(dev_priv)->has_4tile)
>  #define HAS_SNOOP(dev_priv)    (INTEL_INFO(dev_priv)->has_snoop)
>  #define HAS_EDRAM(dev_priv)    ((dev_priv)->edram_size_mb)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 799573a5e5a6f..30a32a5d0e3c9 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -404,7 +404,6 @@ static const struct intel_device_info ilk_m_info = {
>         .display.fbc_mask = BIT(INTEL_FBC_A), \
>         .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
>         .has_coherent_ggtt = true, \
> -       .has_llc = 1, \
>         .has_rc6p = 1, \
>         .has_rps = true, \
>         .dma_mask_size = 40, \
> @@ -454,7 +453,6 @@ static const struct intel_device_info snb_m_gt2_info = {
>         .display.fbc_mask = BIT(INTEL_FBC_A), \
>         .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
>         .has_coherent_ggtt = true, \
> -       .has_llc = 1, \
>         .has_rc6p = 1, \
>         .has_rps = true, \
>         .dma_mask_size = 40, \
> @@ -878,7 +876,6 @@ static const struct intel_device_info rkl_info = {
>
>  #define DGFX_FEATURES \
>         .memory_regions = REGION_SMEM | REGION_LMEM | REGION_STOLEN_LMEM, \
> -       .has_llc = 0, \
>         .has_pxp = 0, \
>         .has_snoop = 1, \
>         .is_dgfx = 1, \
> @@ -985,7 +982,6 @@ static const struct intel_device_info adl_p_info = {
>         .has_64bit_reloc = 1, \
>         .has_flat_ccs = 1, \
>         .has_global_mocs = 1, \
> -       .has_llc = 1, \
>         .has_logical_ring_contexts = 1, \
>         .has_mslices = 1, \
>         .has_rps = 1, \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index a2e53b8683285..e8d53c7a1bd83 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -149,7 +149,6 @@ enum intel_ppgtt_type {
>         func(has_heci_gscfi); \
>         func(has_guc_deprivilege); \
>         func(has_l3_dpf); \
> -       func(has_llc); \
>         func(has_logical_ring_contexts); \
>         func(has_mslices); \
>         func(has_pooled_eu); \
> --
> 2.36.0
>

Re: [Intel-gfx] [PATCH 16/16] drm/i915: Drop display.has_fpga_db from device info

[Joonas Lahtinen]

Quoting José Roberto de Souza (2022-05-07 16:28:50)
> No need to have this parameter in intel_device_info struct
> as this feature is supported by Broadwell, Haswell all platforms with
> display version 9 or newer.

This is opposite of the direction we want to move to.

We want to embrace the has_xyz flags, instead of the macro trickery.

> As a side effect of the of removal this flag, it will not be printed
> in dmesg during driver load anymore and developers will have to rely
> on to check the macro and compare with platform being used and IP
> versions of it.

This is not a very good rationale. If the platform has something, but it
becomes disabled in runtime, then we should add an another print after
the runtime sanitization has been done.

Regards, Joonas

> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 4 +++-
>  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  3 files changed, 3 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 4b1025dbaab2a..4a1edf48d37b9 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1306,7 +1306,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>                                           IS_BROADWELL(dev_priv) || \
>                                           IS_HASWELL(dev_priv))
>  #define HAS_DP_MST(dev_priv)            (HAS_DDI(dev_priv))
> -#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
> +#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (DISPLAY_VER(dev_priv) >= 9 || \
> +                                         IS_BROADWELL(dev_priv) || \
> +                                         IS_HASWELL(dev_priv))
>  #define HAS_PSR(dev_priv)               (DISPLAY_VER(dev_priv) >= 9)
>  #define HAS_PSR2_SEL_FETCH(dev_priv)    (DISPLAY_VER(dev_priv) >= 12)
>  #define HAS_TRANSCODER(dev_priv, trans)         ((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 5a42acb162a15..6a5b70b3ea2d7 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -523,7 +523,6 @@ static const struct intel_device_info vlv_info = {
>         .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
>         .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
>                 BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
> -       .display.has_fpga_dbg = 1, \
>         HSW_PIPE_OFFSETS
>  
>  #define HSW_PLATFORM \
> @@ -657,7 +656,6 @@ static const struct intel_device_info skl_gt4_info = {
>         .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
>                 BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
>                 BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
> -       .display.has_fpga_dbg = 1, \
>         .display.fbc_mask = BIT(INTEL_FBC_A), \
>         .display.has_hdcp = 1, \
>         .display.has_dmc = 1, \
> @@ -894,7 +892,6 @@ static const struct intel_device_info adl_s_info = {
>         .display.has_dmc = 1,                                                   \
>         .display.has_dsc = 1,                                                   \
>         .display.fbc_mask = BIT(INTEL_FBC_A),                                   \
> -       .display.has_fpga_dbg = 1,                                              \
>         .display.has_hdcp = 1,                                                  \
>         .display.has_hotplug = 1,                                               \
>         .display.ver = 13,                                                      \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 7581ef4a68f94..e61a334b611ac 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -157,7 +157,6 @@ enum intel_ppgtt_type {
>         func(has_cdclk_crawl); \
>         func(has_dmc); \
>         func(has_dsc); \
> -       func(has_fpga_dbg); \
>         func(has_gmch); \
>         func(has_hdcp); \
>         func(has_hotplug); \
> -- 
> 2.36.0
> 

Re: [Intel-gfx] [PATCH 01/16] drm/i915: Drop has_llc from device info

[Souza, Jose]

On Mon, 2022-05-09 at 12:09 +0100, Matthew Auld wrote:
> On Sat, 7 May 2022 at 14:29, José Roberto de Souza <jose.souza@intel.com> wrote:
> > 
> > This feature is supported in graphics version 6 and newer in all
> > integrated GPUs not including VLC and CHV, so we can drop this flag
> > for a not so complicated macro check.
> 
> s/VLC/VLV/ ?

yep, thanks.

> 
> There are also some gen9/10 platforms that only have snooping.

That is not reflected into current platform definition.
Can you point out the spec pages?

> 
> > 
> > For this flag we were lucky as XE_HP_FEATURES was setting it to true
> > while DGFX_FEATURES was setting it to false and xehpsdv and DG2 were
> > using those macros in this givin order if it was the other way around,
> > some code paths would follow the HAS_LLC path while LLC is not
> > available in hardware and was not initialized in software.
> > 
> > As a side effect of the of removal this flag, it will not be printed
> > in dmesg during driver load anymore and developers will have to rely
> > on to check the macro and compare with platform being used and IP
> > versions of it.
> > 
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> >  drivers/gpu/drm/i915/gt/intel_llc.c      | 2 +-
> >  drivers/gpu/drm/i915/i915_drv.h          | 5 ++++-
> >  drivers/gpu/drm/i915/i915_pci.c          | 4 ----
> >  drivers/gpu/drm/i915/intel_device_info.h | 1 -
> >  4 files changed, 5 insertions(+), 7 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c b/drivers/gpu/drm/i915/gt/intel_llc.c
> > index 40e2e28ee6c75..ffcff51ee6e47 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_llc.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_llc.c
> > @@ -52,7 +52,7 @@ static bool get_ia_constants(struct intel_llc *llc,
> >         struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
> >         struct intel_rps *rps = &llc_to_gt(llc)->rps;
> > 
> > -       if (!HAS_LLC(i915) || IS_DGFX(i915))
> > +       if (!HAS_LLC(i915))
> >                 return false;
> > 
> >         if (rps->max_freq <= rps->min_freq)
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 6dfaf7fce9156..fd5269845e9ad 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1236,7 +1236,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> >   */
> >  #define CMDPARSER_USES_GGTT(dev_priv) (GRAPHICS_VER(dev_priv) == 7)
> > 
> > -#define HAS_LLC(dev_priv)      (INTEL_INFO(dev_priv)->has_llc)
> > +#define HAS_LLC(dev_priv)      (!IS_DGFX(dev_priv) && (GRAPHICS_VER(dev_priv) >= 8 || \
> > +                                                       IS_HASWELL(dev_priv) || \
> > +                                                       IS_IVYBRIDGE(dev_priv) || \
> > +                                                       IS_SANDYBRIDGE(dev_priv)))
> >  #define HAS_4TILE(dev_priv)    (INTEL_INFO(dev_priv)->has_4tile)
> >  #define HAS_SNOOP(dev_priv)    (INTEL_INFO(dev_priv)->has_snoop)
> >  #define HAS_EDRAM(dev_priv)    ((dev_priv)->edram_size_mb)
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > index 799573a5e5a6f..30a32a5d0e3c9 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -404,7 +404,6 @@ static const struct intel_device_info ilk_m_info = {
> >         .display.fbc_mask = BIT(INTEL_FBC_A), \
> >         .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
> >         .has_coherent_ggtt = true, \
> > -       .has_llc = 1, \
> >         .has_rc6p = 1, \
> >         .has_rps = true, \
> >         .dma_mask_size = 40, \
> > @@ -454,7 +453,6 @@ static const struct intel_device_info snb_m_gt2_info = {
> >         .display.fbc_mask = BIT(INTEL_FBC_A), \
> >         .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
> >         .has_coherent_ggtt = true, \
> > -       .has_llc = 1, \
> >         .has_rc6p = 1, \
> >         .has_rps = true, \
> >         .dma_mask_size = 40, \
> > @@ -878,7 +876,6 @@ static const struct intel_device_info rkl_info = {
> > 
> >  #define DGFX_FEATURES \
> >         .memory_regions = REGION_SMEM | REGION_LMEM | REGION_STOLEN_LMEM, \
> > -       .has_llc = 0, \
> >         .has_pxp = 0, \
> >         .has_snoop = 1, \
> >         .is_dgfx = 1, \
> > @@ -985,7 +982,6 @@ static const struct intel_device_info adl_p_info = {
> >         .has_64bit_reloc = 1, \
> >         .has_flat_ccs = 1, \
> >         .has_global_mocs = 1, \
> > -       .has_llc = 1, \
> >         .has_logical_ring_contexts = 1, \
> >         .has_mslices = 1, \
> >         .has_rps = 1, \
> > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> > index a2e53b8683285..e8d53c7a1bd83 100644
> > --- a/drivers/gpu/drm/i915/intel_device_info.h
> > +++ b/drivers/gpu/drm/i915/intel_device_info.h
> > @@ -149,7 +149,6 @@ enum intel_ppgtt_type {
> >         func(has_heci_gscfi); \
> >         func(has_guc_deprivilege); \
> >         func(has_l3_dpf); \
> > -       func(has_llc); \
> >         func(has_logical_ring_contexts); \
> >         func(has_mslices); \
> >         func(has_pooled_eu); \
> > --
> > 2.36.0
> > 

Re: [Intel-gfx] [PATCH 16/16] drm/i915: Drop display.has_fpga_db from device info

[Souza, Jose]

On Mon, 2022-05-09 at 15:38 +0300, Joonas Lahtinen wrote:
> Quoting José Roberto de Souza (2022-05-07 16:28:50)
> > No need to have this parameter in intel_device_info struct
> > as this feature is supported by Broadwell, Haswell all platforms with
> > display version 9 or newer.
> 
> This is opposite of the direction we want to move to.
> 
> We want to embrace the has_xyz flags, instead of the macro trickery.

This ever growing flag definition is causing problems when defining new platforms.

There is too many features to check if a new platform supports each one of it, what is leading to platform definition errors.

Also usually when a feature is dropped a HSD will be filed, so the person taking care of that can just adjust the macro upper platform or IP bound and
disable it for good. 

> 
> > As a side effect of the of removal this flag, it will not be printed
> > in dmesg during driver load anymore and developers will have to rely
> > on to check the macro and compare with platform being used and IP
> > versions of it.
> 
> This is not a very good rationale. If the platform has something, but it
> becomes disabled in runtime, then we should add an another print after
> the runtime sanitization has been done.

In my opinion this flags should only change in runtime if the feature is fused off like is done for has_dsc and has_dmc.

> 
> Regards, Joonas
> 
> > 
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h          | 4 +++-
> >  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
> >  drivers/gpu/drm/i915/intel_device_info.h | 1 -
> >  3 files changed, 3 insertions(+), 5 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 4b1025dbaab2a..4a1edf48d37b9 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1306,7 +1306,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> >                                           IS_BROADWELL(dev_priv) || \
> >                                           IS_HASWELL(dev_priv))
> >  #define HAS_DP_MST(dev_priv)            (HAS_DDI(dev_priv))
> > -#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
> > +#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (DISPLAY_VER(dev_priv) >= 9 || \
> > +                                         IS_BROADWELL(dev_priv) || \
> > +                                         IS_HASWELL(dev_priv))
> >  #define HAS_PSR(dev_priv)               (DISPLAY_VER(dev_priv) >= 9)
> >  #define HAS_PSR2_SEL_FETCH(dev_priv)    (DISPLAY_VER(dev_priv) >= 12)
> >  #define HAS_TRANSCODER(dev_priv, trans)         ((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0)
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > index 5a42acb162a15..6a5b70b3ea2d7 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -523,7 +523,6 @@ static const struct intel_device_info vlv_info = {
> >         .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
> >         .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
> >                 BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
> > -       .display.has_fpga_dbg = 1, \
> >         HSW_PIPE_OFFSETS
> >  
> >  #define HSW_PLATFORM \
> > @@ -657,7 +656,6 @@ static const struct intel_device_info skl_gt4_info = {
> >         .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
> >                 BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
> >                 BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
> > -       .display.has_fpga_dbg = 1, \
> >         .display.fbc_mask = BIT(INTEL_FBC_A), \
> >         .display.has_hdcp = 1, \
> >         .display.has_dmc = 1, \
> > @@ -894,7 +892,6 @@ static const struct intel_device_info adl_s_info = {
> >         .display.has_dmc = 1,                                                   \
> >         .display.has_dsc = 1,                                                   \
> >         .display.fbc_mask = BIT(INTEL_FBC_A),                                   \
> > -       .display.has_fpga_dbg = 1,                                              \
> >         .display.has_hdcp = 1,                                                  \
> >         .display.has_hotplug = 1,                                               \
> >         .display.ver = 13,                                                      \
> > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> > index 7581ef4a68f94..e61a334b611ac 100644
> > --- a/drivers/gpu/drm/i915/intel_device_info.h
> > +++ b/drivers/gpu/drm/i915/intel_device_info.h
> > @@ -157,7 +157,6 @@ enum intel_ppgtt_type {
> >         func(has_cdclk_crawl); \
> >         func(has_dmc); \
> >         func(has_dsc); \
> > -       func(has_fpga_dbg); \
> >         func(has_gmch); \
> >         func(has_hdcp); \
> >         func(has_hotplug); \
> > -- 
> > 2.36.0
> > 

Re: [Intel-gfx] [PATCH 01/16] drm/i915: Drop has_llc from device info

[Matthew Auld]

On Mon, 9 May 2022 at 15:05, Souza, Jose <jose.souza@intel.com> wrote:
>
> On Mon, 2022-05-09 at 12:09 +0100, Matthew Auld wrote:
> > On Sat, 7 May 2022 at 14:29, José Roberto de Souza <jose.souza@intel.com> wrote:
> > >
> > > This feature is supported in graphics version 6 and newer in all
> > > integrated GPUs not including VLC and CHV, so we can drop this flag
> > > for a not so complicated macro check.
> >
> > s/VLC/VLV/ ?
>
> yep, thanks.
>
> >
> > There are also some gen9/10 platforms that only have snooping.
>
> That is not reflected into current platform definition.

See glk_info/bxt_info.

> Can you point out the spec pages?
>
> >
> > >
> > > For this flag we were lucky as XE_HP_FEATURES was setting it to true
> > > while DGFX_FEATURES was setting it to false and xehpsdv and DG2 were
> > > using those macros in this givin order if it was the other way around,
> > > some code paths would follow the HAS_LLC path while LLC is not
> > > available in hardware and was not initialized in software.
> > >
> > > As a side effect of the of removal this flag, it will not be printed
> > > in dmesg during driver load anymore and developers will have to rely
> > > on to check the macro and compare with platform being used and IP
> > > versions of it.
> > >
> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/gt/intel_llc.c      | 2 +-
> > >  drivers/gpu/drm/i915/i915_drv.h          | 5 ++++-
> > >  drivers/gpu/drm/i915/i915_pci.c          | 4 ----
> > >  drivers/gpu/drm/i915/intel_device_info.h | 1 -
> > >  4 files changed, 5 insertions(+), 7 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c b/drivers/gpu/drm/i915/gt/intel_llc.c
> > > index 40e2e28ee6c75..ffcff51ee6e47 100644
> > > --- a/drivers/gpu/drm/i915/gt/intel_llc.c
> > > +++ b/drivers/gpu/drm/i915/gt/intel_llc.c
> > > @@ -52,7 +52,7 @@ static bool get_ia_constants(struct intel_llc *llc,
> > >         struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
> > >         struct intel_rps *rps = &llc_to_gt(llc)->rps;
> > >
> > > -       if (!HAS_LLC(i915) || IS_DGFX(i915))
> > > +       if (!HAS_LLC(i915))
> > >                 return false;
> > >
> > >         if (rps->max_freq <= rps->min_freq)
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > > index 6dfaf7fce9156..fd5269845e9ad 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -1236,7 +1236,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> > >   */
> > >  #define CMDPARSER_USES_GGTT(dev_priv) (GRAPHICS_VER(dev_priv) == 7)
> > >
> > > -#define HAS_LLC(dev_priv)      (INTEL_INFO(dev_priv)->has_llc)
> > > +#define HAS_LLC(dev_priv)      (!IS_DGFX(dev_priv) && (GRAPHICS_VER(dev_priv) >= 8 || \
> > > +                                                       IS_HASWELL(dev_priv) || \
> > > +                                                       IS_IVYBRIDGE(dev_priv) || \
> > > +                                                       IS_SANDYBRIDGE(dev_priv)))
> > >  #define HAS_4TILE(dev_priv)    (INTEL_INFO(dev_priv)->has_4tile)
> > >  #define HAS_SNOOP(dev_priv)    (INTEL_INFO(dev_priv)->has_snoop)
> > >  #define HAS_EDRAM(dev_priv)    ((dev_priv)->edram_size_mb)
> > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > > index 799573a5e5a6f..30a32a5d0e3c9 100644
> > > --- a/drivers/gpu/drm/i915/i915_pci.c
> > > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > > @@ -404,7 +404,6 @@ static const struct intel_device_info ilk_m_info = {
> > >         .display.fbc_mask = BIT(INTEL_FBC_A), \
> > >         .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
> > >         .has_coherent_ggtt = true, \
> > > -       .has_llc = 1, \
> > >         .has_rc6p = 1, \
> > >         .has_rps = true, \
> > >         .dma_mask_size = 40, \
> > > @@ -454,7 +453,6 @@ static const struct intel_device_info snb_m_gt2_info = {
> > >         .display.fbc_mask = BIT(INTEL_FBC_A), \
> > >         .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
> > >         .has_coherent_ggtt = true, \
> > > -       .has_llc = 1, \
> > >         .has_rc6p = 1, \
> > >         .has_rps = true, \
> > >         .dma_mask_size = 40, \
> > > @@ -878,7 +876,6 @@ static const struct intel_device_info rkl_info = {
> > >
> > >  #define DGFX_FEATURES \
> > >         .memory_regions = REGION_SMEM | REGION_LMEM | REGION_STOLEN_LMEM, \
> > > -       .has_llc = 0, \
> > >         .has_pxp = 0, \
> > >         .has_snoop = 1, \
> > >         .is_dgfx = 1, \
> > > @@ -985,7 +982,6 @@ static const struct intel_device_info adl_p_info = {
> > >         .has_64bit_reloc = 1, \
> > >         .has_flat_ccs = 1, \
> > >         .has_global_mocs = 1, \
> > > -       .has_llc = 1, \
> > >         .has_logical_ring_contexts = 1, \
> > >         .has_mslices = 1, \
> > >         .has_rps = 1, \
> > > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> > > index a2e53b8683285..e8d53c7a1bd83 100644
> > > --- a/drivers/gpu/drm/i915/intel_device_info.h
> > > +++ b/drivers/gpu/drm/i915/intel_device_info.h
> > > @@ -149,7 +149,6 @@ enum intel_ppgtt_type {
> > >         func(has_heci_gscfi); \
> > >         func(has_guc_deprivilege); \
> > >         func(has_l3_dpf); \
> > > -       func(has_llc); \
> > >         func(has_logical_ring_contexts); \
> > >         func(has_mslices); \
> > >         func(has_pooled_eu); \
> > > --
> > > 2.36.0
> > >
>

Re: [Intel-gfx] [PATCH 01/16] drm/i915: Drop has_llc from device info

[Souza, Jose]

On Mon, 2022-05-09 at 15:52 +0100, Matthew Auld wrote:
> On Mon, 9 May 2022 at 15:05, Souza, Jose <jose.souza@intel.com> wrote:
> > 
> > On Mon, 2022-05-09 at 12:09 +0100, Matthew Auld wrote:
> > > On Sat, 7 May 2022 at 14:29, José Roberto de Souza <jose.souza@intel.com> wrote:
> > > > 
> > > > This feature is supported in graphics version 6 and newer in all
> > > > integrated GPUs not including VLC and CHV, so we can drop this flag
> > > > for a not so complicated macro check.
> > > 
> > > s/VLC/VLV/ ?
> > 
> > yep, thanks.
> > 
> > > 
> > > There are also some gen9/10 platforms that only have snooping.
> > 
> > That is not reflected into current platform definition.
> 
> See glk_info/bxt_info.

Oh okay, missed that.
In this case the macro gets too big and is better to keep the flag into device info.

> 
> > Can you point out the spec pages?
> > 
> > > 
> > > > 
> > > > For this flag we were lucky as XE_HP_FEATURES was setting it to true
> > > > while DGFX_FEATURES was setting it to false and xehpsdv and DG2 were
> > > > using those macros in this givin order if it was the other way around,
> > > > some code paths would follow the HAS_LLC path while LLC is not
> > > > available in hardware and was not initialized in software.
> > > > 
> > > > As a side effect of the of removal this flag, it will not be printed
> > > > in dmesg during driver load anymore and developers will have to rely
> > > > on to check the macro and compare with platform being used and IP
> > > > versions of it.
> > > > 
> > > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/gt/intel_llc.c      | 2 +-
> > > >  drivers/gpu/drm/i915/i915_drv.h          | 5 ++++-
> > > >  drivers/gpu/drm/i915/i915_pci.c          | 4 ----
> > > >  drivers/gpu/drm/i915/intel_device_info.h | 1 -
> > > >  4 files changed, 5 insertions(+), 7 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c b/drivers/gpu/drm/i915/gt/intel_llc.c
> > > > index 40e2e28ee6c75..ffcff51ee6e47 100644
> > > > --- a/drivers/gpu/drm/i915/gt/intel_llc.c
> > > > +++ b/drivers/gpu/drm/i915/gt/intel_llc.c
> > > > @@ -52,7 +52,7 @@ static bool get_ia_constants(struct intel_llc *llc,
> > > >         struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
> > > >         struct intel_rps *rps = &llc_to_gt(llc)->rps;
> > > > 
> > > > -       if (!HAS_LLC(i915) || IS_DGFX(i915))
> > > > +       if (!HAS_LLC(i915))
> > > >                 return false;
> > > > 
> > > >         if (rps->max_freq <= rps->min_freq)
> > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > > > index 6dfaf7fce9156..fd5269845e9ad 100644
> > > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > > @@ -1236,7 +1236,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> > > >   */
> > > >  #define CMDPARSER_USES_GGTT(dev_priv) (GRAPHICS_VER(dev_priv) == 7)
> > > > 
> > > > -#define HAS_LLC(dev_priv)      (INTEL_INFO(dev_priv)->has_llc)
> > > > +#define HAS_LLC(dev_priv)      (!IS_DGFX(dev_priv) && (GRAPHICS_VER(dev_priv) >= 8 || \
> > > > +                                                       IS_HASWELL(dev_priv) || \
> > > > +                                                       IS_IVYBRIDGE(dev_priv) || \
> > > > +                                                       IS_SANDYBRIDGE(dev_priv)))
> > > >  #define HAS_4TILE(dev_priv)    (INTEL_INFO(dev_priv)->has_4tile)
> > > >  #define HAS_SNOOP(dev_priv)    (INTEL_INFO(dev_priv)->has_snoop)
> > > >  #define HAS_EDRAM(dev_priv)    ((dev_priv)->edram_size_mb)
> > > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > > > index 799573a5e5a6f..30a32a5d0e3c9 100644
> > > > --- a/drivers/gpu/drm/i915/i915_pci.c
> > > > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > > > @@ -404,7 +404,6 @@ static const struct intel_device_info ilk_m_info = {
> > > >         .display.fbc_mask = BIT(INTEL_FBC_A), \
> > > >         .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
> > > >         .has_coherent_ggtt = true, \
> > > > -       .has_llc = 1, \
> > > >         .has_rc6p = 1, \
> > > >         .has_rps = true, \
> > > >         .dma_mask_size = 40, \
> > > > @@ -454,7 +453,6 @@ static const struct intel_device_info snb_m_gt2_info = {
> > > >         .display.fbc_mask = BIT(INTEL_FBC_A), \
> > > >         .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
> > > >         .has_coherent_ggtt = true, \
> > > > -       .has_llc = 1, \
> > > >         .has_rc6p = 1, \
> > > >         .has_rps = true, \
> > > >         .dma_mask_size = 40, \
> > > > @@ -878,7 +876,6 @@ static const struct intel_device_info rkl_info = {
> > > > 
> > > >  #define DGFX_FEATURES \
> > > >         .memory_regions = REGION_SMEM | REGION_LMEM | REGION_STOLEN_LMEM, \
> > > > -       .has_llc = 0, \
> > > >         .has_pxp = 0, \
> > > >         .has_snoop = 1, \
> > > >         .is_dgfx = 1, \
> > > > @@ -985,7 +982,6 @@ static const struct intel_device_info adl_p_info = {
> > > >         .has_64bit_reloc = 1, \
> > > >         .has_flat_ccs = 1, \
> > > >         .has_global_mocs = 1, \
> > > > -       .has_llc = 1, \
> > > >         .has_logical_ring_contexts = 1, \
> > > >         .has_mslices = 1, \
> > > >         .has_rps = 1, \
> > > > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> > > > index a2e53b8683285..e8d53c7a1bd83 100644
> > > > --- a/drivers/gpu/drm/i915/intel_device_info.h
> > > > +++ b/drivers/gpu/drm/i915/intel_device_info.h
> > > > @@ -149,7 +149,6 @@ enum intel_ppgtt_type {
> > > >         func(has_heci_gscfi); \
> > > >         func(has_guc_deprivilege); \
> > > >         func(has_l3_dpf); \
> > > > -       func(has_llc); \
> > > >         func(has_logical_ring_contexts); \
> > > >         func(has_mslices); \
> > > >         func(has_pooled_eu); \
> > > > --
> > > > 2.36.0
> > > > 
> > 

Re: [Intel-gfx] [PATCH 16/16] drm/i915: Drop display.has_fpga_db from device info

[Joonas Lahtinen]

Quoting Souza, Jose (2022-05-09 17:19:28)
> On Mon, 2022-05-09 at 15:38 +0300, Joonas Lahtinen wrote:
> > Quoting José Roberto de Souza (2022-05-07 16:28:50)
> > > No need to have this parameter in intel_device_info struct
> > > as this feature is supported by Broadwell, Haswell all platforms with
> > > display version 9 or newer.
> > 
> > This is opposite of the direction we want to move to.
> > 
> > We want to embrace the has_xyz flags, instead of the macro trickery.
> 
> This ever growing flag definition is causing problems when defining new platforms.

The ever growing macros that change between kernel versions are much
more painful than easily printable list per SKU.

Just to make it clear, a strict NACK from me for merging any patches
into this direction.

Regards, Joonas

> 
> There is too many features to check if a new platform supports each one of it, what is leading to platform definition errors.
> 
> Also usually when a feature is dropped a HSD will be filed, so the person taking care of that can just adjust the macro upper platform or IP bound and
> disable it for good. 
> 
> > 
> > > As a side effect of the of removal this flag, it will not be printed
> > > in dmesg during driver load anymore and developers will have to rely
> > > on to check the macro and compare with platform being used and IP
> > > versions of it.
> > 
> > This is not a very good rationale. If the platform has something, but it
> > becomes disabled in runtime, then we should add an another print after
> > the runtime sanitization has been done.
> 
> In my opinion this flags should only change in runtime if the feature is fused off like is done for has_dsc and has_dmc.
> 
> > 
> > Regards, Joonas
> > 
> > > 
> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/i915_drv.h          | 4 +++-
> > >  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
> > >  drivers/gpu/drm/i915/intel_device_info.h | 1 -
> > >  3 files changed, 3 insertions(+), 5 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > > index 4b1025dbaab2a..4a1edf48d37b9 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -1306,7 +1306,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> > >                                           IS_BROADWELL(dev_priv) || \
> > >                                           IS_HASWELL(dev_priv))
> > >  #define HAS_DP_MST(dev_priv)            (HAS_DDI(dev_priv))
> > > -#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
> > > +#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (DISPLAY_VER(dev_priv) >= 9 || \
> > > +                                         IS_BROADWELL(dev_priv) || \
> > > +                                         IS_HASWELL(dev_priv))
> > >  #define HAS_PSR(dev_priv)               (DISPLAY_VER(dev_priv) >= 9)
> > >  #define HAS_PSR2_SEL_FETCH(dev_priv)    (DISPLAY_VER(dev_priv) >= 12)
> > >  #define HAS_TRANSCODER(dev_priv, trans)         ((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0)
> > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > > index 5a42acb162a15..6a5b70b3ea2d7 100644
> > > --- a/drivers/gpu/drm/i915/i915_pci.c
> > > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > > @@ -523,7 +523,6 @@ static const struct intel_device_info vlv_info = {
> > >         .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
> > >         .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
> > >                 BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
> > > -       .display.has_fpga_dbg = 1, \
> > >         HSW_PIPE_OFFSETS
> > >  
> > >  #define HSW_PLATFORM \
> > > @@ -657,7 +656,6 @@ static const struct intel_device_info skl_gt4_info = {
> > >         .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
> > >                 BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
> > >                 BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
> > > -       .display.has_fpga_dbg = 1, \
> > >         .display.fbc_mask = BIT(INTEL_FBC_A), \
> > >         .display.has_hdcp = 1, \
> > >         .display.has_dmc = 1, \
> > > @@ -894,7 +892,6 @@ static const struct intel_device_info adl_s_info = {
> > >         .display.has_dmc = 1,                                                   \
> > >         .display.has_dsc = 1,                                                   \
> > >         .display.fbc_mask = BIT(INTEL_FBC_A),                                   \
> > > -       .display.has_fpga_dbg = 1,                                              \
> > >         .display.has_hdcp = 1,                                                  \
> > >         .display.has_hotplug = 1,                                               \
> > >         .display.ver = 13,                                                      \
> > > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> > > index 7581ef4a68f94..e61a334b611ac 100644
> > > --- a/drivers/gpu/drm/i915/intel_device_info.h
> > > +++ b/drivers/gpu/drm/i915/intel_device_info.h
> > > @@ -157,7 +157,6 @@ enum intel_ppgtt_type {
> > >         func(has_cdclk_crawl); \
> > >         func(has_dmc); \
> > >         func(has_dsc); \
> > > -       func(has_fpga_dbg); \
> > >         func(has_gmch); \
> > >         func(has_hdcp); \
> > >         func(has_hotplug); \
> > > -- 
> > > 2.36.0
> > > 
> 

Re: [Intel-gfx] [PATCH 16/16] drm/i915: Drop display.has_fpga_db from device info

[Jani Nikula]

On Tue, 10 May 2022, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote:
> Quoting Souza, Jose (2022-05-09 17:19:28)
>> On Mon, 2022-05-09 at 15:38 +0300, Joonas Lahtinen wrote:
>> > Quoting José Roberto de Souza (2022-05-07 16:28:50)
>> > > No need to have this parameter in intel_device_info struct
>> > > as this feature is supported by Broadwell, Haswell all platforms with
>> > > display version 9 or newer.
>> > 
>> > This is opposite of the direction we want to move to.
>> > 
>> > We want to embrace the has_xyz flags, instead of the macro trickery.
>> 
>> This ever growing flag definition is causing problems when defining new platforms.
>
> The ever growing macros that change between kernel versions are much
> more painful than easily printable list per SKU.
>
> Just to make it clear, a strict NACK from me for merging any patches
> into this direction.

I was hoping to start a discussion to reach consensus on this with my
mail [1], adding all maintainers in Cc, but merging started before the
discussion really even started.

Obviously no further patches on this are to be merged, and the question
now is really what to do with the ones that were. Revert?


BR,
Jani.


[1] https://lore.kernel.org/r/87sfpol0kz.fsf@intel.com

>
> Regards, Joonas
>
>> 
>> There is too many features to check if a new platform supports each one of it, what is leading to platform definition errors.
>> 
>> Also usually when a feature is dropped a HSD will be filed, so the person taking care of that can just adjust the macro upper platform or IP bound and
>> disable it for good. 
>> 
>> > 
>> > > As a side effect of the of removal this flag, it will not be printed
>> > > in dmesg during driver load anymore and developers will have to rely
>> > > on to check the macro and compare with platform being used and IP
>> > > versions of it.
>> > 
>> > This is not a very good rationale. If the platform has something, but it
>> > becomes disabled in runtime, then we should add an another print after
>> > the runtime sanitization has been done.
>> 
>> In my opinion this flags should only change in runtime if the feature is fused off like is done for has_dsc and has_dmc.
>> 
>> > 
>> > Regards, Joonas
>> > 
>> > > 
>> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
>> > > ---
>> > >  drivers/gpu/drm/i915/i915_drv.h          | 4 +++-
>> > >  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
>> > >  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>> > >  3 files changed, 3 insertions(+), 5 deletions(-)
>> > > 
>> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> > > index 4b1025dbaab2a..4a1edf48d37b9 100644
>> > > --- a/drivers/gpu/drm/i915/i915_drv.h
>> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
>> > > @@ -1306,7 +1306,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>> > >                                           IS_BROADWELL(dev_priv) || \
>> > >                                           IS_HASWELL(dev_priv))
>> > >  #define HAS_DP_MST(dev_priv)            (HAS_DDI(dev_priv))
>> > > -#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
>> > > +#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (DISPLAY_VER(dev_priv) >= 9 || \
>> > > +                                         IS_BROADWELL(dev_priv) || \
>> > > +                                         IS_HASWELL(dev_priv))
>> > >  #define HAS_PSR(dev_priv)               (DISPLAY_VER(dev_priv) >= 9)
>> > >  #define HAS_PSR2_SEL_FETCH(dev_priv)    (DISPLAY_VER(dev_priv) >= 12)
>> > >  #define HAS_TRANSCODER(dev_priv, trans)         ((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0)
>> > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>> > > index 5a42acb162a15..6a5b70b3ea2d7 100644
>> > > --- a/drivers/gpu/drm/i915/i915_pci.c
>> > > +++ b/drivers/gpu/drm/i915/i915_pci.c
>> > > @@ -523,7 +523,6 @@ static const struct intel_device_info vlv_info = {
>> > >         .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
>> > >         .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
>> > >                 BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
>> > > -       .display.has_fpga_dbg = 1, \
>> > >         HSW_PIPE_OFFSETS
>> > >  
>> > >  #define HSW_PLATFORM \
>> > > @@ -657,7 +656,6 @@ static const struct intel_device_info skl_gt4_info = {
>> > >         .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
>> > >                 BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
>> > >                 BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
>> > > -       .display.has_fpga_dbg = 1, \
>> > >         .display.fbc_mask = BIT(INTEL_FBC_A), \
>> > >         .display.has_hdcp = 1, \
>> > >         .display.has_dmc = 1, \
>> > > @@ -894,7 +892,6 @@ static const struct intel_device_info adl_s_info = {
>> > >         .display.has_dmc = 1,                                                   \
>> > >         .display.has_dsc = 1,                                                   \
>> > >         .display.fbc_mask = BIT(INTEL_FBC_A),                                   \
>> > > -       .display.has_fpga_dbg = 1,                                              \
>> > >         .display.has_hdcp = 1,                                                  \
>> > >         .display.has_hotplug = 1,                                               \
>> > >         .display.ver = 13,                                                      \
>> > > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
>> > > index 7581ef4a68f94..e61a334b611ac 100644
>> > > --- a/drivers/gpu/drm/i915/intel_device_info.h
>> > > +++ b/drivers/gpu/drm/i915/intel_device_info.h
>> > > @@ -157,7 +157,6 @@ enum intel_ppgtt_type {
>> > >         func(has_cdclk_crawl); \
>> > >         func(has_dmc); \
>> > >         func(has_dsc); \
>> > > -       func(has_fpga_dbg); \
>> > >         func(has_gmch); \
>> > >         func(has_hdcp); \
>> > >         func(has_hotplug); \
>> > > -- 
>> > > 2.36.0
>> > > 
>> 

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 16/16] drm/i915: Drop display.has_fpga_db from device info

[Tvrtko Ursulin]

On 10/05/2022 08:41, Jani Nikula wrote:
> On Tue, 10 May 2022, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote:
>> Quoting Souza, Jose (2022-05-09 17:19:28)
>>> On Mon, 2022-05-09 at 15:38 +0300, Joonas Lahtinen wrote:
>>>> Quoting José Roberto de Souza (2022-05-07 16:28:50)
>>>>> No need to have this parameter in intel_device_info struct
>>>>> as this feature is supported by Broadwell, Haswell all platforms with
>>>>> display version 9 or newer.
>>>>
>>>> This is opposite of the direction we want to move to.
>>>>
>>>> We want to embrace the has_xyz flags, instead of the macro trickery.
>>>
>>> This ever growing flag definition is causing problems when defining new platforms.
>>
>> The ever growing macros that change between kernel versions are much
>> more painful than easily printable list per SKU.
>>
>> Just to make it clear, a strict NACK from me for merging any patches
>> into this direction.
> 
> I was hoping to start a discussion to reach consensus on this with my
> mail [1], adding all maintainers in Cc, but merging started before the
> discussion really even started.
> 
> Obviously no further patches on this are to be merged, and the question
> now is really what to do with the ones that were. Revert?

 From the process standpoint strictly yes, but in practice I think there 
is no rush.

The ones which got merged I definitely do not like are:

Rc6 - because it creates an inconsistency where rc6p remains a device 
info flag.

DDI - because it is not 100% trivial and used from i915_irq.c. But a) I 
am not sure it is truly on an irq path, and b) it is display code so not 
my call anyway. (Affects the DP MST one as well by inheritance.)

The others are at best lukewarm to me - primarily because I am not 
convinced there is a benefit to it all. One day the need might come to 
move them back if some platforms drops support or something, which would 
be more churn. And it is handy to see a consolidated description of a 
platform in dmesg when looking at bugs. So just not sure it's an 
improvement.

Give there is much more conversions proposed I guess it may make sense 
to revert until overall consensus is achieved, since it may be odd to 
have a handful if we decide to stop there.

Regards,

Tvrtko

Re: [Intel-gfx] [PATCH 16/16] drm/i915: Drop display.has_fpga_db from device info

[Souza, Jose]

On Wed, 2022-05-11 at 08:39 +0100, Tvrtko Ursulin wrote:
> On 10/05/2022 08:41, Jani Nikula wrote:
> > On Tue, 10 May 2022, Joonas Lahtinen <joonas.lahtinen@linux.intel.com> wrote:
> > > Quoting Souza, Jose (2022-05-09 17:19:28)
> > > > On Mon, 2022-05-09 at 15:38 +0300, Joonas Lahtinen wrote:
> > > > > Quoting José Roberto de Souza (2022-05-07 16:28:50)
> > > > > > No need to have this parameter in intel_device_info struct
> > > > > > as this feature is supported by Broadwell, Haswell all platforms with
> > > > > > display version 9 or newer.
> > > > > 
> > > > > This is opposite of the direction we want to move to.
> > > > > 
> > > > > We want to embrace the has_xyz flags, instead of the macro trickery.
> > > > 
> > > > This ever growing flag definition is causing problems when defining new platforms.
> > > 
> > > The ever growing macros that change between kernel versions are much
> > > more painful than easily printable list per SKU.
> > > 
> > > Just to make it clear, a strict NACK from me for merging any patches
> > > into this direction.
> > 
> > I was hoping to start a discussion to reach consensus on this with my
> > mail [1], adding all maintainers in Cc, but merging started before the
> > discussion really even started.
> > 
> > Obviously no further patches on this are to be merged, and the question
> > now is really what to do with the ones that were. Revert?
> 
>  From the process standpoint strictly yes, but in practice I think there 
> is no rush.
> 
> The ones which got merged I definitely do not like are:
> 
> Rc6 - because it creates an inconsistency where rc6p remains a device 
> info flag.
> 
> DDI - because it is not 100% trivial and used from i915_irq.c. But a) I 
> am not sure it is truly on an irq path, and b) it is display code so not 
> my call anyway. (Affects the DP MST one as well by inheritance.)
> 
> The others are at best lukewarm to me - primarily because I am not 
> convinced there is a benefit to it all. One day the need might come to 
> move them back if some platforms drops support or something, which would 
> be more churn. And it is handy to see a consolidated description of a 
> platform in dmesg when looking at bugs. So just not sure it's an 
> improvement.

If platform feature list print is a must, we could print those features converted to platform and IP checks in intel_device_info_print_runtime().

> 
> Give there is much more conversions proposed I guess it may make sense 
> to revert until overall consensus is achieved, since it may be odd to 
> have a handful if we decide to stop there.
> 
> Regards,
> 
> Tvrtko