From: Jisheng Zhang <jszhang@kernel.org> To: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Andrey Ryabinin <ryabinin.a.a@gmail.com>, Alexander Potapenko <glider@google.com>, Andrey Konovalov <andreyknvl@gmail.com>, Dmitry Vyukov <dvyukov@google.com>, Vincenzo Frascino <vincenzo.frascino@arm.com>, Alexandre Ghiti <alexandre.ghiti@canonical.com> Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com Subject: [PATCH v2 0/4] unified way to use static key and optimize pgtable_l4_enabled Date: Mon, 9 May 2022 00:07:45 +0800 [thread overview] Message-ID: <20220508160749.984-1-jszhang@kernel.org> (raw) Currently, riscv has several features which may not be supported on all riscv platforms, for example, FPU, SV48, SV57 and so on. To support unified kernel Image style, we need to check whether the feature is suportted or not. If the check sits at hot code path, then performance will be impacted a lot. static key can be used to solve the issue. In the past, FPU support has been converted to use static key mechanism. I believe we will have similar cases in the future. For example, the SV48 support can take advantage of static key[1]. patch1 is a simple W=1 warning fix. patch2 introduces an unified mechanism to use static key for riscv cpu features. patch3 converts has_cpu() to use the mechanism. patch4 uses the mechanism to optimize pgtable_l4|[l5]_enabled. [1] http://lists.infradead.org/pipermail/linux-riscv/2021-December/011164.html Since v1: - Add a W=1 warning fix - Fix W=1 error - Based on v5.18-rcN, since SV57 support is added, so convert pgtable_l5_enabled as well. Jisheng Zhang (4): riscv: mm: init: make pt_ops_set_[early|late|fixmap] static riscv: introduce unified static key mechanism for CPU features riscv: replace has_fpu() with system_supports_fpu() riscv: convert pgtable_l4|[l5]_enabled to static key arch/riscv/Makefile | 3 + arch/riscv/include/asm/cpufeature.h | 110 ++++++++++++++++++++++++++++ arch/riscv/include/asm/pgalloc.h | 16 ++-- arch/riscv/include/asm/pgtable-64.h | 40 +++++----- arch/riscv/include/asm/pgtable.h | 5 +- arch/riscv/include/asm/switch_to.h | 9 +-- arch/riscv/kernel/cpu.c | 4 +- arch/riscv/kernel/cpufeature.c | 29 ++++++-- arch/riscv/kernel/process.c | 2 +- arch/riscv/kernel/signal.c | 4 +- arch/riscv/mm/init.c | 52 ++++++------- arch/riscv/mm/kasan_init.c | 16 ++-- arch/riscv/tools/Makefile | 22 ++++++ arch/riscv/tools/cpucaps | 7 ++ arch/riscv/tools/gen-cpucaps.awk | 40 ++++++++++ 15 files changed, 274 insertions(+), 85 deletions(-) create mode 100644 arch/riscv/include/asm/cpufeature.h create mode 100644 arch/riscv/tools/Makefile create mode 100644 arch/riscv/tools/cpucaps create mode 100755 arch/riscv/tools/gen-cpucaps.awk -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org> To: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Andrey Ryabinin <ryabinin.a.a@gmail.com>, Alexander Potapenko <glider@google.com>, Andrey Konovalov <andreyknvl@gmail.com>, Dmitry Vyukov <dvyukov@google.com>, Vincenzo Frascino <vincenzo.frascino@arm.com>, Alexandre Ghiti <alexandre.ghiti@canonical.com> Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com Subject: [PATCH v2 0/4] unified way to use static key and optimize pgtable_l4_enabled Date: Mon, 9 May 2022 00:07:45 +0800 [thread overview] Message-ID: <20220508160749.984-1-jszhang@kernel.org> (raw) Currently, riscv has several features which may not be supported on all riscv platforms, for example, FPU, SV48, SV57 and so on. To support unified kernel Image style, we need to check whether the feature is suportted or not. If the check sits at hot code path, then performance will be impacted a lot. static key can be used to solve the issue. In the past, FPU support has been converted to use static key mechanism. I believe we will have similar cases in the future. For example, the SV48 support can take advantage of static key[1]. patch1 is a simple W=1 warning fix. patch2 introduces an unified mechanism to use static key for riscv cpu features. patch3 converts has_cpu() to use the mechanism. patch4 uses the mechanism to optimize pgtable_l4|[l5]_enabled. [1] http://lists.infradead.org/pipermail/linux-riscv/2021-December/011164.html Since v1: - Add a W=1 warning fix - Fix W=1 error - Based on v5.18-rcN, since SV57 support is added, so convert pgtable_l5_enabled as well. Jisheng Zhang (4): riscv: mm: init: make pt_ops_set_[early|late|fixmap] static riscv: introduce unified static key mechanism for CPU features riscv: replace has_fpu() with system_supports_fpu() riscv: convert pgtable_l4|[l5]_enabled to static key arch/riscv/Makefile | 3 + arch/riscv/include/asm/cpufeature.h | 110 ++++++++++++++++++++++++++++ arch/riscv/include/asm/pgalloc.h | 16 ++-- arch/riscv/include/asm/pgtable-64.h | 40 +++++----- arch/riscv/include/asm/pgtable.h | 5 +- arch/riscv/include/asm/switch_to.h | 9 +-- arch/riscv/kernel/cpu.c | 4 +- arch/riscv/kernel/cpufeature.c | 29 ++++++-- arch/riscv/kernel/process.c | 2 +- arch/riscv/kernel/signal.c | 4 +- arch/riscv/mm/init.c | 52 ++++++------- arch/riscv/mm/kasan_init.c | 16 ++-- arch/riscv/tools/Makefile | 22 ++++++ arch/riscv/tools/cpucaps | 7 ++ arch/riscv/tools/gen-cpucaps.awk | 40 ++++++++++ 15 files changed, 274 insertions(+), 85 deletions(-) create mode 100644 arch/riscv/include/asm/cpufeature.h create mode 100644 arch/riscv/tools/Makefile create mode 100644 arch/riscv/tools/cpucaps create mode 100755 arch/riscv/tools/gen-cpucaps.awk -- 2.34.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next reply other threads:[~2022-05-08 16:16 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-08 16:07 Jisheng Zhang [this message] 2022-05-08 16:07 ` [PATCH v2 0/4] unified way to use static key and optimize pgtable_l4_enabled Jisheng Zhang 2022-05-08 16:07 ` [PATCH v2 1/4] riscv: mm: init: make pt_ops_set_[early|late|fixmap] static Jisheng Zhang 2022-05-08 16:07 ` Jisheng Zhang 2022-05-09 3:51 ` Anup Patel 2022-05-09 3:51 ` Anup Patel 2022-05-08 16:07 ` [PATCH v2 2/4] riscv: introduce unified static key mechanism for CPU features Jisheng Zhang 2022-05-08 16:07 ` Jisheng Zhang 2022-05-09 3:47 ` Anup Patel 2022-05-09 3:47 ` Anup Patel 2022-05-09 14:41 ` Jisheng Zhang 2022-05-09 14:41 ` Jisheng Zhang 2022-05-12 6:29 ` Atish Patra 2022-05-12 6:29 ` Atish Patra 2022-05-15 7:15 ` Jisheng Zhang 2022-05-15 7:15 ` Jisheng Zhang 2022-05-15 14:49 ` Anup Patel 2022-05-15 14:49 ` Anup Patel 2022-05-16 17:24 ` Jisheng Zhang 2022-05-16 17:24 ` Jisheng Zhang 2022-05-17 4:01 ` Anup Patel 2022-05-17 4:01 ` Anup Patel 2022-05-17 16:33 ` Jisheng Zhang 2022-05-17 16:33 ` Jisheng Zhang 2022-05-08 16:07 ` [PATCH v2 3/4] riscv: replace has_fpu() with system_supports_fpu() Jisheng Zhang 2022-05-08 16:07 ` Jisheng Zhang 2022-05-09 4:01 ` Anup Patel 2022-05-09 4:01 ` Anup Patel 2022-05-08 16:07 ` [PATCH v2 4/4] riscv: convert pgtable_l4|[l5]_enabled to static key Jisheng Zhang 2022-05-08 16:07 ` Jisheng Zhang 2022-05-09 3:59 ` Anup Patel 2022-05-09 3:59 ` Anup Patel 2022-05-09 4:37 ` [PATCH v2 0/4] unified way to use static key and optimize pgtable_l4_enabled Anup Patel 2022-05-09 4:37 ` Anup Patel 2022-05-09 14:26 ` Jisheng Zhang 2022-05-09 14:26 ` Jisheng Zhang
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