From: Jisheng Zhang <jszhang@kernel.org>
To: Anup Patel <anup@brainfault.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Andrey Ryabinin <ryabinin.a.a@gmail.com>,
Alexander Potapenko <glider@google.com>,
Andrey Konovalov <andreyknvl@gmail.com>,
Dmitry Vyukov <dvyukov@google.com>,
Vincenzo Frascino <vincenzo.frascino@arm.com>,
Alexandre Ghiti <alexandre.ghiti@canonical.com>,
linux-riscv <linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>,
kasan-dev@googlegroups.com
Subject: Re: [PATCH v2 0/4] unified way to use static key and optimize pgtable_l4_enabled
Date: Mon, 9 May 2022 22:26:20 +0800 [thread overview]
Message-ID: <YnkkjC065kCTtHBC@xhacker> (raw)
In-Reply-To: <CAAhSdy1qri5L9pVcZO8areB=TXMSJBg2+cTNMZGQ3g+3Qhxmfg@mail.gmail.com>
On Mon, May 09, 2022 at 10:07:16AM +0530, Anup Patel wrote:
> On Sun, May 8, 2022 at 9:46 PM Jisheng Zhang <jszhang@kernel.org> wrote:
> >
> > Currently, riscv has several features which may not be supported on all
> > riscv platforms, for example, FPU, SV48, SV57 and so on. To support
> > unified kernel Image style, we need to check whether the feature is
> > suportted or not. If the check sits at hot code path, then performance
> > will be impacted a lot. static key can be used to solve the issue. In
> > the past, FPU support has been converted to use static key mechanism.
> > I believe we will have similar cases in the future. For example, the
> > SV48 support can take advantage of static key[1].
> >
> > patch1 is a simple W=1 warning fix.
> > patch2 introduces an unified mechanism to use static key for riscv cpu
> > features.
> > patch3 converts has_cpu() to use the mechanism.
> > patch4 uses the mechanism to optimize pgtable_l4|[l5]_enabled.
> >
> > [1] http://lists.infradead.org/pipermail/linux-riscv/2021-December/011164.html
>
> Overall, using a script to generate CPU capabilities seems a bit
> over-engineered to me. We already have RISC-V ISA extension
Not all riscv features are *ISA* extensions. For example, SV48 and SV57
are not ISA extensions. IIRC, I asked this question before, here are
Atish's comments:
https://lore.kernel.org/linux-riscv/CAHBxVyF65jC_wvxcD6bueqpCY8-Kbahu1yxsSoBmO1s15dGkSQ@mail.gmail.com/
> parsing infrastructure which can be easily extended to support
> static key arrays.
>
WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Anup Patel <anup@brainfault.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Andrey Ryabinin <ryabinin.a.a@gmail.com>,
Alexander Potapenko <glider@google.com>,
Andrey Konovalov <andreyknvl@gmail.com>,
Dmitry Vyukov <dvyukov@google.com>,
Vincenzo Frascino <vincenzo.frascino@arm.com>,
Alexandre Ghiti <alexandre.ghiti@canonical.com>,
linux-riscv <linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>,
kasan-dev@googlegroups.com
Subject: Re: [PATCH v2 0/4] unified way to use static key and optimize pgtable_l4_enabled
Date: Mon, 9 May 2022 22:26:20 +0800 [thread overview]
Message-ID: <YnkkjC065kCTtHBC@xhacker> (raw)
In-Reply-To: <CAAhSdy1qri5L9pVcZO8areB=TXMSJBg2+cTNMZGQ3g+3Qhxmfg@mail.gmail.com>
On Mon, May 09, 2022 at 10:07:16AM +0530, Anup Patel wrote:
> On Sun, May 8, 2022 at 9:46 PM Jisheng Zhang <jszhang@kernel.org> wrote:
> >
> > Currently, riscv has several features which may not be supported on all
> > riscv platforms, for example, FPU, SV48, SV57 and so on. To support
> > unified kernel Image style, we need to check whether the feature is
> > suportted or not. If the check sits at hot code path, then performance
> > will be impacted a lot. static key can be used to solve the issue. In
> > the past, FPU support has been converted to use static key mechanism.
> > I believe we will have similar cases in the future. For example, the
> > SV48 support can take advantage of static key[1].
> >
> > patch1 is a simple W=1 warning fix.
> > patch2 introduces an unified mechanism to use static key for riscv cpu
> > features.
> > patch3 converts has_cpu() to use the mechanism.
> > patch4 uses the mechanism to optimize pgtable_l4|[l5]_enabled.
> >
> > [1] http://lists.infradead.org/pipermail/linux-riscv/2021-December/011164.html
>
> Overall, using a script to generate CPU capabilities seems a bit
> over-engineered to me. We already have RISC-V ISA extension
Not all riscv features are *ISA* extensions. For example, SV48 and SV57
are not ISA extensions. IIRC, I asked this question before, here are
Atish's comments:
https://lore.kernel.org/linux-riscv/CAHBxVyF65jC_wvxcD6bueqpCY8-Kbahu1yxsSoBmO1s15dGkSQ@mail.gmail.com/
> parsing infrastructure which can be easily extended to support
> static key arrays.
>
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http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-05-09 14:35 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-08 16:07 [PATCH v2 0/4] unified way to use static key and optimize pgtable_l4_enabled Jisheng Zhang
2022-05-08 16:07 ` Jisheng Zhang
2022-05-08 16:07 ` [PATCH v2 1/4] riscv: mm: init: make pt_ops_set_[early|late|fixmap] static Jisheng Zhang
2022-05-08 16:07 ` Jisheng Zhang
2022-05-09 3:51 ` Anup Patel
2022-05-09 3:51 ` Anup Patel
2022-05-08 16:07 ` [PATCH v2 2/4] riscv: introduce unified static key mechanism for CPU features Jisheng Zhang
2022-05-08 16:07 ` Jisheng Zhang
2022-05-09 3:47 ` Anup Patel
2022-05-09 3:47 ` Anup Patel
2022-05-09 14:41 ` Jisheng Zhang
2022-05-09 14:41 ` Jisheng Zhang
2022-05-12 6:29 ` Atish Patra
2022-05-12 6:29 ` Atish Patra
2022-05-15 7:15 ` Jisheng Zhang
2022-05-15 7:15 ` Jisheng Zhang
2022-05-15 14:49 ` Anup Patel
2022-05-15 14:49 ` Anup Patel
2022-05-16 17:24 ` Jisheng Zhang
2022-05-16 17:24 ` Jisheng Zhang
2022-05-17 4:01 ` Anup Patel
2022-05-17 4:01 ` Anup Patel
2022-05-17 16:33 ` Jisheng Zhang
2022-05-17 16:33 ` Jisheng Zhang
2022-05-08 16:07 ` [PATCH v2 3/4] riscv: replace has_fpu() with system_supports_fpu() Jisheng Zhang
2022-05-08 16:07 ` Jisheng Zhang
2022-05-09 4:01 ` Anup Patel
2022-05-09 4:01 ` Anup Patel
2022-05-08 16:07 ` [PATCH v2 4/4] riscv: convert pgtable_l4|[l5]_enabled to static key Jisheng Zhang
2022-05-08 16:07 ` Jisheng Zhang
2022-05-09 3:59 ` Anup Patel
2022-05-09 3:59 ` Anup Patel
2022-05-09 4:37 ` [PATCH v2 0/4] unified way to use static key and optimize pgtable_l4_enabled Anup Patel
2022-05-09 4:37 ` Anup Patel
2022-05-09 14:26 ` Jisheng Zhang [this message]
2022-05-09 14:26 ` Jisheng Zhang
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