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From: David Zhang <dingchen.zhang@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: stylon.wang@amd.com, David Zhang <dingchen.zhang@amd.com>,
	Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
	qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com,
	roman.li@amd.com, solomon.chiu@amd.com, jerry.zuo@amd.com,
	Aurabindo.Pillai@amd.com, wayne.lin@amd.com,
	Bhawanpreet.Lakha@amd.com, agustin.gutierrez@amd.com,
	pavle.kotarac@amd.com
Subject: [PATCH v2 18/19] drm/amd/display: expose AMD source specific DPCD for FreeSync PSR support
Date: Tue, 10 May 2022 16:45:07 -0400	[thread overview]
Message-ID: <20220510204508.506089-19-dingchen.zhang@amd.com> (raw)
In-Reply-To: <20220510204508.506089-1-dingchen.zhang@amd.com>

[why & how]
The source specific DPCD exposure which is to set the sink device PSR
active vtotal control mode.

Signed-off-by: David Zhang <dingchen.zhang@amd.com>
---
 drivers/gpu/drm/amd/display/include/ddc_service_types.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/display/include/ddc_service_types.h b/drivers/gpu/drm/amd/display/include/ddc_service_types.h
index 73b9e0a87e54..054253286886 100644
--- a/drivers/gpu/drm/amd/display/include/ddc_service_types.h
+++ b/drivers/gpu/drm/amd/display/include/ddc_service_types.h
@@ -40,6 +40,7 @@
 
 #define DP_DEVICE_ID_38EC11 0x38EC11
 #define DP_FORCE_PSRSU_CAPABILITY 0x40F
+#define DP_SINK_PSR_ACTIVE_VTOTAL_CONTROL_MODE 0x375
 
 enum ddc_result {
 	DDC_RESULT_UNKNOWN = 0,
-- 
2.25.1


  parent reply	other threads:[~2022-05-10 20:46 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-10 20:44 [PATCH v2 00/19] DC/DM changes needed for amdgpu PSR-SU David Zhang
2022-05-10 20:44 ` [PATCH v2 01/19] drm/amd/display: align dmub cmd header to latest dmub FW to support PSR-SU David Zhang
2022-05-10 20:44 ` [PATCH v2 02/19] drm/amd/display: feed PSR-SU as psr version to dmub FW David Zhang
2022-05-10 20:44 ` [PATCH v2 03/19] drm/amd/display: combine dirty rectangles in DMUB FW David Zhang
2022-05-10 20:44 ` [PATCH v2 04/19] drm/amd/display: update GSP1 generic info packet for PSRSU David Zhang
2022-05-10 20:44 ` [PATCH v2 05/19] drm/amd/display: revise Start/End SDP data David Zhang
2022-05-10 20:44 ` [PATCH v2 06/19] drm/amd/display: program PSR2 DPCD Configuration David Zhang
2022-05-10 20:44 ` [PATCH v2 07/19] drm/amd/display: Passing Y-granularity to dmub fw David Zhang
2022-05-10 20:44 ` [PATCH v2 08/19] drm/amd/display: Set default value of line_capture_indication David Zhang
2022-05-10 20:44 ` [PATCH v2 09/19] drm/amd/display: add vline time in micro sec to PSR context David Zhang
2022-05-10 20:44 ` [PATCH v2 10/19] drm/amd/display: fix system hang when PSR exits David Zhang
2022-05-10 20:45 ` [PATCH v2 11/19] drm/amd/display: Set PSR level to enable ALPM by default David Zhang
2022-05-10 20:45 ` [PATCH v2 12/19] drm/amd/display: use HW lock mgr for PSR-SU David Zhang
2022-05-10 20:45 ` [PATCH v2 13/19] drm/amd/display: PSRSU+DSC WA for specific TCON David Zhang
2022-05-10 20:45 ` [PATCH v2 14/19] drm/amd/display: add shared helpers to update psr config fields to power module David Zhang
2022-05-10 20:45 ` [PATCH v2 15/19] drm/amd/display: calculate psr config settings in runtime in DM David Zhang
2022-05-10 20:45 ` [PATCH v2 16/19] drm/amd/display: update cursor position to DMUB FW David Zhang
2022-05-10 20:45 ` [PATCH v2 17/19] drm/amd/display: Implement MPO PSR SU David Zhang
2022-05-10 20:45 ` David Zhang [this message]
2022-05-10 20:45 ` [PATCH v2 19/19] drm/amd/display: PSR-SU rate control support in DC David Zhang
2022-05-19 15:37   ` Harry Wentland
2022-05-11 15:35 ` [PATCH v2 00/19] DC/DM changes needed for amdgpu PSR-SU Alex Deucher
2022-05-12 11:22   ` Daniel Vetter
2022-05-12 17:22     ` Zhang, Dingchen (David)
2022-05-12 17:39       ` Daniel Vetter
2022-05-16 16:23         ` Leo Li
2022-05-16 17:21           ` Daniel Vetter
2022-05-19 15:38 ` Harry Wentland

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