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From: Daniel Vetter <daniel@ffwll.ch>
To: Alex Deucher <alexdeucher@gmail.com>
Cc: Stylon Wang <stylon.wang@amd.com>,
	David Zhang <dingchen.zhang@amd.com>,
	"Leo \(Sunpeng\) Li" <Sunpeng.Li@amd.com>,
	Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>,
	Qingqing Zhuo <qingqing.zhuo@amd.com>,
	"Siqueira, Rodrigo" <Rodrigo.Siqueira@amd.com>,
	Roman Li <roman.li@amd.com>,
	amd-gfx list <amd-gfx@lists.freedesktop.org>,
	Solomon Chiu <solomon.chiu@amd.com>,
	Jerry Zuo <jerry.zuo@amd.com>,
	Aurabindo Pillai <Aurabindo.Pillai@amd.com>,
	Wayne Lin <wayne.lin@amd.com>,
	"Wentland, Harry" <Harry.Wentland@amd.com>,
	"Gutierrez, Agustin" <agustin.gutierrez@amd.com>,
	"Kotarac, Pavle" <pavle.kotarac@amd.com>
Subject: Re: [PATCH v2 00/19] DC/DM changes needed for amdgpu PSR-SU
Date: Thu, 12 May 2022 13:22:18 +0200	[thread overview]
Message-ID: <CAKMK7uGMsxAJGaPbPR9fhmdwKgV=hOG73H=Ju0hYU9G=8hfa7A@mail.gmail.com> (raw)
In-Reply-To: <CADnq5_PZVo0GkkLqnhDA8THxQ2wgqx7zt1cARx+tTnsYo5gAOg@mail.gmail.com>

On Wed, 11 May 2022 at 17:35, Alex Deucher <alexdeucher@gmail.com> wrote:
>
> On Tue, May 10, 2022 at 4:45 PM David Zhang <dingchen.zhang@amd.com> wrote:
> >
> > changes in v2:
> > -----------------------
> > - set vsc_packet_rev2 for PSR1 which is safer
> > - add exposure of AMD specific DPCD regs for PSR-SU-RC (rate-control)
> > - add DC/DM change related to amdgpu PSR-SU-RC
> >
> >
> > David Zhang (18):
> >   drm/amd/display: align dmub cmd header to latest dmub FW to support
> >     PSR-SU
> >   drm/amd/display: feed PSR-SU as psr version to dmub FW
> >   drm/amd/display: combine dirty rectangles in DMUB FW
> >   drm/amd/display: update GSP1 generic info packet for PSRSU
> >   drm/amd/display: revise Start/End SDP data
> >   drm/amd/display: program PSR2 DPCD Configuration
> >   drm/amd/display: Passing Y-granularity to dmub fw
> >   drm/amd/display: Set default value of line_capture_indication
> >   drm/amd/display: add vline time in micro sec to PSR context
> >   drm/amd/display: fix system hang when PSR exits
> >   drm/amd/display: Set PSR level to enable ALPM by default
> >   drm/amd/display: use HW lock mgr for PSR-SU
> >   drm/amd/display: PSRSU+DSC WA for specific TCON
> >   drm/amd/display: add shared helpers to update psr config fields to
> >     power module
> >   drm/amd/display: calculate psr config settings in runtime in DM
> >   drm/amd/display: update cursor position to DMUB FW
> >   drm/amd/display: expose AMD source specific DPCD for FreeSync PSR
> >     support
> >   drm/amd/display: PSR-SU rate control support in DC
> >
> > Leo Li (1):
> >   drm/amd/display: Implement MPO PSR SU
>
> A couple of suggestions from Daniel on IRC:
> 1.  Might be good to extract the "calculate total crtc damage" code
> from i915 in intel_psr2_sel_fetch_update, stuff that into damage
> helpers and reuse for i915 and amdgpu

To expand a bit on this. There is currently a helper for total damage,
but it's at the fb/plane level for drivers which need to upload
buffers (usb/spi or virtual) drm_atomic_helper_damage_merged(). That
one probably needs to be renamed to signify it's about the plane, and
then we need a new drm_atomic_helper_crtc_damage_merged() which
(extract from i915 code ideally) which computes total crtc damage for
stuff like psr2/su or the command mode dsi panels (unfortunately none
of the drivers for android for these panels have been upstreamed yet).

I also think that the split between dc and kms is a bit funny, I'd put
only the resulting damage rect into dc_pipe and do the computation of
that in the drm/kms linux code outside of dc functions (or in the glue
code for dc), since I'm assuming on windows it's completely different
approach in how you compute damage. Especially once we have the crtc
damage helper on linux.

> 2.  The commit message on "drm/amd/display: Implement MPO PSR SU" is a
> bit funny, since if you use the helpers right you always get damage
> information, just when it's from userspace that doesn't set explicit
> damage it's just always the entire plane.

Yeah so that one was just another reason to use the helpers more in
amdgpu for this.
-Daniel

>
> Alex
>
> >
> >  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 142 +++++++++-
> >  .../drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c |  21 +-
> >  drivers/gpu/drm/amd/display/dc/core/dc.c      |  54 ++++
> >  drivers/gpu/drm/amd/display/dc/core/dc_link.c |  47 +++-
> >  drivers/gpu/drm/amd/display/dc/dc_link.h      |   4 +
> >  drivers/gpu/drm/amd/display/dc/dc_stream.h    |   5 +
> >  drivers/gpu/drm/amd/display/dc/dc_types.h     |  23 +-
> >  .../drm/amd/display/dc/dce/dmub_hw_lock_mgr.c |   2 +
> >  drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c |  64 +++++
> >  drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h |   2 +
> >  .../gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c |   2 +
> >  .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 131 +++++++++
> >  .../gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c |   2 +
> >  .../dc/dcn30/dcn30_dio_stream_encoder.c       |  15 ++
> >  drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h  |   1 +
> >  .../drm/amd/display/dc/inc/hw/link_encoder.h  |  21 +-
> >  .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   | 250 +++++++++++++++++-
> >  .../amd/display/include/ddc_service_types.h   |   1 +
> >  .../display/modules/info_packet/info_packet.c |  29 +-
> >  .../amd/display/modules/power/power_helpers.c |  84 ++++++
> >  .../amd/display/modules/power/power_helpers.h |   6 +
> >  21 files changed, 887 insertions(+), 19 deletions(-)
> >
> > --
> > 2.25.1
> >



-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

  reply	other threads:[~2022-05-12 11:22 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-10 20:44 [PATCH v2 00/19] DC/DM changes needed for amdgpu PSR-SU David Zhang
2022-05-10 20:44 ` [PATCH v2 01/19] drm/amd/display: align dmub cmd header to latest dmub FW to support PSR-SU David Zhang
2022-05-10 20:44 ` [PATCH v2 02/19] drm/amd/display: feed PSR-SU as psr version to dmub FW David Zhang
2022-05-10 20:44 ` [PATCH v2 03/19] drm/amd/display: combine dirty rectangles in DMUB FW David Zhang
2022-05-10 20:44 ` [PATCH v2 04/19] drm/amd/display: update GSP1 generic info packet for PSRSU David Zhang
2022-05-10 20:44 ` [PATCH v2 05/19] drm/amd/display: revise Start/End SDP data David Zhang
2022-05-10 20:44 ` [PATCH v2 06/19] drm/amd/display: program PSR2 DPCD Configuration David Zhang
2022-05-10 20:44 ` [PATCH v2 07/19] drm/amd/display: Passing Y-granularity to dmub fw David Zhang
2022-05-10 20:44 ` [PATCH v2 08/19] drm/amd/display: Set default value of line_capture_indication David Zhang
2022-05-10 20:44 ` [PATCH v2 09/19] drm/amd/display: add vline time in micro sec to PSR context David Zhang
2022-05-10 20:44 ` [PATCH v2 10/19] drm/amd/display: fix system hang when PSR exits David Zhang
2022-05-10 20:45 ` [PATCH v2 11/19] drm/amd/display: Set PSR level to enable ALPM by default David Zhang
2022-05-10 20:45 ` [PATCH v2 12/19] drm/amd/display: use HW lock mgr for PSR-SU David Zhang
2022-05-10 20:45 ` [PATCH v2 13/19] drm/amd/display: PSRSU+DSC WA for specific TCON David Zhang
2022-05-10 20:45 ` [PATCH v2 14/19] drm/amd/display: add shared helpers to update psr config fields to power module David Zhang
2022-05-10 20:45 ` [PATCH v2 15/19] drm/amd/display: calculate psr config settings in runtime in DM David Zhang
2022-05-10 20:45 ` [PATCH v2 16/19] drm/amd/display: update cursor position to DMUB FW David Zhang
2022-05-10 20:45 ` [PATCH v2 17/19] drm/amd/display: Implement MPO PSR SU David Zhang
2022-05-10 20:45 ` [PATCH v2 18/19] drm/amd/display: expose AMD source specific DPCD for FreeSync PSR support David Zhang
2022-05-10 20:45 ` [PATCH v2 19/19] drm/amd/display: PSR-SU rate control support in DC David Zhang
2022-05-19 15:37   ` Harry Wentland
2022-05-11 15:35 ` [PATCH v2 00/19] DC/DM changes needed for amdgpu PSR-SU Alex Deucher
2022-05-12 11:22   ` Daniel Vetter [this message]
2022-05-12 17:22     ` Zhang, Dingchen (David)
2022-05-12 17:39       ` Daniel Vetter
2022-05-16 16:23         ` Leo Li
2022-05-16 17:21           ` Daniel Vetter
2022-05-19 15:38 ` Harry Wentland

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