Re: [PATCH] Kconfig: hide options not intended for users in arch/Kconfig

[Tom Rini <trini@konsulko.com>]

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On Wed, May 18, 2022 at 05:12:13PM +0200, Daniel Schwierzeck wrote:
> 
> 
> On 18.05.22 14:18, Tom Rini wrote:
> > On Tue, May 17, 2022 at 10:53:53PM +0200, Daniel Schwierzeck wrote:
> > > Those options show up in menuconfig when selecting ARM or MIPS which
> > > is dangerous if a user accidently sets them. This also clutters up the
> > > menuconfig top-level screen. Because those options should only be set
> > > by SoC specific or board specific configs, make them invisible.
> > > 
> > > Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
> > > 
> > > ---
> > > 
> > >   arch/Kconfig | 14 +++++++-------
> > >   1 file changed, 7 insertions(+), 7 deletions(-)
> > > 
> > > diff --git a/arch/Kconfig b/arch/Kconfig
> > > index 12de8a1165..e3e28d0628 100644
> > > --- a/arch/Kconfig
> > > +++ b/arch/Kconfig
> > > @@ -365,7 +365,7 @@ config SYS_DISABLE_DCACHE_OPS
> > >   	 this functionality.
> > >   config SYS_IMMR
> > > -	hex "Address for the Internal Memory-Mapped Registers (IMMR) window"
> > > +	hex
> > >   	depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
> > >   	default 0xFF000000 if MPC8xx
> > >   	default 0xF0000000 if ARCH_MPC8313
> > 
> > But now these aren't user selectable on the right platforms either.
> > Maybe we need more menu organization, and so can have sub-menus depend
> > on PPC, or whatever, and so things aren't cluttered on other
> > architectures?
> > 
> 
> my main concern was with SKIP_LOWLEVEL_INIT which definitely should not be
> selectable by the user. Maybe I was to overambitious with changing the
> SYS_IMMR option too, I could revert that part ;)

I'd be agreeable to a patch that makes everyone that enables it today
select it instead.

> BTW: SYS_IMMR seems to be specific for PPC. Maybe it could be moved to
> arch/powerpc/Kconfig?

It's PowerPC or the 64bit ARM Layerscape platforms.  There's I think
only several imperfect places today for the options that are present in
both due to the IP blocks / etc being updated by NXP for use in their
current ARM HW.

-- 
Tom

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