[PATCH 00/22] imx: patches in queue

[PATCH 00/22] imx: patches in queue

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Hi Stefano,

 This patchset is a rebase of your/master-next branch to make these
 patches in my patchwork queue could apply. I not send them as previous
 seperated patchset, hope this not matter.

 The two patches are not included, since they are just sent out.
 https://patchwork.ozlabs.org/project/uboot/patch/20220523113828.3837-1-peng.fan@oss.nxp.com/
 https://patchwork.ozlabs.org/project/uboot/patch/20220523113828.3837-2-peng.fan@oss.nxp.com/

Thanks,
Peng.

Peng Fan (22):
  imx: drop CONFIG_MXC_UART_BASE
  imx: imx8m[m/n/p]_venice: Enable SPL_DM_SERIAL
  imx: imx8m[m/n]_beacon: Enable SPL_DM_SERIAL
  imx: imx8mm-cl-iot-gate: Enable DM_SERIAL
  imx: imx8mm_icore: Enable SPL_DM_SERIAL
  imx: imx8m[m/p]_phycore: Enable DM_SERIAL
  imx: imx8mn_var_som: enable DM_SERIAL
  imx: kontron-sl-mx8mm: enable DM_SERIAL
  configs: drop CONFIG_SPL_ABORT_ON_RAW_IMAGE
  configs: imx8m: use common imx8m.h for i.MX8MM
  configs: imx8m: use common imx8m.h for i.MX8MN
  configs: imx8m: use common imx8m.h for i.MX8MP
  configs: imx8m: use common imx8m.h for i.MX8MQ
  imx: imx8mm_beacon: enable pinctrl_wdog in SPL
  imx: imx8mm-cl-iot-gate: enable pinctrl_wdog in SPL
  imx: engicam-imx8mm: drop unused macro
  imx: imx8mm/n/p-venice: enable pinctrl_wdog in SPL
  imx: imx8mn-beacon: enable pinctrl_wdog in SPL
  imx: imx8mn_var_som: clean up board watchdog code
  imx: imx8mp_rsb7320a1: enable wdog driver model in SPL
  imx: imx8mn-kontron-n801x: enable pinctrl_wdog in SPL
  imx: phycore_imx8mm/p: clean up board watchdog code

 arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi    |  4 ++
 arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi   |  4 ++
 arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi |  4 ++
 arch/arm/dts/imx8mm-venice-u-boot.dtsi        |  4 ++
 arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi    |  4 ++
 arch/arm/dts/imx8mn-venice-u-boot.dtsi        |  4 ++
 arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi    |  8 +++
 arch/arm/dts/imx8mp-venice-u-boot.dtsi        |  4 ++
 .../imx8mp_rsb3720a1/imx8mp_rsb3720a1.c       | 12 ----
 board/beacon/imx8mm/spl.c                     | 31 +---------
 board/beacon/imx8mn/spl.c                     | 21 +------
 board/compulab/imx8mm-cl-iot-gate/spl.c       | 31 +---------
 board/engicam/imx8mm/spl.c                    | 16 +-----
 board/gateworks/venice/spl.c                  | 29 ----------
 board/kontron/sl-mx8mm/spl.c                  | 30 +---------
 board/phytec/phycore_imx8mm/spl.c             | 31 +---------
 board/phytec/phycore_imx8mp/spl.c             | 27 ---------
 board/variscite/imx8mn_var_som/spl.c          | 22 +------
 configs/imx8mm-cl-iot-gate-optee_defconfig    |  1 +
 configs/imx8mm-cl-iot-gate_defconfig          |  1 +
 configs/imx8mm-icore-mx8mm-ctouch2_defconfig  |  1 -
 configs/imx8mm-icore-mx8mm-edimm2.2_defconfig |  1 -
 configs/imx8mm_beacon_defconfig               |  1 -
 configs/imx8mn_beacon_2g_defconfig            |  1 -
 configs/imx8mn_beacon_defconfig               |  1 -
 configs/imx8mn_var_som_defconfig              |  1 +
 configs/kontron-sl-mx8mm_defconfig            |  1 +
 configs/phycore-imx8mm_defconfig              |  1 +
 configs/phycore-imx8mp_defconfig              |  1 +
 include/configs/aristainetos2.h               |  2 -
 include/configs/capricorn-common.h            |  1 -
 include/configs/cgtqmx8.h                     |  1 -
 include/configs/imx8m.h                       | 57 +++++++++++++++++++
 include/configs/imx8mm-cl-iot-gate.h          | 20 +------
 include/configs/imx8mm_beacon.h               | 24 +-------
 include/configs/imx8mm_data_modul_edm_sbc.h   | 17 +-----
 include/configs/imx8mm_evk.h                  | 24 +-------
 include/configs/imx8mm_icore_mx8mm.h          | 24 +-------
 include/configs/imx8mm_venice.h               | 22 +------
 include/configs/imx8mn_beacon.h               |  3 -
 include/configs/imx8mn_bsh_smm_s2_common.h    | 19 +------
 include/configs/imx8mn_evk.h                  | 23 +-------
 include/configs/imx8mn_var_som.h              | 17 +-----
 include/configs/imx8mn_venice.h               | 22 +------
 include/configs/imx8mp_evk.h                  | 20 +------
 include/configs/imx8mp_rsb3720.h              | 17 +-----
 include/configs/imx8mp_venice.h               | 22 +------
 include/configs/imx8mq_cm.h                   | 25 +-------
 include/configs/imx8mq_evk.h                  | 20 +------
 include/configs/imx8mq_phanbell.h             | 20 +------
 include/configs/imx8qm_mek.h                  |  1 -
 include/configs/imx8qxp_mek.h                 |  1 -
 include/configs/imx8ulp_evk.h                 |  1 -
 include/configs/kontron-sl-mx8mm.h            | 15 +----
 include/configs/kontron_pitx_imx8m.h          | 20 +------
 include/configs/mx7dsabresd.h                 |  1 -
 include/configs/phycore_imx8mm.h              | 24 +-------
 include/configs/phycore_imx8mp.h              | 20 +------
 include/configs/pico-imx8mq.h                 | 21 +------
 include/configs/somlabs_visionsom_6ull.h      |  1 -
 include/configs/tbs2910.h                     |  3 -
 include/configs/verdin-imx8mm.h               | 24 +-------
 include/configs/verdin-imx8mp.h               | 20 +------
 63 files changed, 142 insertions(+), 707 deletions(-)
 create mode 100644 include/configs/imx8m.h

-- 
2.36.0

[PATCH 01/22] imx: drop CONFIG_MXC_UART_BASE

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Since these boards has CONFIG_DM_SERIAL and/or CONFIG_SPL_DM_SERIAL,
the legacy macro no need to be defined.

Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Soeren Moch <smoch@web.de>
---
 include/configs/aristainetos2.h            | 2 --
 include/configs/imx8mm_evk.h               | 2 --
 include/configs/imx8mn_bsh_smm_s2_common.h | 2 --
 include/configs/imx8mn_evk.h               | 2 --
 include/configs/imx8mp_evk.h               | 2 --
 include/configs/mx7dsabresd.h              | 1 -
 include/configs/somlabs_visionsom_6ull.h   | 1 -
 include/configs/tbs2910.h                  | 3 ---
 include/configs/verdin-imx8mm.h            | 3 ---
 include/configs/verdin-imx8mp.h            | 3 ---
 10 files changed, 21 deletions(-)

diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h
index 8ee97f1d4e3..27adae5d6bf 100644
--- a/include/configs/aristainetos2.h
+++ b/include/configs/aristainetos2.h
@@ -14,10 +14,8 @@
 #define CONFIG_HOSTNAME		"aristainetos2"
 
 #if (CONFIG_SYS_BOARD_VERSION == 5)
-#define CONFIG_MXC_UART_BASE	UART2_BASE
 #define CONSOLE_DEV	"ttymxc1"
 #elif (CONFIG_SYS_BOARD_VERSION == 6)
-#define CONFIG_MXC_UART_BASE	UART1_BASE
 #define CONSOLE_DEV	"ttymxc0"
 #endif
 
diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index 5e8f19c43fb..002b2e68bba 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -68,8 +68,6 @@
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE			0x80000000 /* 2GB DDR */
 
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(2)
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		2048
 #define CONFIG_SYS_MAXARGS		64
diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h
index 6387576c2da..57be38d9433 100644
--- a/include/configs/imx8mn_bsh_smm_s2_common.h
+++ b/include/configs/imx8mn_bsh_smm_s2_common.h
@@ -45,8 +45,6 @@
 #define CONFIG_SYS_SDRAM_BASE		0x40000000
 #define PHYS_SDRAM			0x40000000
 
-#define CONFIG_MXC_UART_BASE		UART4_BASE_ADDR
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		SZ_2K
 #define CONFIG_SYS_MAXARGS		64
diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h
index 805ae2a7518..86be1b8b3be 100644
--- a/include/configs/imx8mn_evk.h
+++ b/include/configs/imx8mn_evk.h
@@ -75,8 +75,6 @@
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE			0x80000000 /* 2GB DDR */
 
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(2)
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		2048
 #define CONFIG_SYS_MAXARGS		64
diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h
index 1e7c44c42a4..373098f10c4 100644
--- a/include/configs/imx8mp_evk.h
+++ b/include/configs/imx8mp_evk.h
@@ -79,8 +79,6 @@
 #define PHYS_SDRAM_2			0x100000000
 #define PHYS_SDRAM_2_SIZE		0xC0000000	/* 3 GB */
 
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(2)
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		2048
 #define CONFIG_SYS_MAXARGS		64
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index aaad232f0e4..62e62c6701f 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -12,7 +12,6 @@
 
 #define PHYS_SDRAM_SIZE			SZ_1G
 
-#define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
 
 #ifdef CONFIG_IMX_BOOTAUX
 /* Set to QSPI1 A flash at default */
diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h
index d4761296c75..e6aad386efe 100644
--- a/include/configs/somlabs_visionsom_6ull.h
+++ b/include/configs/somlabs_visionsom_6ull.h
@@ -16,7 +16,6 @@
 /* SPL options */
 #include "imx6_spl.h"
 
-#define CONFIG_MXC_UART_BASE		UART1_BASE
 
 /* MMC Configs */
 #ifdef CONFIG_FSL_USDHC
diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h
index b7a94812f35..5d8cb34ad9a 100644
--- a/include/configs/tbs2910.h
+++ b/include/configs/tbs2910.h
@@ -24,9 +24,6 @@
 
 #define CONFIG_SYS_BOOTMAPSZ		0x10000000
 
-/* Serial console */
-#define CONFIG_MXC_UART_BASE		UART1_BASE /* select UART1/UART2 */
-
 /* Framebuffer */
 #define CONFIG_IMX_HDMI
 #define CONFIG_IMX_VIDEO_SKIP
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index cd950ad055e..9ed9da043f6 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -83,9 +83,6 @@
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE			SZ_2G /* 2GB DDR */
 
-/* UART */
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(1)
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		SZ_2K
 #define CONFIG_SYS_MAXARGS		64
diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h
index 470f64d5a74..20e8473f793 100644
--- a/include/configs/verdin-imx8mp.h
+++ b/include/configs/verdin-imx8mp.h
@@ -99,9 +99,6 @@
 #define PHYS_SDRAM_2			0x100000000
 #define PHYS_SDRAM_2_SIZE		(SZ_4G + SZ_1G)
 
-/* UART */
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(3)
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		SZ_2K
 #define CONFIG_SYS_MAXARGS		64
-- 
2.36.0

[PATCH 02/22] imx: imx8m[m/n/p]_venice: Enable SPL_DM_SERIAL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
---
 include/configs/imx8mm_venice.h | 3 ---
 include/configs/imx8mn_venice.h | 3 ---
 include/configs/imx8mp_venice.h | 3 ---
 3 files changed, 9 deletions(-)

diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h
index 9836d5b73ca..90e8941a254 100644
--- a/include/configs/imx8mm_venice.h
+++ b/include/configs/imx8mm_venice.h
@@ -101,9 +101,6 @@
 #define PHYS_SDRAM_SIZE			SZ_4G
 #define CONFIG_SYS_BOOTM_LEN		SZ_256M
 
-/* UART */
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(2)
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		SZ_2K
 #define CONFIG_SYS_MAXARGS		64
diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h
index 3cbe11a9035..6555dd4349c 100644
--- a/include/configs/imx8mn_venice.h
+++ b/include/configs/imx8mn_venice.h
@@ -97,9 +97,6 @@
 #define PHYS_SDRAM_SIZE			SZ_4G
 #define CONFIG_SYS_BOOTM_LEN		SZ_256M
 
-/* UART */
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(2)
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		SZ_2K
 #define CONFIG_SYS_MAXARGS		64
diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h
index 4120e4cc6ba..c09a1b4572a 100644
--- a/include/configs/imx8mp_venice.h
+++ b/include/configs/imx8mp_venice.h
@@ -97,9 +97,6 @@
 #define PHYS_SDRAM_SIZE			SZ_4G
 #define CONFIG_SYS_BOOTM_LEN		SZ_256M
 
-/* UART */
-#define CONFIG_MXC_UART_BASE		UART2_BASE_ADDR
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		SZ_2K
 #define CONFIG_SYS_MAXARGS		64
-- 
2.36.0

Re: [PATCH 02/22] imx: imx8m[m/n/p]_venice: Enable SPL_DM_SERIAL

[Tim Harvey]

On Mon, May 23, 2022 at 4:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>
> From: Peng Fan <peng.fan@nxp.com>
>
> Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already
> marked with u-boot,dm-spl.
> Move preloader_console_init after spl_early_init to make sure driver
> model work.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Acked-by: Tim Harvey <tharvey@gateworks.com>
> Reviewed-by: Fabio Estevam <festevam@denx.de>
> ---
>  include/configs/imx8mm_venice.h | 3 ---
>  include/configs/imx8mn_venice.h | 3 ---
>  include/configs/imx8mp_venice.h | 3 ---
>  3 files changed, 9 deletions(-)
>
> diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h
> index 9836d5b73ca..90e8941a254 100644
> --- a/include/configs/imx8mm_venice.h
> +++ b/include/configs/imx8mm_venice.h
> @@ -101,9 +101,6 @@
>  #define PHYS_SDRAM_SIZE                        SZ_4G
>  #define CONFIG_SYS_BOOTM_LEN           SZ_256M
>
> -/* UART */
> -#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(2)
> -
>  /* Monitor Command Prompt */
>  #define CONFIG_SYS_CBSIZE              SZ_2K
>  #define CONFIG_SYS_MAXARGS             64
> diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h
> index 3cbe11a9035..6555dd4349c 100644
> --- a/include/configs/imx8mn_venice.h
> +++ b/include/configs/imx8mn_venice.h
> @@ -97,9 +97,6 @@
>  #define PHYS_SDRAM_SIZE                        SZ_4G
>  #define CONFIG_SYS_BOOTM_LEN           SZ_256M
>
> -/* UART */
> -#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(2)
> -
>  /* Monitor Command Prompt */
>  #define CONFIG_SYS_CBSIZE              SZ_2K
>  #define CONFIG_SYS_MAXARGS             64
> diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h
> index 4120e4cc6ba..c09a1b4572a 100644
> --- a/include/configs/imx8mp_venice.h
> +++ b/include/configs/imx8mp_venice.h
> @@ -97,9 +97,6 @@
>  #define PHYS_SDRAM_SIZE                        SZ_4G
>  #define CONFIG_SYS_BOOTM_LEN           SZ_256M
>
> -/* UART */
> -#define CONFIG_MXC_UART_BASE           UART2_BASE_ADDR
> -
>  /* Monitor Command Prompt */
>  #define CONFIG_SYS_CBSIZE              SZ_2K
>  #define CONFIG_SYS_MAXARGS             64
> --
> 2.36.0
>

Thanks Peng,

Tested-By: Tim Harvey <tharvey@gateworks.com>

Best Regards,

Tim

[PATCH 03/22] imx: imx8m[m/n]_beacon: Enable SPL_DM_SERIAL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm_beacon
Reviewed-by: Fabio Estevam <festevam@denx.de>
---
 board/beacon/imx8mm/spl.c          | 12 ++----------
 board/beacon/imx8mn/spl.c          | 11 ++---------
 configs/imx8mm_beacon_defconfig    |  1 -
 configs/imx8mn_beacon_2g_defconfig |  1 -
 configs/imx8mn_beacon_defconfig    |  1 -
 include/configs/imx8mm_beacon.h    |  2 --
 include/configs/imx8mn_beacon.h    |  2 --
 7 files changed, 4 insertions(+), 26 deletions(-)

diff --git a/board/beacon/imx8mm/spl.c b/board/beacon/imx8mm/spl.c
index 12266b22a42..f92b4c3ed0a 100644
--- a/board/beacon/imx8mm/spl.c
+++ b/board/beacon/imx8mm/spl.c
@@ -59,14 +59,8 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
-#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 
-static iomux_v3_cfg_t const uart_pads[] = {
-	IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
 static iomux_v3_cfg_t const wdog_pads[] = {
 	IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
@@ -79,8 +73,6 @@ int board_early_init_f(void)
 
 	set_wdog_reset(wdog);
 
-	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
 	return 0;
 }
 
@@ -128,8 +120,6 @@ void board_init_f(ulong dummy)
 
 	timer_init();
 
-	preloader_console_init();
-
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
 
@@ -139,6 +129,8 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
+	preloader_console_init();
+
 	ret = uclass_get_device_by_name(UCLASS_CLK,
 					"clock-controller@30380000",
 					&dev);
diff --git a/board/beacon/imx8mn/spl.c b/board/beacon/imx8mn/spl.c
index bb51be01c52..4563446db19 100644
--- a/board/beacon/imx8mn/spl.c
+++ b/board/beacon/imx8mn/spl.c
@@ -68,7 +68,6 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
-#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 #define PWM1_PAD_CTRL (PAD_CTL_FSEL2 | PAD_CTL_DSE6)
 
@@ -76,11 +75,6 @@ static iomux_v3_cfg_t const pwm_pads[] = {
 	IMX8MN_PAD_GPIO1_IO01__PWM1_OUT | MUX_PAD_CTRL(PWM1_PAD_CTRL),
 };
 
-static iomux_v3_cfg_t const uart_pads[] = {
-	IMX8MN_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	IMX8MN_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
 static iomux_v3_cfg_t const wdog_pads[] = {
 	IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
@@ -95,7 +89,6 @@ int board_early_init_f(void)
 	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
 	set_wdog_reset(wdog);
 
-	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
 	init_uart_clk(1);
 
 	return 0;
@@ -114,14 +107,14 @@ void board_init_f(ulong dummy)
 
 	timer_init();
 
-	preloader_console_init();
-
 	ret = spl_init();
 	if (ret) {
 		debug("spl_init() failed: %d\n", ret);
 		hang();
 	}
 
+	preloader_console_init();
+
 	enable_tzc380();
 
 	/* DDR initialization */
diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig
index 9cd8ac97285..a8981975f66 100644
--- a/configs/imx8mm_beacon_defconfig
+++ b/configs/imx8mm_beacon_defconfig
@@ -112,7 +112,6 @@ CONFIG_SPL_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_CONS_INDEX=2
 CONFIG_DM_SERIAL=y
-# CONFIG_SPL_DM_SERIAL is not set
 CONFIG_MXC_UART=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig
index 145f96d491d..cf1720725d0 100644
--- a/configs/imx8mn_beacon_2g_defconfig
+++ b/configs/imx8mn_beacon_2g_defconfig
@@ -114,7 +114,6 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_DM_RESET=y
 CONFIG_DM_SERIAL=y
-# CONFIG_SPL_DM_SERIAL is not set
 CONFIG_MXC_UART=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig
index 9052e68e967..882a6044989 100644
--- a/configs/imx8mn_beacon_defconfig
+++ b/configs/imx8mn_beacon_defconfig
@@ -118,7 +118,6 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_DM_RESET=y
 CONFIG_DM_SERIAL=y
-# CONFIG_SPL_DM_SERIAL is not set
 CONFIG_MXC_UART=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h
index 573ddaf2952..4c9b5491f78 100644
--- a/include/configs/imx8mm_beacon.h
+++ b/include/configs/imx8mm_beacon.h
@@ -91,8 +91,6 @@
 #define PHYS_SDRAM			0x40000000
 #define PHYS_SDRAM_SIZE		0x80000000 /* 2GB DDR */
 
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(2)
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		2048
 #define CONFIG_SYS_MAXARGS		64
diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h
index 79c6b1076ff..c16dda5e22c 100644
--- a/include/configs/imx8mn_beacon.h
+++ b/include/configs/imx8mn_beacon.h
@@ -107,8 +107,6 @@
 #define PHYS_SDRAM_SIZE		0x40000000 /* 1GB DDR */
 #endif
 
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(2)
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              2048
 #define CONFIG_SYS_MAXARGS             64
-- 
2.36.0

[PATCH 04/22] imx: imx8mm-cl-iot-gate: Enable DM_SERIAL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Enable CONFIG_DM_SERIAL. uart3 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
---
 board/compulab/imx8mm-cl-iot-gate/spl.c    | 12 ++----------
 configs/imx8mm-cl-iot-gate-optee_defconfig |  1 +
 configs/imx8mm-cl-iot-gate_defconfig       |  1 +
 include/configs/imx8mm-cl-iot-gate.h       |  2 --
 4 files changed, 4 insertions(+), 12 deletions(-)

diff --git a/board/compulab/imx8mm-cl-iot-gate/spl.c b/board/compulab/imx8mm-cl-iot-gate/spl.c
index 2dc62d6682e..f183704c9d2 100644
--- a/board/compulab/imx8mm-cl-iot-gate/spl.c
+++ b/board/compulab/imx8mm-cl-iot-gate/spl.c
@@ -83,14 +83,8 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
-#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 
-static iomux_v3_cfg_t const uart_pads[] = {
-	IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
 static iomux_v3_cfg_t const wdog_pads[] = {
 	IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
@@ -103,8 +97,6 @@ int board_early_init_f(void)
 
 	set_wdog_reset(wdog);
 
-	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
 	return 0;
 }
 
@@ -155,8 +147,6 @@ void board_init_f(ulong dummy)
 
 	timer_init();
 
-	preloader_console_init();
-
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
 
@@ -166,6 +156,8 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
+	preloader_console_init();
+
 	ret = uclass_get_device_by_name(UCLASS_CLK,
 					"clock-controller@30380000",
 					&dev);
diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig
index 8b3d1b3ef1a..0f0b34fecf9 100644
--- a/configs/imx8mm-cl-iot-gate-optee_defconfig
+++ b/configs/imx8mm-cl-iot-gate-optee_defconfig
@@ -108,6 +108,7 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_ABX80X=y
+CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig
index b418e86248f..7bd5f6540e9 100644
--- a/configs/imx8mm-cl-iot-gate_defconfig
+++ b/configs/imx8mm-cl-iot-gate_defconfig
@@ -111,6 +111,7 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_ABX80X=y
+CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h
index 8d9212ec64c..f262ab08f04 100644
--- a/include/configs/imx8mm-cl-iot-gate.h
+++ b/include/configs/imx8mm-cl-iot-gate.h
@@ -145,8 +145,6 @@
 #define PHYS_SDRAM			0x40000000
 #define PHYS_SDRAM_SIZE			0x80000000 /* 2GB DDR */
 
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(3)
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		2048
 #define CONFIG_SYS_MAXARGS		64
-- 
2.36.0

[PATCH 05/22] imx: imx8mm_icore: Enable SPL_DM_SERIAL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
---
 board/engicam/imx8mm/spl.c                    | 14 +++-----------
 configs/imx8mm-icore-mx8mm-ctouch2_defconfig  |  1 -
 configs/imx8mm-icore-mx8mm-edimm2.2_defconfig |  1 -
 include/configs/imx8mm_icore_mx8mm.h          |  3 ---
 4 files changed, 3 insertions(+), 16 deletions(-)

diff --git a/board/engicam/imx8mm/spl.c b/board/engicam/imx8mm/spl.c
index f9be769ec59..f75f2dc634c 100644
--- a/board/engicam/imx8mm/spl.c
+++ b/board/engicam/imx8mm/spl.c
@@ -54,19 +54,11 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
-#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 
-static iomux_v3_cfg_t const uart_pads[] = {
-	IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
 int board_early_init_f(void)
 {
-	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
-	return 0;
+       return 0;
 }
 
 void board_init_f(ulong dummy)
@@ -81,8 +73,6 @@ void board_init_f(ulong dummy)
 
 	timer_init();
 
-	preloader_console_init();
-
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
 
@@ -92,6 +82,8 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
+	preloader_console_init();
+
 	enable_tzc380();
 
 	/* DDR initialization */
diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
index 535ff6dcba5..d95a74a7237 100644
--- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
@@ -74,7 +74,6 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_CONS_INDEX=2
 CONFIG_DM_SERIAL=y
-# CONFIG_SPL_DM_SERIAL is not set
 CONFIG_MXC_UART=y
 CONFIG_SYSRESET=y
 CONFIG_SPL_SYSRESET=y
diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
index 101d5a00bc7..43c697a39d8 100644
--- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
@@ -74,7 +74,6 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_CONS_INDEX=2
 CONFIG_DM_SERIAL=y
-# CONFIG_SPL_DM_SERIAL is not set
 CONFIG_MXC_UART=y
 CONFIG_SYSRESET=y
 CONFIG_SPL_SYSRESET=y
diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h
index b9b24a8c51d..1a439370c09 100644
--- a/include/configs/imx8mm_icore_mx8mm.h
+++ b/include/configs/imx8mm_icore_mx8mm.h
@@ -65,9 +65,6 @@
 #define PHYS_SDRAM_SIZE			SZ_2G /* 2GB DDR */
 #define CONFIG_SYS_BOOTM_LEN		SZ_256M
 
-/* UART */
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(2)
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		2048
 #define CONFIG_SYS_MAXARGS		64
-- 
2.36.0

[PATCH 06/22] imx: imx8m[m/p]_phycore: Enable DM_SERIAL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Enable CONFIG_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
---
 board/phytec/phycore_imx8mm/spl.c | 12 ++----------
 board/phytec/phycore_imx8mp/spl.c |  8 --------
 configs/phycore-imx8mm_defconfig  |  1 +
 configs/phycore-imx8mp_defconfig  |  1 +
 include/configs/phycore_imx8mm.h  |  3 ---
 include/configs/phycore_imx8mp.h  |  3 ---
 6 files changed, 4 insertions(+), 24 deletions(-)

diff --git a/board/phytec/phycore_imx8mm/spl.c b/board/phytec/phycore_imx8mm/spl.c
index d54145ef995..7f24a3affc8 100644
--- a/board/phytec/phycore_imx8mm/spl.c
+++ b/board/phytec/phycore_imx8mm/spl.c
@@ -57,14 +57,8 @@ int board_fit_config_name_match(const char *name)
 	return 0;
 }
 
-#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE)
 
-static iomux_v3_cfg_t const uart_pads[] = {
-	IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
 static iomux_v3_cfg_t const wdog_pads[] = {
 	IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
@@ -77,8 +71,6 @@ int board_early_init_f(void)
 
 	set_wdog_reset(wdog);
 
-	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
 	return 0;
 }
 
@@ -92,8 +84,6 @@ void board_init_f(ulong dummy)
 
 	board_early_init_f();
 
-	preloader_console_init();
-
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
 
@@ -103,6 +93,8 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
+	preloader_console_init();
+
 	enable_tzc380();
 
 	/* DDR initialization */
diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c
index 19c486e5517..38a581bef57 100644
--- a/board/phytec/phycore_imx8mp/spl.c
+++ b/board/phytec/phycore_imx8mp/spl.c
@@ -89,14 +89,8 @@ int board_fit_config_name_match(const char *name)
 	return 0;
 }
 
-#define UART_PAD_CTRL   (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL   (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 
-static iomux_v3_cfg_t const uart_pads[] = {
-	MX8MP_PAD_UART1_RXD__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	MX8MP_PAD_UART1_TXD__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
 static iomux_v3_cfg_t const wdog_pads[] = {
 	MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
@@ -109,8 +103,6 @@ int board_early_init_f(void)
 
 	set_wdog_reset(wdog);
 
-	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
 	return 0;
 }
 
diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig
index ba5833f7060..9da222afc54 100644
--- a/configs/phycore-imx8mm_defconfig
+++ b/configs/phycore-imx8mm_defconfig
@@ -107,6 +107,7 @@ CONFIG_PINCTRL_IMX8M=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index 86d0f4df7f6..a851b1bdccb 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -98,6 +98,7 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_SPL_POWER_I2C=y
+CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y
 CONFIG_SYSRESET=y
 CONFIG_SPL_SYSRESET=y
diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h
index 46fadd56106..564b8125ba3 100644
--- a/include/configs/phycore_imx8mm.h
+++ b/include/configs/phycore_imx8mm.h
@@ -83,9 +83,6 @@
 #define PHYS_SDRAM			0x40000000
 #define PHYS_SDRAM_SIZE                 SZ_2G /* 2GB DDR */
 
-/* UART */
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(3)
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		SZ_2K
 #define CONFIG_SYS_MAXARGS		64
diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h
index eb92c423392..3e4315f2b81 100644
--- a/include/configs/phycore_imx8mp.h
+++ b/include/configs/phycore_imx8mp.h
@@ -83,9 +83,6 @@
 #define PHYS_SDRAM			0x40000000
 #define PHYS_SDRAM_SIZE			0x80000000
 
-/* UART */
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(1)
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		SZ_2K
 #define CONFIG_SYS_MAXARGS		64
-- 
2.36.0

[PATCH 07/22] imx: imx8mn_var_som: enable DM_SERIAL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Enable CONFIG_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
---
 board/variscite/imx8mn_var_som/spl.c | 11 ++---------
 configs/imx8mn_var_som_defconfig     |  1 +
 include/configs/imx8mn_var_som.h     |  2 --
 3 files changed, 3 insertions(+), 11 deletions(-)

diff --git a/board/variscite/imx8mn_var_som/spl.c b/board/variscite/imx8mn_var_som/spl.c
index 32703c5f0b3..1a8b64fc0a9 100644
--- a/board/variscite/imx8mn_var_som/spl.c
+++ b/board/variscite/imx8mn_var_som/spl.c
@@ -40,14 +40,8 @@ void spl_board_init(void)
 		puts("Failed to find clock node. Check device tree\n");
 }
 
-#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 
-static const iomux_v3_cfg_t uart_pads[] = {
-	IMX8MN_PAD_UART4_RXD__UART4_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	IMX8MN_PAD_UART4_TXD__UART4_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
 static const iomux_v3_cfg_t wdog_pads[] = {
 	IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
@@ -59,7 +53,6 @@ int board_early_init_f(void)
 	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
 	set_wdog_reset(wdog);
 
-	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
 	init_uart_clk(3);
 
 	return 0;
@@ -78,14 +71,14 @@ void board_init_f(ulong dummy)
 
 	timer_init();
 
-	preloader_console_init();
-
 	ret = spl_init();
 	if (ret) {
 		debug("spl_init() failed: %d\n", ret);
 		hang();
 	}
 
+	preloader_console_init();
+
 	/* DDR initialization */
 	spl_dram_init();
 
diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig
index 5ec82f2a926..39209f62c46 100644
--- a/configs/imx8mn_var_som_defconfig
+++ b/configs/imx8mn_var_som_defconfig
@@ -83,6 +83,7 @@ CONFIG_SPL_DM_PMIC_BD71837=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y
 CONFIG_SYSRESET=y
 CONFIG_SYSRESET_PSCI=y
diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h
index 00358892b28..6ce60b0d704 100644
--- a/include/configs/imx8mn_var_som.h
+++ b/include/configs/imx8mn_var_som.h
@@ -64,8 +64,6 @@
 #define PHYS_SDRAM			0x40000000
 #define PHYS_SDRAM_SIZE			SZ_1G /* 1GB DDR */
 
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(4)
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		SZ_2K
 #define CONFIG_SYS_MAXARGS		64
-- 
2.36.0

[PATCH 08/22] imx: kontron-sl-mx8mm: enable DM_SERIAL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Enable CONFIG_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
---
 board/kontron/sl-mx8mm/spl.c       | 12 ++----------
 configs/kontron-sl-mx8mm_defconfig |  1 +
 include/configs/kontron-sl-mx8mm.h |  1 -
 3 files changed, 3 insertions(+), 11 deletions(-)

diff --git a/board/kontron/sl-mx8mm/spl.c b/board/kontron/sl-mx8mm/spl.c
index 4ef03c8c172..a58a75dc958 100644
--- a/board/kontron/sl-mx8mm/spl.c
+++ b/board/kontron/sl-mx8mm/spl.c
@@ -32,7 +32,6 @@ enum {
 
 #define GPIO_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 #define I2C_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE)
-#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 
 #define TOUCH_RESET_GPIO	IMX_GPIO_NR(3, 23)
@@ -51,11 +50,6 @@ static iomux_v3_cfg_t const touch_gpio[] = {
 	IMX8MM_PAD_SAI5_RXD2_GPIO3_IO23 | MUX_PAD_CTRL(GPIO_PAD_CTRL)
 };
 
-static iomux_v3_cfg_t const uart_pads[] = {
-	IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
 static iomux_v3_cfg_t const wdog_pads[] = {
 	IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
@@ -230,8 +224,6 @@ int board_early_init_f(void)
 
 	set_wdog_reset(wdog);
 
-	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
 	return 0;
 }
 
@@ -273,8 +265,6 @@ void board_init_f(ulong dummy)
 
 	timer_init();
 
-	preloader_console_init();
-
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
 
@@ -284,6 +274,8 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
+	preloader_console_init();
+
 	enable_tzc380();
 
 	/* PMIC initialization */
diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig
index f07b7890a0c..1abbbf41f5f 100644
--- a/configs/kontron-sl-mx8mm_defconfig
+++ b/configs/kontron-sl-mx8mm_defconfig
@@ -103,6 +103,7 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_RV8803=y
 CONFIG_CONS_INDEX=2
+CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h
index 231571b05eb..10f06e66836 100644
--- a/include/configs/kontron-sl-mx8mm.h
+++ b/include/configs/kontron-sl-mx8mm.h
@@ -28,7 +28,6 @@
 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* Board and environment settings */
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(3)
 #define CONFIG_HOSTNAME			"kontron-mx8mm"
 
 #ifdef CONFIG_USB_EHCI_HCD
-- 
2.36.0

[PATCH 09/22] configs: drop CONFIG_SPL_ABORT_ON_RAW_IMAGE

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

CONFIG_SPL_RAW_IMAGE_SUPPORT default y has been used to replace
CONFIG_SPL_ABORT_ON_RAW_IMAGE for quite some time, so drop
CONFIG_SPL_ABORT_ON_RAW_IMAGE.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 include/configs/capricorn-common.h          | 1 -
 include/configs/cgtqmx8.h                   | 1 -
 include/configs/imx8mm-cl-iot-gate.h        | 1 -
 include/configs/imx8mm_beacon.h             | 1 -
 include/configs/imx8mm_data_modul_edm_sbc.h | 1 -
 include/configs/imx8mm_evk.h                | 1 -
 include/configs/imx8mm_icore_mx8mm.h        | 1 -
 include/configs/imx8mm_venice.h             | 1 -
 include/configs/imx8mn_beacon.h             | 1 -
 include/configs/imx8mn_evk.h                | 1 -
 include/configs/imx8mn_venice.h             | 1 -
 include/configs/imx8mp_evk.h                | 1 -
 include/configs/imx8mp_rsb3720.h            | 1 -
 include/configs/imx8mp_venice.h             | 1 -
 include/configs/imx8mq_cm.h                 | 1 -
 include/configs/imx8mq_evk.h                | 1 -
 include/configs/imx8mq_phanbell.h           | 1 -
 include/configs/imx8qm_mek.h                | 1 -
 include/configs/imx8qxp_mek.h               | 1 -
 include/configs/imx8ulp_evk.h               | 1 -
 include/configs/kontron_pitx_imx8m.h        | 1 -
 include/configs/phycore_imx8mm.h            | 1 -
 include/configs/phycore_imx8mp.h            | 1 -
 include/configs/pico-imx8mq.h               | 1 -
 include/configs/verdin-imx8mm.h             | 1 -
 include/configs/verdin-imx8mp.h             | 1 -
 26 files changed, 26 deletions(-)

diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h
index 364bd50b591..aa4c9818638 100644
--- a/include/configs/capricorn-common.h
+++ b/include/configs/capricorn-common.h
@@ -26,7 +26,6 @@
 #define CONFIG_MALLOC_F_ADDR		0x00120000
 
 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif /* CONFIG_SPL_BUILD */
 
diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h
index 4c04bbf6447..eee6e735b1f 100644
--- a/include/configs/cgtqmx8.h
+++ b/include/configs/cgtqmx8.h
@@ -25,7 +25,6 @@
 
 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
 
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
 /* Flat Device Tree Definitions */
diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h
index f262ab08f04..cbb27db6be0 100644
--- a/include/configs/imx8mm-cl-iot-gate.h
+++ b/include/configs/imx8mm-cl-iot-gate.h
@@ -27,7 +27,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR		0x912000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h
index 4c9b5491f78..a9ca13a9da4 100644
--- a/include/configs/imx8mm_beacon.h
+++ b/include/configs/imx8mm_beacon.h
@@ -24,7 +24,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR		0x930000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h
index 67667dd523d..2f3608835a2 100644
--- a/include/configs/imx8mm_data_modul_edm_sbc.h
+++ b/include/configs/imx8mm_data_modul_edm_sbc.h
@@ -25,7 +25,6 @@
 #define CONFIG_MALLOC_F_ADDR		0x930000
 
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index 002b2e68bba..d216455ebd9 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -26,7 +26,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR		0x930000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h
index 1a439370c09..34993cafdaf 100644
--- a/include/configs/imx8mm_icore_mx8mm.h
+++ b/include/configs/imx8mm_icore_mx8mm.h
@@ -25,7 +25,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 # define CONFIG_MALLOC_F_ADDR		0x930000
 /* For RAW image gives a error info not panic */
-# define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif /* CONFIG_SPL_BUILD */
 
 #ifndef CONFIG_SPL_BUILD
diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h
index 90e8941a254..75f7dae8349 100644
--- a/include/configs/imx8mm_venice.h
+++ b/include/configs/imx8mm_venice.h
@@ -24,7 +24,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR		0x930000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h
index c16dda5e22c..57b99d5a110 100644
--- a/include/configs/imx8mn_beacon.h
+++ b/include/configs/imx8mn_beacon.h
@@ -25,7 +25,6 @@
 #define CONFIG_MALLOC_F_ADDR		0x184000
 
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif /* CONFIG_SPL_BUILD */
 
diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h
index 86be1b8b3be..0b2eefa6368 100644
--- a/include/configs/imx8mn_evk.h
+++ b/include/configs/imx8mn_evk.h
@@ -25,7 +25,6 @@
 #define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
 
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h
index 6555dd4349c..160ba9648db 100644
--- a/include/configs/imx8mn_venice.h
+++ b/include/configs/imx8mn_venice.h
@@ -22,7 +22,6 @@
 #define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
 
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
 #define MEM_LAYOUT_ENV_SETTINGS \
diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h
index 373098f10c4..4aac7c81d2e 100644
--- a/include/configs/imx8mp_evk.h
+++ b/include/configs/imx8mp_evk.h
@@ -24,7 +24,6 @@
 #define CONFIG_SYS_SPL_MALLOC_START	0x42200000
 #define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
 
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #define CONFIG_POWER_PCA9450
 
diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h
index 52e8ea8f86a..7dcc2e16c71 100644
--- a/include/configs/imx8mp_rsb3720.h
+++ b/include/configs/imx8mp_rsb3720.h
@@ -39,7 +39,6 @@
 						  * set \
 						  */
 
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #if defined(CONFIG_NAND_BOOT)
 #define CONFIG_SPL_NAND_MXS
diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h
index c09a1b4572a..17400cffc63 100644
--- a/include/configs/imx8mp_venice.h
+++ b/include/configs/imx8mp_venice.h
@@ -22,7 +22,6 @@
 #define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
 
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
 #define MEM_LAYOUT_ENV_SETTINGS \
diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h
index 6eecfc813a4..7a9dd962ac2 100644
--- a/include/configs/imx8mq_cm.h
+++ b/include/configs/imx8mq_cm.h
@@ -26,7 +26,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR		0x182000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h
index e31f4135ae5..b7294ebef1e 100644
--- a/include/configs/imx8mq_evk.h
+++ b/include/configs/imx8mq_evk.h
@@ -27,7 +27,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR		0x182000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #define CONFIG_POWER_PFUZE100
 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h
index 57e45b0447c..93e531b66fd 100644
--- a/include/configs/imx8mq_phanbell.h
+++ b/include/configs/imx8mq_phanbell.h
@@ -24,7 +24,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR		0x182000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
 /* ENET Config */
diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h
index 61d56e269ac..ddcd6cf2319 100644
--- a/include/configs/imx8qm_mek.h
+++ b/include/configs/imx8qm_mek.h
@@ -26,7 +26,6 @@
 
 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
 
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
 #ifdef CONFIG_AHAB_BOOT
diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h
index 26dc4ded030..dee6852df4c 100644
--- a/include/configs/imx8qxp_mek.h
+++ b/include/configs/imx8qxp_mek.h
@@ -24,7 +24,6 @@
 
 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
 
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
 #ifdef CONFIG_AHAB_BOOT
diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h
index 05df43b39b4..190bbb8c13c 100644
--- a/include/configs/imx8ulp_evk.h
+++ b/include/configs/imx8ulp_evk.h
@@ -23,7 +23,6 @@
 
 #define CONFIG_MALLOC_F_ADDR		0x22040000
 
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
 
 #endif
 
diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h
index 1834991ac3b..9089b76d26e 100644
--- a/include/configs/kontron_pitx_imx8m.h
+++ b/include/configs/kontron_pitx_imx8m.h
@@ -28,7 +28,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR		0x182000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 
 #define CONFIG_POWER_PFUZE100
diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h
index 564b8125ba3..b70c31ca633 100644
--- a/include/configs/phycore_imx8mm.h
+++ b/include/configs/phycore_imx8mm.h
@@ -27,7 +27,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR		0x930000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h
index 3e4315f2b81..95d70bb92d1 100644
--- a/include/configs/phycore_imx8mp.h
+++ b/include/configs/phycore_imx8mp.h
@@ -24,7 +24,6 @@
 #define CONFIG_SYS_SPL_MALLOC_START	0x42200000
 #define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K
 
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #define CONFIG_POWER_PCA9450
 
diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h
index 1dc7d352590..de035160255 100644
--- a/include/configs/pico-imx8mq.h
+++ b/include/configs/pico-imx8mq.h
@@ -24,7 +24,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR		0x182000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
 /* ENET Config */
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index 9ed9da043f6..3f9ddc4eb81 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -26,7 +26,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR		0x930000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
 #define MEM_LAYOUT_ENV_SETTINGS \
diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h
index 20e8473f793..09eac5288ce 100644
--- a/include/configs/verdin-imx8mp.h
+++ b/include/configs/verdin-imx8mp.h
@@ -25,7 +25,6 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR				0x184000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #define CONFIG_POWER_PCA9450
 
-- 
2.36.0

[PATCH 10/22] configs: imx8m: use common imx8m.h for i.MX8MM

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Some SPL definitions could be generalized, so use imx8m.h for that.
i.MX8MN/Q/P will follow up.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mm-venice-*
---
 include/configs/imx8m.h                     | 29 +++++++++++++++++++++
 include/configs/imx8mm-cl-iot-gate.h        | 17 ++----------
 include/configs/imx8mm_beacon.h             | 21 +--------------
 include/configs/imx8mm_data_modul_edm_sbc.h | 16 +++---------
 include/configs/imx8mm_evk.h                | 21 +--------------
 include/configs/imx8mm_icore_mx8mm.h        | 20 +-------------
 include/configs/imx8mm_venice.h             | 18 ++-----------
 include/configs/kontron-sl-mx8mm.h          | 14 +---------
 include/configs/phycore_imx8mm.h            | 20 +-------------
 include/configs/verdin-imx8mm.h             | 20 +-------------
 10 files changed, 42 insertions(+), 154 deletions(-)
 create mode 100644 include/configs/imx8m.h

diff --git a/include/configs/imx8m.h b/include/configs/imx8m.h
new file mode 100644
index 00000000000..cb8ce5689ac
--- /dev/null
+++ b/include/configs/imx8m.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2022 NXP
+ */
+
+#ifndef __IMX8MM_H
+#define __IMX8MM_H
+
+#include <linux/sizes.h>
+#include <linux/stringify.h>
+#include <asm/arch/imx-regs.h>
+
+#define CONFIG_SPL_MAX_SIZE		(172 * 1024)
+#define CONFIG_SYS_MONITOR_LEN	SZ_512K
+#define CONFIG_SYS_UBOOT_BASE	\
+	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_STACK		0x920000
+#define CONFIG_SPL_BSS_START_ADDR	0x910000
+#define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K
+#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K
+
+/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
+#define CONFIG_MALLOC_F_ADDR		0x930000
+
+#endif
+#endif
diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h
index cbb27db6be0..cbf33a76a09 100644
--- a/include/configs/imx8mm-cl-iot-gate.h
+++ b/include/configs/imx8mm-cl-iot-gate.h
@@ -6,28 +6,15 @@
 #ifndef __IMX8MM_CL_IOT_GATE_H
 #define __IMX8MM_CL_IOT_GATE_H
 
-#include <linux/sizes.h>
-#include <linux/stringify.h>
-#include <asm/arch/imx-regs.h>
+#include <configs/imx8m.h>
 #include <config_distro_bootcmd.h>
 
 #define CONFIG_SYS_BOOTM_LEN		(32 * SZ_1M)
-#define CONFIG_SPL_MAX_SIZE		(148 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_UBOOT_BASE	\
-	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK		0x920000
-#define CONFIG_SPL_BSS_START_ADDR	0x910000
-#define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K	/* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
-
+#undef CONFIG_MALLOC_F_ADDR
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR		0x912000
-/* For RAW image gives a error info not panic */
-
 #endif
 
 /* GUIDs for capsule updatable firmware images */
diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h
index a9ca13a9da4..c73188a16f2 100644
--- a/include/configs/imx8mm_beacon.h
+++ b/include/configs/imx8mm_beacon.h
@@ -6,26 +6,7 @@
 #ifndef __IMX8MM_BEACON_H
 #define __IMX8MM_BEACON_H
 
-#include <linux/sizes.h>
-#include <asm/arch/imx-regs.h>
-
-#define CONFIG_SPL_MAX_SIZE		(148 * 1024)
-#define CONFIG_SYS_MONITOR_LEN	SZ_512K
-#define CONFIG_SYS_UBOOT_BASE	\
-	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK		0x920000
-#define CONFIG_SPL_BSS_START_ADDR	0x910000
-#define CONFIG_SPL_BSS_MAX_SIZE	SZ_8K	/* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
-
-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-#define CONFIG_MALLOC_F_ADDR		0x930000
-/* For RAW image gives a error info not panic */
-
-#endif
+#include <configs/imx8m.h>
 
 /* Initial environment variables */
 #define CONFIG_EXTRA_ENV_SETTINGS		\
diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h
index 2f3608835a2..e098cddf967 100644
--- a/include/configs/imx8mm_data_modul_edm_sbc.h
+++ b/include/configs/imx8mm_data_modul_edm_sbc.h
@@ -6,26 +6,16 @@
 #ifndef __IMX8MM_DATA_MODUL_EDM_SBC_H
 #define __IMX8MM_DATA_MODUL_EDM_SBC_H
 
-#include <linux/sizes.h>
-#include <linux/stringify.h>
-#include <asm/arch/imx-regs.h>
+#include <configs/imx8m.h>
 
 #define CONFIG_SYS_BOOTM_LEN		SZ_128M
 
-#define CONFIG_SPL_MAX_SIZE		(148 * 1024)
+#undef CONFIG_SYS_MONITOR_LEN
 #define CONFIG_SYS_MONITOR_LEN		SZ_1M
 
-#define CONFIG_SPL_STACK		0x920000
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_BSS_START_ADDR	0x910000
-#define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K	/* 8 kiB */
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
+#undef CONFIG_SYS_SPL_MALLOC_SIZE
 #define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_16M	/* 16 MiB */
-
-#define CONFIG_MALLOC_F_ADDR		0x930000
-
-/* For RAW image gives a error info not panic */
-
 #endif
 
 /* Link Definitions */
diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index d216455ebd9..3d617f11d5e 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -6,28 +6,9 @@
 #ifndef __IMX8MM_EVK_H
 #define __IMX8MM_EVK_H
 
-#include <linux/sizes.h>
-#include <linux/stringify.h>
-#include <asm/arch/imx-regs.h>
+#include <configs/imx8m.h>
 
 #define CONFIG_SYS_BOOTM_LEN		(64 * SZ_1M)
-#define CONFIG_SPL_MAX_SIZE		(148 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_UBOOT_BASE	\
-	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK		0x920000
-#define CONFIG_SPL_BSS_START_ADDR	0x910000
-#define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K	/* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
-
-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-#define CONFIG_MALLOC_F_ADDR		0x930000
-/* For RAW image gives a error info not panic */
-
-#endif
 
 #ifndef CONFIG_SPL_BUILD
 #define BOOT_TARGET_DEVICES(func) \
diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h
index 34993cafdaf..7d52d43ef13 100644
--- a/include/configs/imx8mm_icore_mx8mm.h
+++ b/include/configs/imx8mm_icore_mx8mm.h
@@ -7,25 +7,7 @@
 #ifndef __IMX8MM_ICORE_MX8MM_H
 #define __IMX8MM_ICORE_MX8MM_H
 
-#include <linux/sizes.h>
-#include <asm/arch/imx-regs.h>
-
-#define CONFIG_SPL_MAX_SIZE		(148 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_UBOOT_BASE \
-	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-
-#ifdef CONFIG_SPL_BUILD
-# define CONFIG_SPL_STACK		0x920000
-# define CONFIG_SPL_BSS_START_ADDR	0x910000
-# define CONFIG_SPL_BSS_MAX_SIZE	SZ_8K
-# define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-# define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K
-
-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-# define CONFIG_MALLOC_F_ADDR		0x930000
-/* For RAW image gives a error info not panic */
-#endif /* CONFIG_SPL_BUILD */
+#include <configs/imx8m.h>
 
 #ifndef CONFIG_SPL_BUILD
 #define BOOT_TARGET_DEVICES(func) \
diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h
index 75f7dae8349..cc6fa9479ae 100644
--- a/include/configs/imx8mm_venice.h
+++ b/include/configs/imx8mm_venice.h
@@ -6,25 +6,11 @@
 #ifndef __IMX8MM_VENICE_H
 #define __IMX8MM_VENICE_H
 
-#include <asm/arch/imx-regs.h>
-#include <linux/sizes.h>
-
-#define CONFIG_SPL_MAX_SIZE		(148 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_UBOOT_BASE	\
-	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+#include <configs/imx8m.h>
 
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK		0x920000
-#define CONFIG_SPL_BSS_START_ADDR	0x910000
-#define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
+#undef CONFIG_SYS_SPL_MALLOC_SIZE
 #define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_1M
-
-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-#define CONFIG_MALLOC_F_ADDR		0x930000
-/* For RAW image gives a error info not panic */
-
 #endif
 
 #define MEM_LAYOUT_ENV_SETTINGS \
diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h
index 10f06e66836..b1579097570 100644
--- a/include/configs/kontron-sl-mx8mm.h
+++ b/include/configs/kontron-sl-mx8mm.h
@@ -7,8 +7,7 @@
 #ifndef __KONTRON_MX8MM_CONFIG_H
 #define __KONTRON_MX8MM_CONFIG_H
 
-#include <asm/arch/imx-regs.h>
-#include <linux/sizes.h>
+#include <configs/imx8m.h>
 
 #ifdef CONFIG_SPL_BUILD
 #include <config.h>
@@ -57,17 +56,6 @@
 #endif
 
 #define CONFIG_SYS_BOOTM_LEN		SZ_64M
-#define CONFIG_SPL_MAX_SIZE		(148 * SZ_1K)
-
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK		0x91fff0
-#define CONFIG_SPL_BSS_START_ADDR	0x910000
-#define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K
-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-#define CONFIG_MALLOC_F_ADDR		0x930000
-#endif
 
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h
index b70c31ca633..7fdb429c79a 100644
--- a/include/configs/phycore_imx8mm.h
+++ b/include/configs/phycore_imx8mm.h
@@ -7,27 +7,9 @@
 #ifndef __PHYCORE_IMX8MM_H
 #define __PHYCORE_IMX8MM_H
 
-#include <linux/sizes.h>
-#include <linux/stringify.h>
-#include <asm/arch/imx-regs.h>
+#include <configs/imx8m.h>
 
 #define CONFIG_SYS_BOOTM_LEN		SZ_64M
-#define CONFIG_SPL_MAX_SIZE		(148 * SZ_1K)
-#define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_UBOOT_BASE \
-		(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK		0x920000
-#define CONFIG_SPL_BSS_START_ADDR	0x910000
-#define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K
-
-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-#define CONFIG_MALLOC_F_ADDR		0x930000
-/* For RAW image gives a error info not panic */
-#endif
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"image=Image\0" \
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index 3f9ddc4eb81..31fff9dbf9d 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -6,28 +6,10 @@
 #ifndef __VERDIN_IMX8MM_H
 #define __VERDIN_IMX8MM_H
 
-#include <asm/arch/imx-regs.h>
-#include <linux/sizes.h>
-
-#define CONFIG_SPL_MAX_SIZE		(148 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_UBOOT_BASE	\
-	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+#include <configs/imx8m.h>
 
 #define CONFIG_SYS_BOOTM_LEN           SZ_64M
 
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK		0x920000
-#define CONFIG_SPL_BSS_START_ADDR	0x910000
-#define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K	/* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
-
-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-#define CONFIG_MALLOC_F_ADDR		0x930000
-/* For RAW image gives a error info not panic */
-#endif
-
 #define MEM_LAYOUT_ENV_SETTINGS \
 	"fdt_addr_r=0x44000000\0" \
 	"kernel_addr_r=0x42000000\0" \
-- 
2.36.0

[PATCH 11/22] configs: imx8m: use common imx8m.h for i.MX8MN

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Some SPL definitions could be generalized, so use imx8m.h for iMX8MN.

Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mn-venice-*
Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com> #i.MX8MN BSH SMM S2 PRO board
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 include/configs/imx8m.h                    | 10 ++++++++++
 include/configs/imx8mn_bsh_smm_s2_common.h | 17 +----------------
 include/configs/imx8mn_evk.h               | 20 +-------------------
 include/configs/imx8mn_var_som.h           | 15 +--------------
 include/configs/imx8mn_venice.h            | 18 +-----------------
 5 files changed, 14 insertions(+), 66 deletions(-)

diff --git a/include/configs/imx8m.h b/include/configs/imx8m.h
index cb8ce5689ac..354a9b9fd0d 100644
--- a/include/configs/imx8m.h
+++ b/include/configs/imx8m.h
@@ -16,6 +16,8 @@
 	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
 #ifdef CONFIG_SPL_BUILD
+
+#ifdef CONFIG_IMX8MM
 #define CONFIG_SPL_STACK		0x920000
 #define CONFIG_SPL_BSS_START_ADDR	0x910000
 #define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K
@@ -25,5 +27,13 @@
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR		0x930000
 
+#elif defined(CONFIG_IMX8MN)
+#define CONFIG_SPL_STACK		0x980000
+#define CONFIG_SPL_BSS_START_ADDR	0x950000
+#define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K
+#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K
+
+#endif
 #endif
 #endif
diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h
index 57be38d9433..eb210dc597b 100644
--- a/include/configs/imx8mn_bsh_smm_s2_common.h
+++ b/include/configs/imx8mn_bsh_smm_s2_common.h
@@ -6,25 +6,10 @@
 #ifndef __IMX8MN_BSH_SMM_S2_COMMON_H
 #define __IMX8MN_BSH_SMM_S2_COMMON_H
 
-#include <linux/sizes.h>
-#include <linux/stringify.h>
-#include <asm/arch/imx-regs.h>
+#include <configs/imx8m.h>
 
 #define CONFIG_SYS_BOOTM_LEN		(32 * SZ_1M)
 
-#define CONFIG_SPL_MAX_SIZE		(148 * SZ_1K)
-#define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_UBOOT_BASE	\
-	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-
-#define CONFIG_SPL_STACK		0x980000
-#define CONFIG_SPL_BSS_START_ADDR	0x950000
-#define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K
-
-
-
 #define MEM_LAYOUT_ENV_SETTINGS \
 	"scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
 	"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h
index 0b2eefa6368..902e0f8434f 100644
--- a/include/configs/imx8mn_evk.h
+++ b/include/configs/imx8mn_evk.h
@@ -6,28 +6,10 @@
 #ifndef __IMX8MN_EVK_H
 #define __IMX8MN_EVK_H
 
-#include <linux/sizes.h>
-#include <linux/stringify.h>
-#include <asm/arch/imx-regs.h>
+#include <configs/imx8m.h>
 
 #define CONFIG_SYS_BOOTM_LEN		(32 * SZ_1M)
 
-#define CONFIG_SPL_MAX_SIZE		(148 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_UBOOT_BASE	\
-	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK		0x980000
-#define CONFIG_SPL_BSS_START_ADDR	0x950000
-#define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K	/* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
-
-/* For RAW image gives a error info not panic */
-
-#endif
-
 #ifndef CONFIG_SPL_BUILD
 #define BOOT_TARGET_DEVICES(func) \
 	func(MMC, mmc, 1) \
diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h
index 6ce60b0d704..fc9c4ca4530 100644
--- a/include/configs/imx8mn_var_som.h
+++ b/include/configs/imx8mn_var_som.h
@@ -6,23 +6,10 @@
 #ifndef __IMX8MN_VAR_SOM_H
 #define __IMX8MN_VAR_SOM_H
 
-#include <linux/sizes.h>
-#include <linux/stringify.h>
-#include <asm/arch/imx-regs.h>
+#include <configs/imx8m.h>
 
 #define CONFIG_SYS_BOOTM_LEN		(32 * SZ_1M)
 
-#define CONFIG_SPL_MAX_SIZE		(148 * SZ_1K)
-#define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_UBOOT_BASE	\
-	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-
-#define CONFIG_SPL_STACK		0x980000
-#define CONFIG_SPL_BSS_START_ADDR	0x950000
-#define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K
-
 #define BOOT_TARGET_DEVICES(func) \
 	func(MMC, mmc, 1) \
 	func(MMC, mmc, 2) \
diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h
index 160ba9648db..d122a5a5a79 100644
--- a/include/configs/imx8mn_venice.h
+++ b/include/configs/imx8mn_venice.h
@@ -6,23 +6,7 @@
 #ifndef __IMX8MM_VENICE_H
 #define __IMX8MM_VENICE_H
 
-#include <asm/arch/imx-regs.h>
-#include <linux/sizes.h>
-
-#define CONFIG_SPL_MAX_SIZE		(148 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_UBOOT_BASE	\
-	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK		0x980000
-#define CONFIG_SPL_BSS_START_ADDR	0x950000
-#define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K	/* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
-
-/* For RAW image gives a error info not panic */
-#endif
+#include <configs/imx8m.h>
 
 #define MEM_LAYOUT_ENV_SETTINGS \
 	"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
-- 
2.36.0

[PATCH 12/22] configs: imx8m: use common imx8m.h for i.MX8MP

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Some SPL definitions could be generalized, so use imx8m.h for iMX8MP.

Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-*
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 include/configs/imx8m.h          |  8 ++++++++
 include/configs/imx8mp_evk.h     | 17 +----------------
 include/configs/imx8mp_rsb3720.h | 16 +---------------
 include/configs/imx8mp_venice.h  | 18 +-----------------
 include/configs/phycore_imx8mp.h | 16 +---------------
 include/configs/verdin-imx8mp.h  | 16 +---------------
 6 files changed, 13 insertions(+), 78 deletions(-)

diff --git a/include/configs/imx8m.h b/include/configs/imx8m.h
index 354a9b9fd0d..7894a1c1068 100644
--- a/include/configs/imx8m.h
+++ b/include/configs/imx8m.h
@@ -34,6 +34,14 @@
 #define CONFIG_SYS_SPL_MALLOC_START	0x42200000
 #define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K
 
+#elif defined(CONFIG_IMX8MP)
+/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
+#define CONFIG_SPL_STACK		0x960000
+#define CONFIG_SPL_BSS_START_ADDR	0x0098FC00
+#define CONFIG_SPL_BSS_MAX_SIZE		0x400
+#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K
+
 #endif
 #endif
 #endif
diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h
index 4aac7c81d2e..b54b88a8f67 100644
--- a/include/configs/imx8mp_evk.h
+++ b/include/configs/imx8mp_evk.h
@@ -6,27 +6,12 @@
 #ifndef __IMX8MP_EVK_H
 #define __IMX8MP_EVK_H
 
-#include <linux/sizes.h>
-#include <linux/stringify.h>
-#include <asm/arch/imx-regs.h>
+#include <configs/imx8m.h>
 
 #define CONFIG_SYS_BOOTM_LEN		(32 * SZ_1M)
 
-#define CONFIG_SPL_MAX_SIZE		(152 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
-#define CONFIG_SYS_UBOOT_BASE	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-
 #ifdef CONFIG_SPL_BUILD
-/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SPL_STACK		0x960000
-#define CONFIG_SPL_BSS_START_ADDR	0x0098FC00
-#define CONFIG_SPL_BSS_MAX_SIZE		0x400	/* 1 KB */
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
-
-
 #define CONFIG_POWER_PCA9450
-
 #endif
 
 #if defined(CONFIG_CMD_NET)
diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h
index 7dcc2e16c71..b498aa5be2b 100644
--- a/include/configs/imx8mp_rsb3720.h
+++ b/include/configs/imx8mp_rsb3720.h
@@ -7,17 +7,11 @@
 #ifndef __IMX8MP_RSB3720_H
 #define __IMX8MP_RSB3720_H
 
-#include <linux/sizes.h>
-#include <linux/stringify.h>
-#include <asm/arch/imx-regs.h>
+#include <configs/imx8m.h>
 #include <config_distro_bootcmd.h>
 
 #define CONFIG_SYS_BOOTM_LEN		(32 * SZ_1M)
 
-#define CONFIG_SPL_MAX_SIZE		(152 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
-#define CONFIG_SYS_UBOOT_BASE	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-
 /* GUIDs for capsule updatable firmware images */
 #define IMX8MP_RSB3720A1_4G_FIT_IMAGE_GUID \
 	EFI_GUID(0xb1251e89, 0x384a, 0x4635, 0xa8, 0x06, \
@@ -28,18 +22,10 @@
 		 0x5f, 0xd3, 0x6b, 0x9b, 0xe5, 0xb9)
 
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK		0x960000
-#define CONFIG_SPL_BSS_START_ADDR	0x0098FC00
-#define CONFIG_SPL_BSS_MAX_SIZE		0x400	/* 1 KB */
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
-
 #define CONFIG_MALLOC_F_ADDR		0x184000 /* malloc f used before \
 						  * GD_FLG_FULL_MALLOC_INIT \
 						  * set \
 						  */
-
-
 #if defined(CONFIG_NAND_BOOT)
 #define CONFIG_SPL_NAND_MXS
 #endif
diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h
index 17400cffc63..fb37f5d399c 100644
--- a/include/configs/imx8mp_venice.h
+++ b/include/configs/imx8mp_venice.h
@@ -6,23 +6,7 @@
 #ifndef __IMX8MP_VENICE_H
 #define __IMX8MP_VENICE_H
 
-#include <asm/arch/imx-regs.h>
-#include <linux/sizes.h>
-
-#define CONFIG_SPL_MAX_SIZE		(152 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_UBOOT_BASE	\
-	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK		0x960000
-#define CONFIG_SPL_BSS_START_ADDR	0x0098FC00
-#define CONFIG_SPL_BSS_MAX_SIZE		0x400	/* 1 KB */
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
-
-/* For RAW image gives a error info not panic */
-#endif
+#include <configs/imx8m.h>
 
 #define MEM_LAYOUT_ENV_SETTINGS \
 	"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h
index 95d70bb92d1..eaa91f66bfd 100644
--- a/include/configs/phycore_imx8mp.h
+++ b/include/configs/phycore_imx8mp.h
@@ -7,26 +7,12 @@
 #ifndef __PHYCORE_IMX8MP_H
 #define __PHYCORE_IMX8MP_H
 
-#include <linux/sizes.h>
-#include <asm/arch/imx-regs.h>
+#include <configs/imx8m.h>
 
 #define CONFIG_SYS_BOOTM_LEN		SZ_64M
 
-#define CONFIG_SPL_MAX_SIZE		(152 * SZ_1K)
-#define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_UBOOT_BASE \
-		(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK		0x960000
-#define CONFIG_SPL_BSS_START_ADDR	0x98FC00
-#define CONFIG_SPL_BSS_MAX_SIZE		SZ_1K
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K
-
-
 #define CONFIG_POWER_PCA9450
-
 #endif
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h
index 09eac5288ce..23bed27e176 100644
--- a/include/configs/verdin-imx8mp.h
+++ b/include/configs/verdin-imx8mp.h
@@ -6,25 +6,11 @@
 #ifndef __VERDIN_IMX8MP_H
 #define __VERDIN_IMX8MP_H
 
-#include <asm/arch/imx-regs.h>
-#include <linux/sizes.h>
-
-#define CONFIG_SPL_MAX_SIZE				(152 * 1024)
-#define CONFIG_SYS_MONITOR_LEN				SZ_512K
-#define CONFIG_SYS_UBOOT_BASE	\
-	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+#include <configs/imx8m.h>
 
 #ifdef CONFIG_SPL_BUILD
-/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SPL_STACK		0x960000
-#define CONFIG_SPL_BSS_START_ADDR	0x0098fc00
-#define CONFIG_SPL_BSS_MAX_SIZE		SZ_1K
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K
-
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR				0x184000
-/* For RAW image gives a error info not panic */
 
 #define CONFIG_POWER_PCA9450
 
-- 
2.36.0

[PATCH 13/22] configs: imx8m: use common imx8m.h for i.MX8MQ

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Some SPL definitions could be gerneralized, so use imx8m.h for iMX8MQ.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 include/configs/imx8m.h              | 10 ++++++++++
 include/configs/imx8mq_cm.h          | 24 +-----------------------
 include/configs/imx8mq_evk.h         | 19 +------------------
 include/configs/imx8mq_phanbell.h    | 19 ++-----------------
 include/configs/kontron_pitx_imx8m.h | 19 +------------------
 include/configs/pico-imx8mq.h        | 20 +-------------------
 6 files changed, 16 insertions(+), 95 deletions(-)

diff --git a/include/configs/imx8m.h b/include/configs/imx8m.h
index 7894a1c1068..e0a030cb67e 100644
--- a/include/configs/imx8m.h
+++ b/include/configs/imx8m.h
@@ -42,6 +42,16 @@
 #define CONFIG_SYS_SPL_MALLOC_START	0x42200000
 #define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K
 
+#elif defined(CONFIG_IMX8MQ)
+/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
+#define CONFIG_SPL_STACK		0x187FF0
+#define CONFIG_SPL_BSS_START_ADDR	0x00180000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x2000	/* 8 KB */
+#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000	/* 512 KB */
+#define CONFIG_SYS_SPL_PTE_RAM_BASE	0x41580000
+/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
+#define CONFIG_MALLOC_F_ADDR		0x182000
 #endif
 #endif
 #endif
diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h
index 7a9dd962ac2..f8518af83bd 100644
--- a/include/configs/imx8mq_cm.h
+++ b/include/configs/imx8mq_cm.h
@@ -6,32 +6,10 @@
 #ifndef __IMX8M_CM_H
 #define __IMX8M_CM_H
 
-#include <linux/sizes.h>
-#include <linux/stringify.h>
-#include <asm/arch/imx-regs.h>
+#include <configs/imx8m.h>
 
 #define CONFIG_SYS_BOOTM_LEN		(32 * SZ_1M)
 
-#define CONFIG_SPL_MAX_SIZE		(124 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
-
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK		0x187FF0
-#define CONFIG_SPL_BSS_START_ADDR      0x00180000
-#define CONFIG_SPL_BSS_MAX_SIZE        0x2000	/* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START    0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE    0x80000	/* 512 KB */
-#define CONFIG_SYS_SPL_PTE_RAM_BASE    0x41580000
-
-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-#define CONFIG_MALLOC_F_ADDR		0x182000
-/* For RAW image gives a error info not panic */
-
-#endif
-
-/* ENET Config */
-/* ENET1 */
-
 #ifndef CONFIG_SPL_BUILD
 #define BOOT_TARGET_DEVICES(func) \
 		func(MMC, mmc, 0) \
diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h
index b7294ebef1e..b0c77630f0f 100644
--- a/include/configs/imx8mq_evk.h
+++ b/include/configs/imx8mq_evk.h
@@ -6,28 +6,11 @@
 #ifndef __IMX8M_EVK_H
 #define __IMX8M_EVK_H
 
-#include <linux/sizes.h>
-#include <linux/stringify.h>
-#include <asm/arch/imx-regs.h>
+#include <configs/imx8m.h>
 
 #define CONFIG_SYS_BOOTM_LEN		(64 * SZ_1M)
 
-#define CONFIG_SPL_MAX_SIZE		(124 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
-
 #ifdef CONFIG_SPL_BUILD
-/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SPL_STACK		0x187FF0
-#define CONFIG_SPL_BSS_START_ADDR      0x00180000
-#define CONFIG_SPL_BSS_MAX_SIZE        0x2000	/* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START    0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE    0x80000	/* 512 KB */
-#define CONFIG_SYS_SPL_PTE_RAM_BASE    0x41580000
-
-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-#define CONFIG_MALLOC_F_ADDR		0x182000
-/* For RAW image gives a error info not panic */
-
 #define CONFIG_POWER_PFUZE100
 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
 #endif
diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h
index 93e531b66fd..f9c39aa82c7 100644
--- a/include/configs/imx8mq_phanbell.h
+++ b/include/configs/imx8mq_phanbell.h
@@ -6,25 +6,10 @@
 #ifndef __IMX8M_PHANBELL_H
 #define __IMX8M_PHANBELL_H
 
-#include <linux/sizes.h>
-#include <asm/arch/imx-regs.h>
+#include <configs/imx8m.h>
 
+#undef CONFIG_SPL_MAX_SIZE
 #define CONFIG_SPL_MAX_SIZE		(172 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
-
-#ifdef CONFIG_SPL_BUILD
-/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SPL_STACK		0x187FF0
-#define CONFIG_SPL_BSS_START_ADDR      0x00180000
-#define CONFIG_SPL_BSS_MAX_SIZE        0x2000	/* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START    0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE    0x80000	/* 512 KB */
-#define CONFIG_SYS_SPL_PTE_RAM_BASE    0x41580000
-
-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-#define CONFIG_MALLOC_F_ADDR		0x182000
-/* For RAW image gives a error info not panic */
-#endif
 
 /* ENET Config */
 /* ENET1 */
diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h
index 9089b76d26e..2abaf07f1a6 100644
--- a/include/configs/kontron_pitx_imx8m.h
+++ b/include/configs/kontron_pitx_imx8m.h
@@ -3,33 +3,16 @@
 #ifndef __KONTRON_PITX_IMX8M_H
 #define __KONTRON_PITX_IMX8M_H
 
-#include <linux/sizes.h>
-#include <linux/stringify.h>
-#include <asm/arch/imx-regs.h>
+#include <configs/imx8m.h>
 
 #define CONFIG_SYS_BOOTM_LEN		(32 * SZ_1M)
 
-#define CONFIG_SPL_MAX_SIZE		(124 * SZ_1K)
-#define CONFIG_SYS_MONITOR_LEN		(512 * SZ_1K)
-
 /* GUID for capsule updatable firmware image */
 #define KONTRON_PITX_IMX8M_FIT_IMAGE_GUID \
 	EFI_GUID(0xc898e959, 0x5b1f, 0x4e6d, 0x88, 0xe0, \
 		 0x40, 0xd4, 0x5c, 0xca, 0x13, 0x99)
 
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK		0x187FF0
-#define CONFIG_SPL_BSS_START_ADDR       0x00180000
-#define CONFIG_SPL_BSS_MAX_SIZE         SZ_8K
-#define CONFIG_SYS_SPL_MALLOC_START     0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K
-#define CONFIG_SYS_SPL_PTE_RAM_BASE     0x41580000
-
-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-#define CONFIG_MALLOC_F_ADDR		0x182000
-/* For RAW image gives a error info not panic */
-
-
 #define CONFIG_POWER_PFUZE100
 #define CONFIG_POWER_PFUZE100_I2C_ADDR  0x08
 #endif
diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h
index de035160255..6460183f5ef 100644
--- a/include/configs/pico-imx8mq.h
+++ b/include/configs/pico-imx8mq.h
@@ -6,25 +6,7 @@
 #ifndef __IMX8M_PICOPI_H
 #define __IMX8M_PICOPI_H
 
-#include <linux/sizes.h>
-#include <asm/arch/imx-regs.h>
-
-#define CONFIG_SPL_MAX_SIZE		(124 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
-
-#ifdef CONFIG_SPL_BUILD
-/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SPL_STACK		0x187FF0
-#define CONFIG_SPL_BSS_START_ADDR	0x00180000
-#define CONFIG_SPL_BSS_MAX_SIZE		0x2000	/* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000	/* 512 KB */
-#define CONFIG_SYS_SPL_PTE_RAM_BASE	0x41580000
-
-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-#define CONFIG_MALLOC_F_ADDR		0x182000
-/* For RAW image gives a error info not panic */
-#endif
+#include <configs/imx8m.h>
 
 /* ENET Config */
 /* ENET1 */
-- 
2.36.0

[PATCH 14/22] imx: imx8mm_beacon: enable pinctrl_wdog in SPL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi |  4 ++++
 board/beacon/imx8mm/spl.c                  | 19 -------------------
 2 files changed, 4 insertions(+), 19 deletions(-)

diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
index e33e10ac129..c94b4ffa4c3 100644
--- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
@@ -73,6 +73,10 @@
 	u-boot,dm-spl;
 };
 
+&pinctrl_wdog {
+	u-boot,dm-spl;
+};
+
 &uart2 {
 	u-boot,dm-spl;
 };
diff --git a/board/beacon/imx8mm/spl.c b/board/beacon/imx8mm/spl.c
index f92b4c3ed0a..a93cc938784 100644
--- a/board/beacon/imx8mm/spl.c
+++ b/board/beacon/imx8mm/spl.c
@@ -59,23 +59,6 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
-#define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
-
-static iomux_v3_cfg_t const wdog_pads[] = {
-	IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-
-int board_early_init_f(void)
-{
-	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
-
-	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
-
-	set_wdog_reset(wdog);
-
-	return 0;
-}
-
 static int power_init_board(void)
 {
 	struct udevice *dev;
@@ -116,8 +99,6 @@ void board_init_f(ulong dummy)
 
 	init_uart_clk(1);
 
-	board_early_init_f();
-
 	timer_init();
 
 	/* Clear the BSS. */
-- 
2.36.0

[PATCH 15/22] imx: imx8mm-cl-iot-gate: enable pinctrl_wdog in SPL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi |  4 ++++
 board/compulab/imx8mm-cl-iot-gate/spl.c     | 19 -------------------
 2 files changed, 4 insertions(+), 19 deletions(-)

diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi
index 433b02cceee..a7044b63699 100644
--- a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi
@@ -84,6 +84,10 @@
 	u-boot,dm-spl;
 };
 
+&pinctrl_wdog {
+	u-boot,dm-spl;
+};
+
 &uart3 {
 	u-boot,dm-spl;
 };
diff --git a/board/compulab/imx8mm-cl-iot-gate/spl.c b/board/compulab/imx8mm-cl-iot-gate/spl.c
index f183704c9d2..d2d20269ba0 100644
--- a/board/compulab/imx8mm-cl-iot-gate/spl.c
+++ b/board/compulab/imx8mm-cl-iot-gate/spl.c
@@ -83,23 +83,6 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
-#define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
-
-static iomux_v3_cfg_t const wdog_pads[] = {
-	IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-
-int board_early_init_f(void)
-{
-	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
-
-	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
-
-	set_wdog_reset(wdog);
-
-	return 0;
-}
-
 static int power_init_board(void)
 {
 	struct udevice *dev;
@@ -141,8 +124,6 @@ void board_init_f(ulong dummy)
 
 	arch_cpu_init();
 
-	board_early_init_f();
-
 	init_uart_clk(2);
 
 	timer_init();
-- 
2.36.0

[PATCH 16/22] imx: engicam-imx8mm: drop unused macro

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Drop unused WDOG macro

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
---
 board/engicam/imx8mm/spl.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/board/engicam/imx8mm/spl.c b/board/engicam/imx8mm/spl.c
index f75f2dc634c..1846134a492 100644
--- a/board/engicam/imx8mm/spl.c
+++ b/board/engicam/imx8mm/spl.c
@@ -54,8 +54,6 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
-#define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
-
 int board_early_init_f(void)
 {
        return 0;
-- 
2.36.0

[PATCH 17/22] imx: imx8mm/n/p-venice: enable pinctrl_wdog in SPL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/dts/imx8mm-venice-u-boot.dtsi |  4 ++++
 arch/arm/dts/imx8mn-venice-u-boot.dtsi |  4 ++++
 arch/arm/dts/imx8mp-venice-u-boot.dtsi |  4 ++++
 board/gateworks/venice/spl.c           | 29 --------------------------
 4 files changed, 12 insertions(+), 29 deletions(-)

diff --git a/arch/arm/dts/imx8mm-venice-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-u-boot.dtsi
index c61c6de935f..68978a0413e 100644
--- a/arch/arm/dts/imx8mm-venice-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-venice-u-boot.dtsi
@@ -72,3 +72,7 @@
 &wdog1 {
 	u-boot,dm-spl;
 };
+
+&pinctrl_wdog {
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx8mn-venice-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
index 4f23da35676..35819553879 100644
--- a/arch/arm/dts/imx8mn-venice-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
@@ -110,6 +110,10 @@
 	u-boot,dm-spl;
 };
 
+&pinctrl_wdog {
+	u-boot,dm-spl;
+};
+
 &binman {
 	u-boot-spl-ddr {
 		align = <4>;
diff --git a/arch/arm/dts/imx8mp-venice-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-u-boot.dtsi
index 37f3edc9817..96b9fa89cf4 100644
--- a/arch/arm/dts/imx8mp-venice-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-venice-u-boot.dtsi
@@ -72,3 +72,7 @@
 &wdog1 {
 	u-boot,dm-spl;
 };
+
+&pinctrl_wdog {
+	u-boot,dm-spl;
+};
diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c
index 6e6ce015f28..4c0feb4381c 100644
--- a/board/gateworks/venice/spl.c
+++ b/board/gateworks/venice/spl.c
@@ -87,33 +87,6 @@ static void spl_dram_init(int size)
 	ddr_init(dram_timing);
 }
 
-#define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
-
-#ifdef CONFIG_IMX8MM
-static iomux_v3_cfg_t const wdog_pads[] = {
-	IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-#elif CONFIG_IMX8MN
-static const iomux_v3_cfg_t wdog_pads[] = {
-	IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-#elif CONFIG_IMX8MP
-static const iomux_v3_cfg_t wdog_pads[] = {
-	MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-#endif
-
-int board_early_init_f(void)
-{
-	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
-
-	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
-
-	set_wdog_reset(wdog);
-
-	return 0;
-}
-
 /*
  * Model specific PMIC adjustments necessary prior to DRAM init
  *
@@ -253,8 +226,6 @@ void board_init_f(ulong dummy)
 
 	init_uart_clk(1);
 
-	board_early_init_f();
-
 	timer_init();
 
 	/* Clear the BSS. */
-- 
2.36.0

[PATCH 18/22] imx: imx8mn-beacon: enable pinctrl_wdog in SPL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi |  4 ++++
 board/beacon/imx8mn/spl.c                  | 10 ----------
 2 files changed, 4 insertions(+), 10 deletions(-)

diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
index 69fd69c8d02..eb1dd8debba 100644
--- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
@@ -132,6 +132,10 @@
 	u-boot,dm-spl;
 };
 
+&pinctrl_wdog {
+	u-boot,dm-spl;
+};
+
 &binman {
 	 u-boot-spl-ddr {
 		filename = "u-boot-spl-ddr.bin";
diff --git a/board/beacon/imx8mn/spl.c b/board/beacon/imx8mn/spl.c
index 4563446db19..029f71bc995 100644
--- a/board/beacon/imx8mn/spl.c
+++ b/board/beacon/imx8mn/spl.c
@@ -68,27 +68,17 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
-#define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 #define PWM1_PAD_CTRL (PAD_CTL_FSEL2 | PAD_CTL_DSE6)
 
 static iomux_v3_cfg_t const pwm_pads[] = {
 	IMX8MN_PAD_GPIO1_IO01__PWM1_OUT | MUX_PAD_CTRL(PWM1_PAD_CTRL),
 };
 
-static iomux_v3_cfg_t const wdog_pads[] = {
-	IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-
 int board_early_init_f(void)
 {
-	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
-
 	/* Claiming pwm pins prevents LCD flicker during startup*/
 	imx_iomux_v3_setup_multiple_pads(pwm_pads, ARRAY_SIZE(pwm_pads));
 
-	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
-	set_wdog_reset(wdog);
-
 	init_uart_clk(1);
 
 	return 0;
-- 
2.36.0

[PATCH 19/22] imx: imx8mn_var_som: clean up board watchdog code

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
---
 board/variscite/imx8mn_var_som/spl.c | 11 -----------
 1 file changed, 11 deletions(-)

diff --git a/board/variscite/imx8mn_var_som/spl.c b/board/variscite/imx8mn_var_som/spl.c
index 1a8b64fc0a9..41e70505774 100644
--- a/board/variscite/imx8mn_var_som/spl.c
+++ b/board/variscite/imx8mn_var_som/spl.c
@@ -40,19 +40,8 @@ void spl_board_init(void)
 		puts("Failed to find clock node. Check device tree\n");
 }
 
-#define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
-
-static const iomux_v3_cfg_t wdog_pads[] = {
-	IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-
 int board_early_init_f(void)
 {
-	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
-
-	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
-	set_wdog_reset(wdog);
-
 	init_uart_clk(3);
 
 	return 0;
-- 
2.36.0

[PATCH 20/22] imx: imx8mp_rsb7320a1: enable wdog driver model in SPL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Mark wdog1/pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi          |  8 ++++++++
 board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c | 12 ------------
 2 files changed, 8 insertions(+), 12 deletions(-)

diff --git a/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi b/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi
index 2848b24f655..4419967ee42 100644
--- a/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi
@@ -89,6 +89,14 @@
 	u-boot,dm-spl;
 };
 
+&wdog1 {
+	u-boot,dm-spl;
+};
+
+&pinctrl_wdog {
+	u-boot,dm-spl;
+};
+
 &pinctrl_i2c1 {
 	u-boot,dm-spl;
 };
diff --git a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
index f129ebd429b..0a1b2c94161 100644
--- a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
+++ b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
@@ -28,12 +28,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
-
-static const iomux_v3_cfg_t wdog_pads[] = {
-	MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-
 #ifdef CONFIG_NAND_MXS
 static void setup_gpmi_nand(void)
 {
@@ -69,12 +63,6 @@ u8 num_image_type_guids = ARRAY_SIZE(fw_images);
 
 int board_early_init_f(void)
 {
-	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
-
-	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
-
-	set_wdog_reset(wdog);
-
 	init_uart_clk(2);
 
 	return 0;
-- 
2.36.0

[PATCH 21/22] imx: imx8mn-kontron-n801x: enable pinctrl_wdog in SPL

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi |  4 ++++
 board/kontron/sl-mx8mm/spl.c                  | 18 ------------------
 2 files changed, 4 insertions(+), 18 deletions(-)

diff --git a/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi b/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi
index 22d18e6f1cf..6882513f161 100644
--- a/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi
@@ -126,3 +126,7 @@
 &wdog1 {
 	u-boot,dm-spl;
 };
+
+&pinctrl_wdog {
+	u-boot,dm-spl;
+};
diff --git a/board/kontron/sl-mx8mm/spl.c b/board/kontron/sl-mx8mm/spl.c
index a58a75dc958..63361f1d2ab 100644
--- a/board/kontron/sl-mx8mm/spl.c
+++ b/board/kontron/sl-mx8mm/spl.c
@@ -32,7 +32,6 @@ enum {
 
 #define GPIO_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 #define I2C_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE)
-#define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 
 #define TOUCH_RESET_GPIO	IMX_GPIO_NR(3, 23)
 
@@ -50,10 +49,6 @@ static iomux_v3_cfg_t const touch_gpio[] = {
 	IMX8MM_PAD_SAI5_RXD2_GPIO3_IO23 | MUX_PAD_CTRL(GPIO_PAD_CTRL)
 };
 
-static iomux_v3_cfg_t const wdog_pads[] = {
-	IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-
 int spl_board_boot_device(enum boot_device boot_dev_spl)
 {
 	switch (boot_dev_spl) {
@@ -216,17 +211,6 @@ void spl_board_init(void)
 		printf("Failed to find clock node. Check device tree\n");
 }
 
-int board_early_init_f(void)
-{
-	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
-
-	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
-
-	set_wdog_reset(wdog);
-
-	return 0;
-}
-
 static int power_init_board(void)
 {
 	struct udevice *dev;
@@ -261,8 +245,6 @@ void board_init_f(ulong dummy)
 
 	init_uart_clk(2);
 
-	board_early_init_f();
-
 	timer_init();
 
 	/* Clear the BSS. */
-- 
2.36.0

[PATCH 22/22] imx: phycore_imx8mm/p: clean up board watchdog code

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
---
 board/phytec/phycore_imx8mm/spl.c | 19 -------------------
 board/phytec/phycore_imx8mp/spl.c | 19 -------------------
 2 files changed, 38 deletions(-)

diff --git a/board/phytec/phycore_imx8mm/spl.c b/board/phytec/phycore_imx8mm/spl.c
index 7f24a3affc8..d87ab6d4497 100644
--- a/board/phytec/phycore_imx8mm/spl.c
+++ b/board/phytec/phycore_imx8mm/spl.c
@@ -57,23 +57,6 @@ int board_fit_config_name_match(const char *name)
 	return 0;
 }
 
-#define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE)
-
-static iomux_v3_cfg_t const wdog_pads[] = {
-	IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-
-int board_early_init_f(void)
-{
-	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
-
-	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
-
-	set_wdog_reset(wdog);
-
-	return 0;
-}
-
 void board_init_f(ulong dummy)
 {
 	int ret;
@@ -82,8 +65,6 @@ void board_init_f(ulong dummy)
 
 	init_uart_clk(2);
 
-	board_early_init_f();
-
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
 
diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c
index 38a581bef57..faed6fc3b76 100644
--- a/board/phytec/phycore_imx8mp/spl.c
+++ b/board/phytec/phycore_imx8mp/spl.c
@@ -89,23 +89,6 @@ int board_fit_config_name_match(const char *name)
 	return 0;
 }
 
-#define WDOG_PAD_CTRL   (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
-
-static iomux_v3_cfg_t const wdog_pads[] = {
-	MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-
-int board_early_init_f(void)
-{
-	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
-
-	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
-
-	set_wdog_reset(wdog);
-
-	return 0;
-}
-
 void board_init_f(ulong dummy)
 {
 	int ret;
@@ -114,8 +97,6 @@ void board_init_f(ulong dummy)
 
 	init_uart_clk(0);
 
-	board_early_init_f();
-
 	ret = spl_early_init();
 	if (ret) {
 		debug("spl_early_init() failed: %d\n", ret);
-- 
2.36.0