From: Sunil V L <sunilvl@ventanamicro.com> To: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Ard Biesheuvel <ardb@kernel.org>, Marc Zyngier <maz@kernel.org>, Atish Patra <atishp@rivosinc.com>, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>, Anup Patel <apatel@ventanamicro.com> Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-efi@vger.kernel.org, Sunil V L <sunil.vl@gmail.com>, Sunil V L <sunilvl@ventanamicro.com> Subject: [PATCH V2 1/5] riscv: cpu_ops_sbi: Support for 64bit hartid Date: Thu, 26 May 2022 15:41:27 +0530 [thread overview] Message-ID: <20220526101131.2340729-2-sunilvl@ventanamicro.com> (raw) In-Reply-To: <20220526101131.2340729-1-sunilvl@ventanamicro.com> The hartid can be a 64bit value on RV64 platforms. This patch modifies the hartid variable type to unsigned long so that it can hold 64bit value on RV64 platforms. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> --- arch/riscv/kernel/cpu_ops_sbi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kernel/cpu_ops_sbi.c b/arch/riscv/kernel/cpu_ops_sbi.c index 4f5a6f84e2a4..efa0f0816634 100644 --- a/arch/riscv/kernel/cpu_ops_sbi.c +++ b/arch/riscv/kernel/cpu_ops_sbi.c @@ -65,7 +65,7 @@ static int sbi_hsm_hart_get_status(unsigned long hartid) static int sbi_cpu_start(unsigned int cpuid, struct task_struct *tidle) { unsigned long boot_addr = __pa_symbol(secondary_start_sbi); - int hartid = cpuid_to_hartid_map(cpuid); + unsigned long hartid = cpuid_to_hartid_map(cpuid); unsigned long hsm_data; struct sbi_hart_boot_data *bdata = &per_cpu(boot_data, cpuid); @@ -107,7 +107,7 @@ static void sbi_cpu_stop(void) static int sbi_cpu_is_stopped(unsigned int cpuid) { int rc; - int hartid = cpuid_to_hartid_map(cpuid); + unsigned long hartid = cpuid_to_hartid_map(cpuid); rc = sbi_hsm_hart_get_status(hartid); -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Sunil V L <sunilvl@ventanamicro.com> To: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Ard Biesheuvel <ardb@kernel.org>, Marc Zyngier <maz@kernel.org>, Atish Patra <atishp@rivosinc.com>, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>, Anup Patel <apatel@ventanamicro.com> Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-efi@vger.kernel.org, Sunil V L <sunil.vl@gmail.com>, Sunil V L <sunilvl@ventanamicro.com> Subject: [PATCH V2 1/5] riscv: cpu_ops_sbi: Support for 64bit hartid Date: Thu, 26 May 2022 15:41:27 +0530 [thread overview] Message-ID: <20220526101131.2340729-2-sunilvl@ventanamicro.com> (raw) In-Reply-To: <20220526101131.2340729-1-sunilvl@ventanamicro.com> The hartid can be a 64bit value on RV64 platforms. This patch modifies the hartid variable type to unsigned long so that it can hold 64bit value on RV64 platforms. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> --- arch/riscv/kernel/cpu_ops_sbi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kernel/cpu_ops_sbi.c b/arch/riscv/kernel/cpu_ops_sbi.c index 4f5a6f84e2a4..efa0f0816634 100644 --- a/arch/riscv/kernel/cpu_ops_sbi.c +++ b/arch/riscv/kernel/cpu_ops_sbi.c @@ -65,7 +65,7 @@ static int sbi_hsm_hart_get_status(unsigned long hartid) static int sbi_cpu_start(unsigned int cpuid, struct task_struct *tidle) { unsigned long boot_addr = __pa_symbol(secondary_start_sbi); - int hartid = cpuid_to_hartid_map(cpuid); + unsigned long hartid = cpuid_to_hartid_map(cpuid); unsigned long hsm_data; struct sbi_hart_boot_data *bdata = &per_cpu(boot_data, cpuid); @@ -107,7 +107,7 @@ static void sbi_cpu_stop(void) static int sbi_cpu_is_stopped(unsigned int cpuid) { int rc; - int hartid = cpuid_to_hartid_map(cpuid); + unsigned long hartid = cpuid_to_hartid_map(cpuid); rc = sbi_hsm_hart_get_status(hartid); -- 2.25.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-05-26 10:11 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-26 10:11 [PATCH V2 0/5] Support for 64bit hartid on RV64 platforms Sunil V L 2022-05-26 10:11 ` Sunil V L 2022-05-26 10:11 ` Sunil V L [this message] 2022-05-26 10:11 ` [PATCH V2 1/5] riscv: cpu_ops_sbi: Support for 64bit hartid Sunil V L 2022-05-26 22:54 ` Atish Patra 2022-05-26 22:54 ` Atish Patra 2022-05-26 10:11 ` [PATCH V2 2/5] riscv: spinwait: Fix hartid variable type Sunil V L 2022-05-26 10:11 ` Sunil V L 2022-05-26 22:56 ` Atish Patra 2022-05-26 22:56 ` Atish Patra 2022-05-26 10:11 ` [PATCH V2 3/5] riscv: smp: Support for 64bit hartid Sunil V L 2022-05-26 10:11 ` Sunil V L 2022-05-26 22:57 ` Atish Patra 2022-05-26 22:57 ` Atish Patra 2022-05-26 10:11 ` [PATCH V2 4/5] riscv: cpu: " Sunil V L 2022-05-26 10:11 ` Sunil V L 2022-05-26 23:10 ` Atish Patra 2022-05-26 23:10 ` Atish Patra 2022-05-27 4:30 ` Sunil V L 2022-05-27 4:30 ` Sunil V L 2022-05-26 10:11 ` [PATCH V2 5/5] riscv/efi_stub: Support for 64bit boot-hartid Sunil V L 2022-05-26 10:11 ` Sunil V L
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