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From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: Paolo Bonzini <pbonzini@redhat.com>, <qemu-devel@nongnu.org>,
	"Michael S . Tsirkin" <mst@redhat.com>
Cc: <linux-cxl@vger.kernel.org>, <linuxarm@huawei.com>,
	<alex.bennee@linaro.org>, Marcel Apfelbaum <marcel@redhat.com>,
	Igor Mammedov <imammedo@redhat.com>,
	Markus Armbruster <armbru@redhat.com>,
	"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	Adam Manzanares <a.manzanares@samsung.com>,
	Tong Zhang <ztong0001@gmail.com>,
	Ben Widawsky <ben.widawsky@intel.com>,
	Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Subject: [PATCH 7/8] hw/cxl: Move the CXLState from MachineState to machine type specific state.
Date: Mon, 30 May 2022 14:45:13 +0100	[thread overview]
Message-ID: <20220530134514.31664-8-Jonathan.Cameron@huawei.com> (raw)
In-Reply-To: <20220530134514.31664-1-Jonathan.Cameron@huawei.com>

This removes the last of the CXL code from the MachineState where it
is visible to all Machines to only those that support CXL (currently i386/pc)
As i386/pc always support CXL now, stop allocating the state independently.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
 hw/core/machine.c    |  6 ------
 hw/i386/acpi-build.c |  6 +++---
 hw/i386/pc.c         | 32 +++++++++++++++-----------------
 include/hw/boards.h  |  1 -
 include/hw/i386/pc.h |  2 ++
 5 files changed, 20 insertions(+), 27 deletions(-)

diff --git a/hw/core/machine.c b/hw/core/machine.c
index 87787b5604..eb3f1b5302 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -33,7 +33,6 @@
 #include "sysemu/qtest.h"
 #include "hw/pci/pci.h"
 #include "hw/mem/nvdimm.h"
-#include "hw/cxl/cxl.h"
 #include "migration/global_state.h"
 #include "migration/vmstate.h"
 #include "exec/confidential-guest-support.h"
@@ -1074,10 +1073,6 @@ static void machine_initfn(Object *obj)
                                         "Valid values are cpu, mem-ctrl");
     }
 
-    if (mc->cxl_supported) {
-        ms->cxl_devices_state = g_new0(CXLState, 1);
-    }
-
     if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
         ms->numa_state = g_new0(NumaState, 1);
         object_property_add_bool(obj, "hmat",
@@ -1115,7 +1110,6 @@ static void machine_finalize(Object *obj)
     g_free(ms->device_memory);
     g_free(ms->nvdimms_state);
     g_free(ms->numa_state);
-    g_free(ms->cxl_devices_state);
 }
 
 bool machine_usb(MachineState *machine)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 2e3b1dd9a2..e8b7844841 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1633,7 +1633,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 
             /* Handle the ranges for the PXB expanders */
             if (pci_bus_is_cxl(bus)) {
-                MemoryRegion *mr = &machine->cxl_devices_state->host_mr;
+                MemoryRegion *mr = &pcms->cxl_devices_state.host_mr;
                 uint64_t base = mr->addr;
 
                 cxl_present = true;
@@ -2711,9 +2711,9 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine)
                           machine->nvdimms_state, machine->ram_slots,
                           x86ms->oem_id, x86ms->oem_table_id);
     }
-    if (machine->cxl_devices_state->is_enabled) {
+    if (pcms->cxl_devices_state.is_enabled) {
         cxl_build_cedt(table_offsets, tables_blob, tables->linker,
-                       x86ms->oem_id, x86ms->oem_table_id, machine->cxl_devices_state);
+                       x86ms->oem_id, x86ms->oem_table_id, &pcms->cxl_devices_state);
     }
 
     acpi_add_table(table_offsets, tables_blob);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 88b5454aaf..19420b043b 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -733,7 +733,6 @@ void pc_machine_done(Notifier *notifier, void *data)
     PCMachineState *pcms = container_of(notifier,
                                         PCMachineState, machine_done);
     X86MachineState *x86ms = X86_MACHINE(pcms);
-    MachineState *ms = MACHINE(pcms);
     PCIBus *bus = pcms->bus;
 
     /* Walk the pci busses looking for pxb busses to hook up */
@@ -743,16 +742,16 @@ void pc_machine_done(Notifier *notifier, void *data)
                 continue;
             }
             if (pci_bus_is_cxl(bus)) {
-                if (!ms->cxl_devices_state->is_enabled) {
+                if (!pcms->cxl_devices_state.is_enabled) {
                     error_report("CXL host bridges present, but cxl=off");
                     exit(EXIT_FAILURE);
                 }
-                pxb_cxl_hook_up_registers(ms->cxl_devices_state, bus, &error_fatal);
+                pxb_cxl_hook_up_registers(&pcms->cxl_devices_state, bus, &error_fatal);
             }
         }
     }
-    if (ms->cxl_devices_state) {
-        cxl_fmws_link_targets(ms->cxl_devices_state, &error_fatal);
+    if (pcms->cxl_devices_state.is_enabled) {
+        cxl_fmws_link_targets(&pcms->cxl_devices_state, &error_fatal);
     }
 
     /* set the number of CPUs */
@@ -922,8 +921,8 @@ void pc_memory_init(PCMachineState *pcms,
                                     &machine->device_memory->mr);
     }
 
-    if (machine->cxl_devices_state->is_enabled) {
-        MemoryRegion *mr = &machine->cxl_devices_state->host_mr;
+    if (pcms->cxl_devices_state.is_enabled) {
+        MemoryRegion *mr = &pcms->cxl_devices_state.host_mr;
         hwaddr cxl_size = MiB;
 
         if (pcmc->has_reserved_memory && machine->device_memory->base) {
@@ -941,12 +940,12 @@ void pc_memory_init(PCMachineState *pcms,
         memory_region_init(mr, OBJECT(machine), "cxl_host_reg", cxl_size);
         memory_region_add_subregion(system_memory, cxl_base, mr);
         cxl_resv_end = cxl_base + cxl_size;
-        if (machine->cxl_devices_state->fixed_windows) {
+        if (pcms->cxl_devices_state.fixed_windows) {
             hwaddr cxl_fmw_base;
             GList *it;
 
             cxl_fmw_base = ROUND_UP(cxl_base + cxl_size, 256 * MiB);
-            for (it = machine->cxl_devices_state->fixed_windows; it; it = it->next) {
+            for (it = pcms->cxl_devices_state.fixed_windows; it; it = it->next) {
                 CXLFixedWindow *fw = it->data;
 
                 fw->base = cxl_fmw_base;
@@ -988,7 +987,7 @@ void pc_memory_init(PCMachineState *pcms,
             res_mem_end += memory_region_size(&machine->device_memory->mr);
         }
 
-        if (machine->cxl_devices_state->is_enabled) {
+        if (pcms->cxl_devices_state.is_enabled) {
             res_mem_end = cxl_resv_end;
         }
         *val = cpu_to_le64(ROUND_UP(res_mem_end, 1 * GiB));
@@ -1024,12 +1023,12 @@ uint64_t pc_pci_hole64_start(void)
     X86MachineState *x86ms = X86_MACHINE(pcms);
     uint64_t hole64_start = 0;
 
-    if (ms->cxl_devices_state->host_mr.addr) {
-        hole64_start = ms->cxl_devices_state->host_mr.addr +
-            memory_region_size(&ms->cxl_devices_state->host_mr);
-        if (ms->cxl_devices_state->fixed_windows) {
+    if (pcms->cxl_devices_state.host_mr.addr) {
+        hole64_start = pcms->cxl_devices_state.host_mr.addr +
+            memory_region_size(&pcms->cxl_devices_state.host_mr);
+        if (pcms->cxl_devices_state.fixed_windows) {
             GList *it;
-            for (it = ms->cxl_devices_state->fixed_windows; it; it = it->next) {
+            for (it = pcms->cxl_devices_state.fixed_windows; it; it = it->next) {
                 CXLFixedWindow *fw = it->data;
                 hole64_start = fw->mr.addr + memory_region_size(&fw->mr);
             }
@@ -1705,7 +1704,6 @@ static void pc_machine_set_max_fw_size(Object *obj, Visitor *v,
 static void pc_machine_initfn(Object *obj)
 {
     PCMachineState *pcms = PC_MACHINE(obj);
-    MachineState *ms = MACHINE(obj);
 
 #ifdef CONFIG_VMPORT
     pcms->vmport = ON_OFF_AUTO_AUTO;
@@ -1730,7 +1728,7 @@ static void pc_machine_initfn(Object *obj)
     pcms->pcspk = isa_new(TYPE_PC_SPEAKER);
     object_property_add_alias(OBJECT(pcms), "pcspk-audiodev",
                               OBJECT(pcms->pcspk), "audiodev");
-    cxl_machine_init(obj, ms->cxl_devices_state);
+    cxl_machine_init(obj, &pcms->cxl_devices_state);
 }
 
 static void pc_machine_reset(MachineState *machine)
diff --git a/include/hw/boards.h b/include/hw/boards.h
index dd9fc56df2..031f5f884d 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -360,7 +360,6 @@ struct MachineState {
     CPUArchIdList *possible_cpus;
     CpuTopology smp;
     struct NVDIMMState *nvdimms_state;
-    struct CXLState *cxl_devices_state;
     struct NumaState *numa_state;
     CXLFixedMemoryWindowOptionsList *cfmws_list;
 };
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index ffcac5121e..21be7aff26 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -14,6 +14,7 @@
 #include "qom/object.h"
 #include "hw/i386/sgx-epc.h"
 #include "hw/firmware/smbios.h"
+#include "hw/cxl/cxl.h"
 
 #define HPET_INTCAP "hpet-intcap"
 
@@ -55,6 +56,7 @@ typedef struct PCMachineState {
     hwaddr memhp_io_base;
 
     SGXEPCState sgx_epc;
+    CXLState cxl_devices_state;
 } PCMachineState;
 
 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
-- 
2.32.0



WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: Paolo Bonzini <pbonzini@redhat.com>, <qemu-devel@nongnu.org>,
	"Michael S . Tsirkin" <mst@redhat.com>
Cc: <linux-cxl@vger.kernel.org>, <linuxarm@huawei.com>,
	<alex.bennee@linaro.org>, Marcel Apfelbaum <marcel@redhat.com>,
	Igor Mammedov <imammedo@redhat.com>,
	Markus Armbruster <armbru@redhat.com>,
	"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	Adam Manzanares <a.manzanares@samsung.com>,
	Tong Zhang <ztong0001@gmail.com>,
	Ben Widawsky <ben.widawsky@intel.com>,
	Shameerali Kolothum Thodi  <shameerali.kolothum.thodi@huawei.com>
Subject: [PATCH 7/8] hw/cxl: Move the CXLState from MachineState to machine type specific state.
Date: Mon, 30 May 2022 14:45:13 +0100	[thread overview]
Message-ID: <20220530134514.31664-8-Jonathan.Cameron@huawei.com> (raw)
In-Reply-To: <20220530134514.31664-1-Jonathan.Cameron@huawei.com>

This removes the last of the CXL code from the MachineState where it
is visible to all Machines to only those that support CXL (currently i386/pc)
As i386/pc always support CXL now, stop allocating the state independently.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
 hw/core/machine.c    |  6 ------
 hw/i386/acpi-build.c |  6 +++---
 hw/i386/pc.c         | 32 +++++++++++++++-----------------
 include/hw/boards.h  |  1 -
 include/hw/i386/pc.h |  2 ++
 5 files changed, 20 insertions(+), 27 deletions(-)

diff --git a/hw/core/machine.c b/hw/core/machine.c
index 87787b5604..eb3f1b5302 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -33,7 +33,6 @@
 #include "sysemu/qtest.h"
 #include "hw/pci/pci.h"
 #include "hw/mem/nvdimm.h"
-#include "hw/cxl/cxl.h"
 #include "migration/global_state.h"
 #include "migration/vmstate.h"
 #include "exec/confidential-guest-support.h"
@@ -1074,10 +1073,6 @@ static void machine_initfn(Object *obj)
                                         "Valid values are cpu, mem-ctrl");
     }
 
-    if (mc->cxl_supported) {
-        ms->cxl_devices_state = g_new0(CXLState, 1);
-    }
-
     if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
         ms->numa_state = g_new0(NumaState, 1);
         object_property_add_bool(obj, "hmat",
@@ -1115,7 +1110,6 @@ static void machine_finalize(Object *obj)
     g_free(ms->device_memory);
     g_free(ms->nvdimms_state);
     g_free(ms->numa_state);
-    g_free(ms->cxl_devices_state);
 }
 
 bool machine_usb(MachineState *machine)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 2e3b1dd9a2..e8b7844841 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1633,7 +1633,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 
             /* Handle the ranges for the PXB expanders */
             if (pci_bus_is_cxl(bus)) {
-                MemoryRegion *mr = &machine->cxl_devices_state->host_mr;
+                MemoryRegion *mr = &pcms->cxl_devices_state.host_mr;
                 uint64_t base = mr->addr;
 
                 cxl_present = true;
@@ -2711,9 +2711,9 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine)
                           machine->nvdimms_state, machine->ram_slots,
                           x86ms->oem_id, x86ms->oem_table_id);
     }
-    if (machine->cxl_devices_state->is_enabled) {
+    if (pcms->cxl_devices_state.is_enabled) {
         cxl_build_cedt(table_offsets, tables_blob, tables->linker,
-                       x86ms->oem_id, x86ms->oem_table_id, machine->cxl_devices_state);
+                       x86ms->oem_id, x86ms->oem_table_id, &pcms->cxl_devices_state);
     }
 
     acpi_add_table(table_offsets, tables_blob);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 88b5454aaf..19420b043b 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -733,7 +733,6 @@ void pc_machine_done(Notifier *notifier, void *data)
     PCMachineState *pcms = container_of(notifier,
                                         PCMachineState, machine_done);
     X86MachineState *x86ms = X86_MACHINE(pcms);
-    MachineState *ms = MACHINE(pcms);
     PCIBus *bus = pcms->bus;
 
     /* Walk the pci busses looking for pxb busses to hook up */
@@ -743,16 +742,16 @@ void pc_machine_done(Notifier *notifier, void *data)
                 continue;
             }
             if (pci_bus_is_cxl(bus)) {
-                if (!ms->cxl_devices_state->is_enabled) {
+                if (!pcms->cxl_devices_state.is_enabled) {
                     error_report("CXL host bridges present, but cxl=off");
                     exit(EXIT_FAILURE);
                 }
-                pxb_cxl_hook_up_registers(ms->cxl_devices_state, bus, &error_fatal);
+                pxb_cxl_hook_up_registers(&pcms->cxl_devices_state, bus, &error_fatal);
             }
         }
     }
-    if (ms->cxl_devices_state) {
-        cxl_fmws_link_targets(ms->cxl_devices_state, &error_fatal);
+    if (pcms->cxl_devices_state.is_enabled) {
+        cxl_fmws_link_targets(&pcms->cxl_devices_state, &error_fatal);
     }
 
     /* set the number of CPUs */
@@ -922,8 +921,8 @@ void pc_memory_init(PCMachineState *pcms,
                                     &machine->device_memory->mr);
     }
 
-    if (machine->cxl_devices_state->is_enabled) {
-        MemoryRegion *mr = &machine->cxl_devices_state->host_mr;
+    if (pcms->cxl_devices_state.is_enabled) {
+        MemoryRegion *mr = &pcms->cxl_devices_state.host_mr;
         hwaddr cxl_size = MiB;
 
         if (pcmc->has_reserved_memory && machine->device_memory->base) {
@@ -941,12 +940,12 @@ void pc_memory_init(PCMachineState *pcms,
         memory_region_init(mr, OBJECT(machine), "cxl_host_reg", cxl_size);
         memory_region_add_subregion(system_memory, cxl_base, mr);
         cxl_resv_end = cxl_base + cxl_size;
-        if (machine->cxl_devices_state->fixed_windows) {
+        if (pcms->cxl_devices_state.fixed_windows) {
             hwaddr cxl_fmw_base;
             GList *it;
 
             cxl_fmw_base = ROUND_UP(cxl_base + cxl_size, 256 * MiB);
-            for (it = machine->cxl_devices_state->fixed_windows; it; it = it->next) {
+            for (it = pcms->cxl_devices_state.fixed_windows; it; it = it->next) {
                 CXLFixedWindow *fw = it->data;
 
                 fw->base = cxl_fmw_base;
@@ -988,7 +987,7 @@ void pc_memory_init(PCMachineState *pcms,
             res_mem_end += memory_region_size(&machine->device_memory->mr);
         }
 
-        if (machine->cxl_devices_state->is_enabled) {
+        if (pcms->cxl_devices_state.is_enabled) {
             res_mem_end = cxl_resv_end;
         }
         *val = cpu_to_le64(ROUND_UP(res_mem_end, 1 * GiB));
@@ -1024,12 +1023,12 @@ uint64_t pc_pci_hole64_start(void)
     X86MachineState *x86ms = X86_MACHINE(pcms);
     uint64_t hole64_start = 0;
 
-    if (ms->cxl_devices_state->host_mr.addr) {
-        hole64_start = ms->cxl_devices_state->host_mr.addr +
-            memory_region_size(&ms->cxl_devices_state->host_mr);
-        if (ms->cxl_devices_state->fixed_windows) {
+    if (pcms->cxl_devices_state.host_mr.addr) {
+        hole64_start = pcms->cxl_devices_state.host_mr.addr +
+            memory_region_size(&pcms->cxl_devices_state.host_mr);
+        if (pcms->cxl_devices_state.fixed_windows) {
             GList *it;
-            for (it = ms->cxl_devices_state->fixed_windows; it; it = it->next) {
+            for (it = pcms->cxl_devices_state.fixed_windows; it; it = it->next) {
                 CXLFixedWindow *fw = it->data;
                 hole64_start = fw->mr.addr + memory_region_size(&fw->mr);
             }
@@ -1705,7 +1704,6 @@ static void pc_machine_set_max_fw_size(Object *obj, Visitor *v,
 static void pc_machine_initfn(Object *obj)
 {
     PCMachineState *pcms = PC_MACHINE(obj);
-    MachineState *ms = MACHINE(obj);
 
 #ifdef CONFIG_VMPORT
     pcms->vmport = ON_OFF_AUTO_AUTO;
@@ -1730,7 +1728,7 @@ static void pc_machine_initfn(Object *obj)
     pcms->pcspk = isa_new(TYPE_PC_SPEAKER);
     object_property_add_alias(OBJECT(pcms), "pcspk-audiodev",
                               OBJECT(pcms->pcspk), "audiodev");
-    cxl_machine_init(obj, ms->cxl_devices_state);
+    cxl_machine_init(obj, &pcms->cxl_devices_state);
 }
 
 static void pc_machine_reset(MachineState *machine)
diff --git a/include/hw/boards.h b/include/hw/boards.h
index dd9fc56df2..031f5f884d 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -360,7 +360,6 @@ struct MachineState {
     CPUArchIdList *possible_cpus;
     CpuTopology smp;
     struct NVDIMMState *nvdimms_state;
-    struct CXLState *cxl_devices_state;
     struct NumaState *numa_state;
     CXLFixedMemoryWindowOptionsList *cfmws_list;
 };
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index ffcac5121e..21be7aff26 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -14,6 +14,7 @@
 #include "qom/object.h"
 #include "hw/i386/sgx-epc.h"
 #include "hw/firmware/smbios.h"
+#include "hw/cxl/cxl.h"
 
 #define HPET_INTCAP "hpet-intcap"
 
@@ -55,6 +56,7 @@ typedef struct PCMachineState {
     hwaddr memhp_io_base;
 
     SGXEPCState sgx_epc;
+    CXLState cxl_devices_state;
 } PCMachineState;
 
 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
-- 
2.32.0


  parent reply	other threads:[~2022-05-30 13:58 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-30 13:45 [PATCH 0/8] hw/cxl: Move CXL emulation options and state to machines Jonathan Cameron via
2022-05-30 13:45 ` Jonathan Cameron
2022-05-30 13:45 ` [PATCH 1/8] hw/cxl: Make the CXL fixed memory window setup a machine parameter Jonathan Cameron via
2022-05-30 13:45   ` Jonathan Cameron
2022-05-31  7:26   ` Paolo Bonzini
2022-06-06 17:24     ` Ben Widawsky
2022-06-07 10:02       ` Jonathan Cameron
2022-06-07 10:02         ` Jonathan Cameron via
2022-05-30 13:45 ` [PATCH 2/8] hw/acpi/cxl: Pass in the CXLState directly rather than MachineState Jonathan Cameron via
2022-05-30 13:45   ` Jonathan Cameron
2022-05-30 13:45 ` [PATCH 3/8] hw/cxl: Push linking of CXL targets into i386/pc rather than in machine.c Jonathan Cameron via
2022-05-30 13:45   ` Jonathan Cameron
2022-05-30 13:45 ` [PATCH 4/8] tests/acpi: Allow modification of q35 CXL CEDT table Jonathan Cameron via
2022-05-30 13:45   ` Jonathan Cameron
2022-05-30 13:45 ` [PATCH 5/8] pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup Jonathan Cameron via
2022-05-30 13:45   ` Jonathan Cameron
2022-05-31  7:26   ` Paolo Bonzini
2022-05-30 13:45 ` [PATCH 6/8] tests/acpi: Update q35/CEDT.cxl for new memory addresses Jonathan Cameron via
2022-05-30 13:45   ` Jonathan Cameron
2022-05-30 13:45 ` Jonathan Cameron via [this message]
2022-05-30 13:45   ` [PATCH 7/8] hw/cxl: Move the CXLState from MachineState to machine type specific state Jonathan Cameron
2022-05-30 13:45 ` [PATCH 8/8] hw/machine: Drop cxl_supported flag as no longer useful Jonathan Cameron via
2022-05-30 13:45   ` Jonathan Cameron

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