[PATCH v2 0/6] support secondary ufs for Exynos Auto v9 SoC

[PATCH v2 0/6] support secondary ufs for Exynos Auto v9 SoC

[Chanho Park]

To support ufs #1 for Exynos Auto v9 SoC, we need to control its own pmu
register. So, we need to specify the offset of the register via an
argument of syscon node.
Regarding UFS HCI driver, we need to specify different sysreg
configuration for UFS #1's io coherency setting.

Changes from v1:
- dt-bindings: Correct tab align and add "minItems: 1" to make the second
  cell as optional.
- Add 0001- patch to constify phy_cfg.
- Allocate phy->isol and copy data from drvdata to avoid const qualifier
  error
- Add 0004- patch to apply dt style for ufs0 as Krzysztof's suggestion
- Align tab and apply ufs node naming for device tree nodes

Chanho Park (6):
  dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array
  phy: samsung: ufs: constify samsung_ufs_phy_cfg
  phy: samsung: ufs: support secondary ufs phy
  arm64: dts: exynosautov9: adjust DT style of ufs nodes
  arm64: dts: exynosautov9: add secondary ufs devices
  arm64: dts: exynosautov9-sadk: enable secondary ufs devices

 .../bindings/phy/samsung,ufs-phy.yaml         | 13 ++++--
 .../boot/dts/exynos/exynosautov9-sadk.dts     | 18 ++++++++
 arch/arm64/boot/dts/exynos/exynosautov9.dtsi  | 44 ++++++++++++++++---
 drivers/phy/samsung/phy-samsung-ufs.c         | 18 ++++++--
 drivers/phy/samsung/phy-samsung-ufs.h         |  4 +-
 5 files changed, 83 insertions(+), 14 deletions(-)

-- 
2.36.1

[PATCH v2 0/6] support secondary ufs for Exynos Auto v9 SoC

[Chanho Park]

To support ufs #1 for Exynos Auto v9 SoC, we need to control its own pmu
register. So, we need to specify the offset of the register via an
argument of syscon node.
Regarding UFS HCI driver, we need to specify different sysreg
configuration for UFS #1's io coherency setting.

Changes from v1:
- dt-bindings: Correct tab align and add "minItems: 1" to make the second
  cell as optional.
- Add 0001- patch to constify phy_cfg.
- Allocate phy->isol and copy data from drvdata to avoid const qualifier
  error
- Add 0004- patch to apply dt style for ufs0 as Krzysztof's suggestion
- Align tab and apply ufs node naming for device tree nodes

Chanho Park (6):
  dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array
  phy: samsung: ufs: constify samsung_ufs_phy_cfg
  phy: samsung: ufs: support secondary ufs phy
  arm64: dts: exynosautov9: adjust DT style of ufs nodes
  arm64: dts: exynosautov9: add secondary ufs devices
  arm64: dts: exynosautov9-sadk: enable secondary ufs devices

 .../bindings/phy/samsung,ufs-phy.yaml         | 13 ++++--
 .../boot/dts/exynos/exynosautov9-sadk.dts     | 18 ++++++++
 arch/arm64/boot/dts/exynos/exynosautov9.dtsi  | 44 ++++++++++++++++---
 drivers/phy/samsung/phy-samsung-ufs.c         | 18 ++++++--
 drivers/phy/samsung/phy-samsung-ufs.h         |  4 +-
 5 files changed, 83 insertions(+), 14 deletions(-)

-- 
2.36.1


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[PATCH v2 0/6] support secondary ufs for Exynos Auto v9 SoC

[Chanho Park]

To support ufs #1 for Exynos Auto v9 SoC, we need to control its own pmu
register. So, we need to specify the offset of the register via an
argument of syscon node.
Regarding UFS HCI driver, we need to specify different sysreg
configuration for UFS #1's io coherency setting.

Changes from v1:
- dt-bindings: Correct tab align and add "minItems: 1" to make the second
  cell as optional.
- Add 0001- patch to constify phy_cfg.
- Allocate phy->isol and copy data from drvdata to avoid const qualifier
  error
- Add 0004- patch to apply dt style for ufs0 as Krzysztof's suggestion
- Align tab and apply ufs node naming for device tree nodes

Chanho Park (6):
  dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array
  phy: samsung: ufs: constify samsung_ufs_phy_cfg
  phy: samsung: ufs: support secondary ufs phy
  arm64: dts: exynosautov9: adjust DT style of ufs nodes
  arm64: dts: exynosautov9: add secondary ufs devices
  arm64: dts: exynosautov9-sadk: enable secondary ufs devices

 .../bindings/phy/samsung,ufs-phy.yaml         | 13 ++++--
 .../boot/dts/exynos/exynosautov9-sadk.dts     | 18 ++++++++
 arch/arm64/boot/dts/exynos/exynosautov9.dtsi  | 44 ++++++++++++++++---
 drivers/phy/samsung/phy-samsung-ufs.c         | 18 ++++++--
 drivers/phy/samsung/phy-samsung-ufs.h         |  4 +-
 5 files changed, 83 insertions(+), 14 deletions(-)

-- 
2.36.1


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[PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Chanho Park]

To support secondary ufs phy devices, we need to get an offset value
from pmu-syscon.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 .../devicetree/bindings/phy/samsung,ufs-phy.yaml    | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
index f6ed1a005e7a..d0ba92aa578d 100644
--- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
@@ -40,9 +40,16 @@ properties:
       - const: tx0_symbol_clk
 
   samsung,pmu-syscon:
-    $ref: '/schemas/types.yaml#/definitions/phandle'
-    description: phandle for PMU system controller interface, used to
-                 control pmu registers bits for ufs m-phy
+    $ref: '/schemas/types.yaml#/definitions/phandle-array'
+    items:
+      minItems: 1
+      items:
+        - description: phandle for PMU system controller interface, used to
+                       control pmu registers bits for ufs m-phy
+        - description: offset of the pmu control register
+    description:
+      It can be phandle/offset pair. The second cell which can represent an
+      offset is optional.
 
 required:
   - "#phy-cells"
-- 
2.36.1

[PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Chanho Park]

To support secondary ufs phy devices, we need to get an offset value
from pmu-syscon.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 .../devicetree/bindings/phy/samsung,ufs-phy.yaml    | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
index f6ed1a005e7a..d0ba92aa578d 100644
--- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
@@ -40,9 +40,16 @@ properties:
       - const: tx0_symbol_clk
 
   samsung,pmu-syscon:
-    $ref: '/schemas/types.yaml#/definitions/phandle'
-    description: phandle for PMU system controller interface, used to
-                 control pmu registers bits for ufs m-phy
+    $ref: '/schemas/types.yaml#/definitions/phandle-array'
+    items:
+      minItems: 1
+      items:
+        - description: phandle for PMU system controller interface, used to
+                       control pmu registers bits for ufs m-phy
+        - description: offset of the pmu control register
+    description:
+      It can be phandle/offset pair. The second cell which can represent an
+      offset is optional.
 
 required:
   - "#phy-cells"
-- 
2.36.1


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[PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Chanho Park]

To support secondary ufs phy devices, we need to get an offset value
from pmu-syscon.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 .../devicetree/bindings/phy/samsung,ufs-phy.yaml    | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
index f6ed1a005e7a..d0ba92aa578d 100644
--- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
@@ -40,9 +40,16 @@ properties:
       - const: tx0_symbol_clk
 
   samsung,pmu-syscon:
-    $ref: '/schemas/types.yaml#/definitions/phandle'
-    description: phandle for PMU system controller interface, used to
-                 control pmu registers bits for ufs m-phy
+    $ref: '/schemas/types.yaml#/definitions/phandle-array'
+    items:
+      minItems: 1
+      items:
+        - description: phandle for PMU system controller interface, used to
+                       control pmu registers bits for ufs m-phy
+        - description: offset of the pmu control register
+    description:
+      It can be phandle/offset pair. The second cell which can represent an
+      offset is optional.
 
 required:
   - "#phy-cells"
-- 
2.36.1


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Re: [PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> To support secondary ufs phy devices, we need to get an offset value
> from pmu-syscon.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  .../devicetree/bindings/phy/samsung,ufs-phy.yaml    | 13 ++++++++++---
>  1 file changed, 10 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> index f6ed1a005e7a..d0ba92aa578d 100644
> --- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> @@ -40,9 +40,16 @@ properties:
>        - const: tx0_symbol_clk
>  
>    samsung,pmu-syscon:
> -    $ref: '/schemas/types.yaml#/definitions/phandle'
> -    description: phandle for PMU system controller interface, used to
> -                 control pmu registers bits for ufs m-phy
> +    $ref: '/schemas/types.yaml#/definitions/phandle-array'
> +    items:
> +      minItems: 1
> +      items:
> +        - description: phandle for PMU system controller interface, used to
> +                       control pmu registers bits for ufs m-phy
> +        - description: offset of the pmu control register

This does not work... Please test your bindings with different cases.

Best regards,
Krzysztof

Re: [PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> To support secondary ufs phy devices, we need to get an offset value
> from pmu-syscon.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  .../devicetree/bindings/phy/samsung,ufs-phy.yaml    | 13 ++++++++++---
>  1 file changed, 10 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> index f6ed1a005e7a..d0ba92aa578d 100644
> --- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> @@ -40,9 +40,16 @@ properties:
>        - const: tx0_symbol_clk
>  
>    samsung,pmu-syscon:
> -    $ref: '/schemas/types.yaml#/definitions/phandle'
> -    description: phandle for PMU system controller interface, used to
> -                 control pmu registers bits for ufs m-phy
> +    $ref: '/schemas/types.yaml#/definitions/phandle-array'
> +    items:
> +      minItems: 1
> +      items:
> +        - description: phandle for PMU system controller interface, used to
> +                       control pmu registers bits for ufs m-phy
> +        - description: offset of the pmu control register

This does not work... Please test your bindings with different cases.

Best regards,
Krzysztof

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Re: [PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> To support secondary ufs phy devices, we need to get an offset value
> from pmu-syscon.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  .../devicetree/bindings/phy/samsung,ufs-phy.yaml    | 13 ++++++++++---
>  1 file changed, 10 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> index f6ed1a005e7a..d0ba92aa578d 100644
> --- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> @@ -40,9 +40,16 @@ properties:
>        - const: tx0_symbol_clk
>  
>    samsung,pmu-syscon:
> -    $ref: '/schemas/types.yaml#/definitions/phandle'
> -    description: phandle for PMU system controller interface, used to
> -                 control pmu registers bits for ufs m-phy
> +    $ref: '/schemas/types.yaml#/definitions/phandle-array'
> +    items:
> +      minItems: 1
> +      items:
> +        - description: phandle for PMU system controller interface, used to
> +                       control pmu registers bits for ufs m-phy
> +        - description: offset of the pmu control register

This does not work... Please test your bindings with different cases.

Best regards,
Krzysztof

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Re: [PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Krzysztof Kozlowski]

On 02/06/2022 11:34, Krzysztof Kozlowski wrote:
> On 02/06/2022 07:32, Chanho Park wrote:
>> To support secondary ufs phy devices, we need to get an offset value
>> from pmu-syscon.
>>
>> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
>> ---
>>  .../devicetree/bindings/phy/samsung,ufs-phy.yaml    | 13 ++++++++++---
>>  1 file changed, 10 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
>> index f6ed1a005e7a..d0ba92aa578d 100644
>> --- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
>> +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
>> @@ -40,9 +40,16 @@ properties:
>>        - const: tx0_symbol_clk
>>  
>>    samsung,pmu-syscon:
>> -    $ref: '/schemas/types.yaml#/definitions/phandle'
>> -    description: phandle for PMU system controller interface, used to
>> -                 control pmu registers bits for ufs m-phy
>> +    $ref: '/schemas/types.yaml#/definitions/phandle-array'
>> +    items:
>> +      minItems: 1
>> +      items:
>> +        - description: phandle for PMU system controller interface, used to
>> +                       control pmu registers bits for ufs m-phy
>> +        - description: offset of the pmu control register
> 
> This does not work... Please test your bindings with different cases.

Just to be clear - when I mentioned that minItems should be on second
items level, I meant it should affect the second items list, not the
first. Now you can have 1, 2 or 10 phandles.


Best regards,
Krzysztof

Re: [PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Krzysztof Kozlowski]

On 02/06/2022 11:34, Krzysztof Kozlowski wrote:
> On 02/06/2022 07:32, Chanho Park wrote:
>> To support secondary ufs phy devices, we need to get an offset value
>> from pmu-syscon.
>>
>> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
>> ---
>>  .../devicetree/bindings/phy/samsung,ufs-phy.yaml    | 13 ++++++++++---
>>  1 file changed, 10 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
>> index f6ed1a005e7a..d0ba92aa578d 100644
>> --- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
>> +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
>> @@ -40,9 +40,16 @@ properties:
>>        - const: tx0_symbol_clk
>>  
>>    samsung,pmu-syscon:
>> -    $ref: '/schemas/types.yaml#/definitions/phandle'
>> -    description: phandle for PMU system controller interface, used to
>> -                 control pmu registers bits for ufs m-phy
>> +    $ref: '/schemas/types.yaml#/definitions/phandle-array'
>> +    items:
>> +      minItems: 1
>> +      items:
>> +        - description: phandle for PMU system controller interface, used to
>> +                       control pmu registers bits for ufs m-phy
>> +        - description: offset of the pmu control register
> 
> This does not work... Please test your bindings with different cases.

Just to be clear - when I mentioned that minItems should be on second
items level, I meant it should affect the second items list, not the
first. Now you can have 1, 2 or 10 phandles.


Best regards,
Krzysztof

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Re: [PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Krzysztof Kozlowski]

On 02/06/2022 11:34, Krzysztof Kozlowski wrote:
> On 02/06/2022 07:32, Chanho Park wrote:
>> To support secondary ufs phy devices, we need to get an offset value
>> from pmu-syscon.
>>
>> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
>> ---
>>  .../devicetree/bindings/phy/samsung,ufs-phy.yaml    | 13 ++++++++++---
>>  1 file changed, 10 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
>> index f6ed1a005e7a..d0ba92aa578d 100644
>> --- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
>> +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
>> @@ -40,9 +40,16 @@ properties:
>>        - const: tx0_symbol_clk
>>  
>>    samsung,pmu-syscon:
>> -    $ref: '/schemas/types.yaml#/definitions/phandle'
>> -    description: phandle for PMU system controller interface, used to
>> -                 control pmu registers bits for ufs m-phy
>> +    $ref: '/schemas/types.yaml#/definitions/phandle-array'
>> +    items:
>> +      minItems: 1
>> +      items:
>> +        - description: phandle for PMU system controller interface, used to
>> +                       control pmu registers bits for ufs m-phy
>> +        - description: offset of the pmu control register
> 
> This does not work... Please test your bindings with different cases.

Just to be clear - when I mentioned that minItems should be on second
items level, I meant it should affect the second items list, not the
first. Now you can have 1, 2 or 10 phandles.


Best regards,
Krzysztof

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RE: [PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Chanho Park]

> >>    samsung,pmu-syscon:
> >> -    $ref: '/schemas/types.yaml#/definitions/phandle'
> >> -    description: phandle for PMU system controller interface, used to
> >> -                 control pmu registers bits for ufs m-phy
> >> +    $ref: '/schemas/types.yaml#/definitions/phandle-array'
> >> +    items:
> >> +      minItems: 1
> >> +      items:
> >> +        - description: phandle for PMU system controller interface, used
> to
> >> +                       control pmu registers bits for ufs m-phy
> >> +        - description: offset of the pmu control register
> >
> > This does not work... Please test your bindings with different cases.
> 
> Just to be clear - when I mentioned that minItems should be on second
> items level, I meant it should affect the second items list, not the first.
> Now you can have 1, 2 or 10 phandles.

I put the minItems to the second level as you mentioned but I got below error from dt_binding_check.

--- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
@@ -42,8 +42,8 @@ properties:
   samsung,pmu-syscon:
     $ref: '/schemas/types.yaml#/definitions/phandle-array'
     items:
-      minItems: 1
       items:
+        - minItems: 1
         - description: phandle for PMU system controller interface, used to
                        control pmu registers bits for ufs m-phy
         - description: offset of the pmu control register

$ make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
ufs-phy@15571800: samsung,pmu-syscon:0: [4294967295, 1828] is too short

Best Regards,
Chanho Park

RE: [PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Chanho Park]

> >>    samsung,pmu-syscon:
> >> -    $ref: '/schemas/types.yaml#/definitions/phandle'
> >> -    description: phandle for PMU system controller interface, used to
> >> -                 control pmu registers bits for ufs m-phy
> >> +    $ref: '/schemas/types.yaml#/definitions/phandle-array'
> >> +    items:
> >> +      minItems: 1
> >> +      items:
> >> +        - description: phandle for PMU system controller interface, used
> to
> >> +                       control pmu registers bits for ufs m-phy
> >> +        - description: offset of the pmu control register
> >
> > This does not work... Please test your bindings with different cases.
> 
> Just to be clear - when I mentioned that minItems should be on second
> items level, I meant it should affect the second items list, not the first.
> Now you can have 1, 2 or 10 phandles.

I put the minItems to the second level as you mentioned but I got below error from dt_binding_check.

--- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
@@ -42,8 +42,8 @@ properties:
   samsung,pmu-syscon:
     $ref: '/schemas/types.yaml#/definitions/phandle-array'
     items:
-      minItems: 1
       items:
+        - minItems: 1
         - description: phandle for PMU system controller interface, used to
                        control pmu registers bits for ufs m-phy
         - description: offset of the pmu control register

$ make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
ufs-phy@15571800: samsung,pmu-syscon:0: [4294967295, 1828] is too short

Best Regards,
Chanho Park


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RE: [PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Chanho Park]

> >>    samsung,pmu-syscon:
> >> -    $ref: '/schemas/types.yaml#/definitions/phandle'
> >> -    description: phandle for PMU system controller interface, used to
> >> -                 control pmu registers bits for ufs m-phy
> >> +    $ref: '/schemas/types.yaml#/definitions/phandle-array'
> >> +    items:
> >> +      minItems: 1
> >> +      items:
> >> +        - description: phandle for PMU system controller interface, used
> to
> >> +                       control pmu registers bits for ufs m-phy
> >> +        - description: offset of the pmu control register
> >
> > This does not work... Please test your bindings with different cases.
> 
> Just to be clear - when I mentioned that minItems should be on second
> items level, I meant it should affect the second items list, not the first.
> Now you can have 1, 2 or 10 phandles.

I put the minItems to the second level as you mentioned but I got below error from dt_binding_check.

--- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
@@ -42,8 +42,8 @@ properties:
   samsung,pmu-syscon:
     $ref: '/schemas/types.yaml#/definitions/phandle-array'
     items:
-      minItems: 1
       items:
+        - minItems: 1
         - description: phandle for PMU system controller interface, used to
                        control pmu registers bits for ufs m-phy
         - description: offset of the pmu control register

$ make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
ufs-phy@15571800: samsung,pmu-syscon:0: [4294967295, 1828] is too short

Best Regards,
Chanho Park


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Re: [PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Krzysztof Kozlowski]

On 02/06/2022 12:10, Chanho Park wrote:
>>>>    samsung,pmu-syscon:
>>>> -    $ref: '/schemas/types.yaml#/definitions/phandle'
>>>> -    description: phandle for PMU system controller interface, used to
>>>> -                 control pmu registers bits for ufs m-phy
>>>> +    $ref: '/schemas/types.yaml#/definitions/phandle-array'
>>>> +    items:
>>>> +      minItems: 1
>>>> +      items:
>>>> +        - description: phandle for PMU system controller interface, used
>> to
>>>> +                       control pmu registers bits for ufs m-phy
>>>> +        - description: offset of the pmu control register
>>>
>>> This does not work... Please test your bindings with different cases.
>>
>> Just to be clear - when I mentioned that minItems should be on second
>> items level, I meant it should affect the second items list, not the first.
>> Now you can have 1, 2 or 10 phandles.
> 
> I put the minItems to the second level as you mentioned but I got below error from dt_binding_check.
> 
> --- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> @@ -42,8 +42,8 @@ properties:
>    samsung,pmu-syscon:
>      $ref: '/schemas/types.yaml#/definitions/phandle-array'
>      items:
> -      minItems: 1
>        items:
> +        - minItems: 1

Ah, you are right. This above is not good, but your original code was
almost good. I think it should be:

43     $ref: '/schemas/types.yaml#/definitions/phandle-array'

44     maxItems: 1

45     items:

46       minItems: 1

47       items:

48         - description: phandle for PMU sysused to

50         - description: offset of the pmu control register


Apologies for the confusion.

>          - description: phandle for PMU system controller interface, used to
>                         control pmu registers bits for ufs m-phy
>          - description: offset of the pmu control register
> 
> $ make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> ufs-phy@15571800: samsung,pmu-syscon:0: [4294967295, 1828] is too short


Best regards,
Krzysztof

Re: [PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Krzysztof Kozlowski]

On 02/06/2022 12:10, Chanho Park wrote:
>>>>    samsung,pmu-syscon:
>>>> -    $ref: '/schemas/types.yaml#/definitions/phandle'
>>>> -    description: phandle for PMU system controller interface, used to
>>>> -                 control pmu registers bits for ufs m-phy
>>>> +    $ref: '/schemas/types.yaml#/definitions/phandle-array'
>>>> +    items:
>>>> +      minItems: 1
>>>> +      items:
>>>> +        - description: phandle for PMU system controller interface, used
>> to
>>>> +                       control pmu registers bits for ufs m-phy
>>>> +        - description: offset of the pmu control register
>>>
>>> This does not work... Please test your bindings with different cases.
>>
>> Just to be clear - when I mentioned that minItems should be on second
>> items level, I meant it should affect the second items list, not the first.
>> Now you can have 1, 2 or 10 phandles.
> 
> I put the minItems to the second level as you mentioned but I got below error from dt_binding_check.
> 
> --- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> @@ -42,8 +42,8 @@ properties:
>    samsung,pmu-syscon:
>      $ref: '/schemas/types.yaml#/definitions/phandle-array'
>      items:
> -      minItems: 1
>        items:
> +        - minItems: 1

Ah, you are right. This above is not good, but your original code was
almost good. I think it should be:

43     $ref: '/schemas/types.yaml#/definitions/phandle-array'

44     maxItems: 1

45     items:

46       minItems: 1

47       items:

48         - description: phandle for PMU sysused to

50         - description: offset of the pmu control register


Apologies for the confusion.

>          - description: phandle for PMU system controller interface, used to
>                         control pmu registers bits for ufs m-phy
>          - description: offset of the pmu control register
> 
> $ make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> ufs-phy@15571800: samsung,pmu-syscon:0: [4294967295, 1828] is too short


Best regards,
Krzysztof

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Re: [PATCH v2 1/6] dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array

[Krzysztof Kozlowski]

On 02/06/2022 12:10, Chanho Park wrote:
>>>>    samsung,pmu-syscon:
>>>> -    $ref: '/schemas/types.yaml#/definitions/phandle'
>>>> -    description: phandle for PMU system controller interface, used to
>>>> -                 control pmu registers bits for ufs m-phy
>>>> +    $ref: '/schemas/types.yaml#/definitions/phandle-array'
>>>> +    items:
>>>> +      minItems: 1
>>>> +      items:
>>>> +        - description: phandle for PMU system controller interface, used
>> to
>>>> +                       control pmu registers bits for ufs m-phy
>>>> +        - description: offset of the pmu control register
>>>
>>> This does not work... Please test your bindings with different cases.
>>
>> Just to be clear - when I mentioned that minItems should be on second
>> items level, I meant it should affect the second items list, not the first.
>> Now you can have 1, 2 or 10 phandles.
> 
> I put the minItems to the second level as you mentioned but I got below error from dt_binding_check.
> 
> --- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> @@ -42,8 +42,8 @@ properties:
>    samsung,pmu-syscon:
>      $ref: '/schemas/types.yaml#/definitions/phandle-array'
>      items:
> -      minItems: 1
>        items:
> +        - minItems: 1

Ah, you are right. This above is not good, but your original code was
almost good. I think it should be:

43     $ref: '/schemas/types.yaml#/definitions/phandle-array'

44     maxItems: 1

45     items:

46       minItems: 1

47       items:

48         - description: phandle for PMU sysused to

50         - description: offset of the pmu control register


Apologies for the confusion.

>          - description: phandle for PMU system controller interface, used to
>                         control pmu registers bits for ufs m-phy
>          - description: offset of the pmu control register
> 
> $ make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
> ufs-phy@15571800: samsung,pmu-syscon:0: [4294967295, 1828] is too short


Best regards,
Krzysztof

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[PATCH v2 2/6] phy: samsung: ufs: constify samsung_ufs_phy_cfg

[Chanho Park]

Put const qualifier of samsung_ufs_phy_cfg pointer because they will
not be changed from drvdata.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/phy/samsung/phy-samsung-ufs.c | 4 ++--
 drivers/phy/samsung/phy-samsung-ufs.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/phy/samsung/phy-samsung-ufs.c b/drivers/phy/samsung/phy-samsung-ufs.c
index 602ddef259eb..b7ddb91a02be 100644
--- a/drivers/phy/samsung/phy-samsung-ufs.c
+++ b/drivers/phy/samsung/phy-samsung-ufs.c
@@ -75,7 +75,7 @@ static int samsung_ufs_phy_wait_for_lock_acq(struct phy *phy)
 static int samsung_ufs_phy_calibrate(struct phy *phy)
 {
 	struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy);
-	struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
+	const struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
 	const struct samsung_ufs_phy_cfg *cfg;
 	int err = 0;
 	int i;
@@ -327,7 +327,7 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
 	drvdata = match->data;
 	phy->dev = dev;
 	phy->drvdata = drvdata;
-	phy->cfg = (struct samsung_ufs_phy_cfg **)drvdata->cfg;
+	phy->cfg = drvdata->cfg;
 	phy->isol = &drvdata->isol;
 	phy->lane_cnt = PHY_DEF_LANE_CNT;
 
diff --git a/drivers/phy/samsung/phy-samsung-ufs.h b/drivers/phy/samsung/phy-samsung-ufs.h
index 91a0e9f94f98..8c3696b3c5ec 100644
--- a/drivers/phy/samsung/phy-samsung-ufs.h
+++ b/drivers/phy/samsung/phy-samsung-ufs.h
@@ -121,7 +121,7 @@ struct samsung_ufs_phy {
 	struct clk *rx0_symbol_clk;
 	struct clk *rx1_symbol_clk;
 	const struct samsung_ufs_phy_drvdata *drvdata;
-	struct samsung_ufs_phy_cfg **cfg;
+	const struct samsung_ufs_phy_cfg **cfg;
 	const struct pmu_isol *isol;
 	u8 lane_cnt;
 	int ufs_phy_state;
-- 
2.36.1

[PATCH v2 2/6] phy: samsung: ufs: constify samsung_ufs_phy_cfg

[Chanho Park]

Put const qualifier of samsung_ufs_phy_cfg pointer because they will
not be changed from drvdata.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/phy/samsung/phy-samsung-ufs.c | 4 ++--
 drivers/phy/samsung/phy-samsung-ufs.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/phy/samsung/phy-samsung-ufs.c b/drivers/phy/samsung/phy-samsung-ufs.c
index 602ddef259eb..b7ddb91a02be 100644
--- a/drivers/phy/samsung/phy-samsung-ufs.c
+++ b/drivers/phy/samsung/phy-samsung-ufs.c
@@ -75,7 +75,7 @@ static int samsung_ufs_phy_wait_for_lock_acq(struct phy *phy)
 static int samsung_ufs_phy_calibrate(struct phy *phy)
 {
 	struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy);
-	struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
+	const struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
 	const struct samsung_ufs_phy_cfg *cfg;
 	int err = 0;
 	int i;
@@ -327,7 +327,7 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
 	drvdata = match->data;
 	phy->dev = dev;
 	phy->drvdata = drvdata;
-	phy->cfg = (struct samsung_ufs_phy_cfg **)drvdata->cfg;
+	phy->cfg = drvdata->cfg;
 	phy->isol = &drvdata->isol;
 	phy->lane_cnt = PHY_DEF_LANE_CNT;
 
diff --git a/drivers/phy/samsung/phy-samsung-ufs.h b/drivers/phy/samsung/phy-samsung-ufs.h
index 91a0e9f94f98..8c3696b3c5ec 100644
--- a/drivers/phy/samsung/phy-samsung-ufs.h
+++ b/drivers/phy/samsung/phy-samsung-ufs.h
@@ -121,7 +121,7 @@ struct samsung_ufs_phy {
 	struct clk *rx0_symbol_clk;
 	struct clk *rx1_symbol_clk;
 	const struct samsung_ufs_phy_drvdata *drvdata;
-	struct samsung_ufs_phy_cfg **cfg;
+	const struct samsung_ufs_phy_cfg **cfg;
 	const struct pmu_isol *isol;
 	u8 lane_cnt;
 	int ufs_phy_state;
-- 
2.36.1


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[PATCH v2 2/6] phy: samsung: ufs: constify samsung_ufs_phy_cfg

[Chanho Park]

Put const qualifier of samsung_ufs_phy_cfg pointer because they will
not be changed from drvdata.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/phy/samsung/phy-samsung-ufs.c | 4 ++--
 drivers/phy/samsung/phy-samsung-ufs.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/phy/samsung/phy-samsung-ufs.c b/drivers/phy/samsung/phy-samsung-ufs.c
index 602ddef259eb..b7ddb91a02be 100644
--- a/drivers/phy/samsung/phy-samsung-ufs.c
+++ b/drivers/phy/samsung/phy-samsung-ufs.c
@@ -75,7 +75,7 @@ static int samsung_ufs_phy_wait_for_lock_acq(struct phy *phy)
 static int samsung_ufs_phy_calibrate(struct phy *phy)
 {
 	struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy);
-	struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
+	const struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
 	const struct samsung_ufs_phy_cfg *cfg;
 	int err = 0;
 	int i;
@@ -327,7 +327,7 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
 	drvdata = match->data;
 	phy->dev = dev;
 	phy->drvdata = drvdata;
-	phy->cfg = (struct samsung_ufs_phy_cfg **)drvdata->cfg;
+	phy->cfg = drvdata->cfg;
 	phy->isol = &drvdata->isol;
 	phy->lane_cnt = PHY_DEF_LANE_CNT;
 
diff --git a/drivers/phy/samsung/phy-samsung-ufs.h b/drivers/phy/samsung/phy-samsung-ufs.h
index 91a0e9f94f98..8c3696b3c5ec 100644
--- a/drivers/phy/samsung/phy-samsung-ufs.h
+++ b/drivers/phy/samsung/phy-samsung-ufs.h
@@ -121,7 +121,7 @@ struct samsung_ufs_phy {
 	struct clk *rx0_symbol_clk;
 	struct clk *rx1_symbol_clk;
 	const struct samsung_ufs_phy_drvdata *drvdata;
-	struct samsung_ufs_phy_cfg **cfg;
+	const struct samsung_ufs_phy_cfg **cfg;
 	const struct pmu_isol *isol;
 	u8 lane_cnt;
 	int ufs_phy_state;
-- 
2.36.1


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Re: [PATCH v2 2/6] phy: samsung: ufs: constify samsung_ufs_phy_cfg

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> Put const qualifier of samsung_ufs_phy_cfg pointer because they will
> not be changed from drvdata.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  drivers/phy/samsung/phy-samsung-ufs.c | 4 ++--
>  drivers/phy/samsung/phy-samsung-ufs.h | 2 +-
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/phy/samsung/phy-samsung-ufs.c b/drivers/phy/samsung/phy-samsung-ufs.c
> index 602ddef259eb..b7ddb91a02be 100644
> --- a/drivers/phy/samsung/phy-samsung-ufs.c
> +++ b/drivers/phy/samsung/phy-samsung-ufs.c
> @@ -75,7 +75,7 @@ static int samsung_ufs_phy_wait_for_lock_acq(struct phy *phy)
>  static int samsung_ufs_phy_calibrate(struct phy *phy)
>  {
>  	struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy);
> -	struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
> +	const struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;

This should be rather array of const pointers to const data.


Best regards,
Krzysztof

Re: [PATCH v2 2/6] phy: samsung: ufs: constify samsung_ufs_phy_cfg

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> Put const qualifier of samsung_ufs_phy_cfg pointer because they will
> not be changed from drvdata.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  drivers/phy/samsung/phy-samsung-ufs.c | 4 ++--
>  drivers/phy/samsung/phy-samsung-ufs.h | 2 +-
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/phy/samsung/phy-samsung-ufs.c b/drivers/phy/samsung/phy-samsung-ufs.c
> index 602ddef259eb..b7ddb91a02be 100644
> --- a/drivers/phy/samsung/phy-samsung-ufs.c
> +++ b/drivers/phy/samsung/phy-samsung-ufs.c
> @@ -75,7 +75,7 @@ static int samsung_ufs_phy_wait_for_lock_acq(struct phy *phy)
>  static int samsung_ufs_phy_calibrate(struct phy *phy)
>  {
>  	struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy);
> -	struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
> +	const struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;

This should be rather array of const pointers to const data.


Best regards,
Krzysztof

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Re: [PATCH v2 2/6] phy: samsung: ufs: constify samsung_ufs_phy_cfg

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> Put const qualifier of samsung_ufs_phy_cfg pointer because they will
> not be changed from drvdata.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  drivers/phy/samsung/phy-samsung-ufs.c | 4 ++--
>  drivers/phy/samsung/phy-samsung-ufs.h | 2 +-
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/phy/samsung/phy-samsung-ufs.c b/drivers/phy/samsung/phy-samsung-ufs.c
> index 602ddef259eb..b7ddb91a02be 100644
> --- a/drivers/phy/samsung/phy-samsung-ufs.c
> +++ b/drivers/phy/samsung/phy-samsung-ufs.c
> @@ -75,7 +75,7 @@ static int samsung_ufs_phy_wait_for_lock_acq(struct phy *phy)
>  static int samsung_ufs_phy_calibrate(struct phy *phy)
>  {
>  	struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy);
> -	struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
> +	const struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;

This should be rather array of const pointers to const data.


Best regards,
Krzysztof

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RE: [PATCH v2 2/6] phy: samsung: ufs: constify samsung_ufs_phy_cfg

[Chanho Park]

> > @@ -75,7 +75,7 @@ static int samsung_ufs_phy_wait_for_lock_acq(struct
> > phy *phy)  static int samsung_ufs_phy_calibrate(struct phy *phy)  {
> >  	struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy);
> > -	struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
> > +	const struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
> 
> This should be rather array of const pointers to const data.

The prototype of ufs_phy->cfg is 'const struct samsung_ufs_phy_cfg **' by this patch.
So, it should be,

const struct samsung_ufs_phy_cfg ** const cfgs = ufs_phy->cfg;

Best Regards,
Chanho Park

RE: [PATCH v2 2/6] phy: samsung: ufs: constify samsung_ufs_phy_cfg

[Chanho Park]

> > @@ -75,7 +75,7 @@ static int samsung_ufs_phy_wait_for_lock_acq(struct
> > phy *phy)  static int samsung_ufs_phy_calibrate(struct phy *phy)  {
> >  	struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy);
> > -	struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
> > +	const struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
> 
> This should be rather array of const pointers to const data.

The prototype of ufs_phy->cfg is 'const struct samsung_ufs_phy_cfg **' by this patch.
So, it should be,

const struct samsung_ufs_phy_cfg ** const cfgs = ufs_phy->cfg;

Best Regards,
Chanho Park


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RE: [PATCH v2 2/6] phy: samsung: ufs: constify samsung_ufs_phy_cfg

[Chanho Park]

> > @@ -75,7 +75,7 @@ static int samsung_ufs_phy_wait_for_lock_acq(struct
> > phy *phy)  static int samsung_ufs_phy_calibrate(struct phy *phy)  {
> >  	struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy);
> > -	struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
> > +	const struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
> 
> This should be rather array of const pointers to const data.

The prototype of ufs_phy->cfg is 'const struct samsung_ufs_phy_cfg **' by this patch.
So, it should be,

const struct samsung_ufs_phy_cfg ** const cfgs = ufs_phy->cfg;

Best Regards,
Chanho Park


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Re: [PATCH v2 2/6] phy: samsung: ufs: constify samsung_ufs_phy_cfg

[Krzysztof Kozlowski]

On 02/06/2022 15:04, Chanho Park wrote:
>>> @@ -75,7 +75,7 @@ static int samsung_ufs_phy_wait_for_lock_acq(struct
>>> phy *phy)  static int samsung_ufs_phy_calibrate(struct phy *phy)  {
>>>  	struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy);
>>> -	struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
>>> +	const struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
>>
>> This should be rather array of const pointers to const data.
> 
> The prototype of ufs_phy->cfg is 'const struct samsung_ufs_phy_cfg **' by this patch.
> So, it should be,
> 
> const struct samsung_ufs_phy_cfg ** const cfgs = ufs_phy->cfg;

Not entirely, that would be const pointer (array) of pointers to const
data. What you want is:
	const struct samsung_ufs_phy_cfg * const * cfgs = ufs_phy->cfg;



Best regards,
Krzysztof

Re: [PATCH v2 2/6] phy: samsung: ufs: constify samsung_ufs_phy_cfg

[Krzysztof Kozlowski]

On 02/06/2022 15:04, Chanho Park wrote:
>>> @@ -75,7 +75,7 @@ static int samsung_ufs_phy_wait_for_lock_acq(struct
>>> phy *phy)  static int samsung_ufs_phy_calibrate(struct phy *phy)  {
>>>  	struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy);
>>> -	struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
>>> +	const struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
>>
>> This should be rather array of const pointers to const data.
> 
> The prototype of ufs_phy->cfg is 'const struct samsung_ufs_phy_cfg **' by this patch.
> So, it should be,
> 
> const struct samsung_ufs_phy_cfg ** const cfgs = ufs_phy->cfg;

Not entirely, that would be const pointer (array) of pointers to const
data. What you want is:
	const struct samsung_ufs_phy_cfg * const * cfgs = ufs_phy->cfg;



Best regards,
Krzysztof

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Re: [PATCH v2 2/6] phy: samsung: ufs: constify samsung_ufs_phy_cfg

[Krzysztof Kozlowski]

On 02/06/2022 15:04, Chanho Park wrote:
>>> @@ -75,7 +75,7 @@ static int samsung_ufs_phy_wait_for_lock_acq(struct
>>> phy *phy)  static int samsung_ufs_phy_calibrate(struct phy *phy)  {
>>>  	struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy);
>>> -	struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
>>> +	const struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg;
>>
>> This should be rather array of const pointers to const data.
> 
> The prototype of ufs_phy->cfg is 'const struct samsung_ufs_phy_cfg **' by this patch.
> So, it should be,
> 
> const struct samsung_ufs_phy_cfg ** const cfgs = ufs_phy->cfg;

Not entirely, that would be const pointer (array) of pointers to const
data. What you want is:
	const struct samsung_ufs_phy_cfg * const * cfgs = ufs_phy->cfg;



Best regards,
Krzysztof

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[PATCH v2 3/6] phy: samsung: ufs: support secondary ufs phy

[Chanho Park]

To support secondary ufs phy device, we need to get an offset for phy
isolation from the syscon DT node. If the first index argument of the
node is existing, we can read the offset value and set it as isol->offset.
To allow this assignment, we need to change the field so the isol data
needs to be allocated and copied from drvdata.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/phy/samsung/phy-samsung-ufs.c | 14 +++++++++++++-
 drivers/phy/samsung/phy-samsung-ufs.h |  2 +-
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/samsung/phy-samsung-ufs.c b/drivers/phy/samsung/phy-samsung-ufs.c
index b7ddb91a02be..7716b6dc955b 100644
--- a/drivers/phy/samsung/phy-samsung-ufs.c
+++ b/drivers/phy/samsung/phy-samsung-ufs.c
@@ -288,6 +288,7 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
 	struct phy *gen_phy;
 	struct phy_provider *phy_provider;
 	const struct samsung_ufs_phy_drvdata *drvdata;
+	u32 isol_offset;
 	int err = 0;
 
 	match = of_match_node(samsung_ufs_phy_match, dev->of_node);
@@ -324,11 +325,22 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
 		goto out;
 	}
 
+	phy->isol = devm_kzalloc(dev, sizeof(struct pmu_isol), GFP_KERNEL);
+	if (!phy->isol) {
+		err = -ENOMEM;
+		goto out;
+	}
+
 	drvdata = match->data;
 	phy->dev = dev;
 	phy->drvdata = drvdata;
 	phy->cfg = drvdata->cfg;
-	phy->isol = &drvdata->isol;
+	memcpy(phy->isol, &drvdata->isol, sizeof(struct pmu_isol));
+
+	if (!of_property_read_u32_index(dev->of_node, "samsung,pmu-syscon", 1,
+					&isol_offset))
+		phy->isol->offset = isol_offset;
+
 	phy->lane_cnt = PHY_DEF_LANE_CNT;
 
 	phy_set_drvdata(gen_phy, phy);
diff --git a/drivers/phy/samsung/phy-samsung-ufs.h b/drivers/phy/samsung/phy-samsung-ufs.h
index 8c3696b3c5ec..d3e1c2016b27 100644
--- a/drivers/phy/samsung/phy-samsung-ufs.h
+++ b/drivers/phy/samsung/phy-samsung-ufs.h
@@ -122,7 +122,7 @@ struct samsung_ufs_phy {
 	struct clk *rx1_symbol_clk;
 	const struct samsung_ufs_phy_drvdata *drvdata;
 	const struct samsung_ufs_phy_cfg **cfg;
-	const struct pmu_isol *isol;
+	struct pmu_isol *isol;
 	u8 lane_cnt;
 	int ufs_phy_state;
 	enum phy_mode mode;
-- 
2.36.1

[PATCH v2 3/6] phy: samsung: ufs: support secondary ufs phy

[Chanho Park]

To support secondary ufs phy device, we need to get an offset for phy
isolation from the syscon DT node. If the first index argument of the
node is existing, we can read the offset value and set it as isol->offset.
To allow this assignment, we need to change the field so the isol data
needs to be allocated and copied from drvdata.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/phy/samsung/phy-samsung-ufs.c | 14 +++++++++++++-
 drivers/phy/samsung/phy-samsung-ufs.h |  2 +-
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/samsung/phy-samsung-ufs.c b/drivers/phy/samsung/phy-samsung-ufs.c
index b7ddb91a02be..7716b6dc955b 100644
--- a/drivers/phy/samsung/phy-samsung-ufs.c
+++ b/drivers/phy/samsung/phy-samsung-ufs.c
@@ -288,6 +288,7 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
 	struct phy *gen_phy;
 	struct phy_provider *phy_provider;
 	const struct samsung_ufs_phy_drvdata *drvdata;
+	u32 isol_offset;
 	int err = 0;
 
 	match = of_match_node(samsung_ufs_phy_match, dev->of_node);
@@ -324,11 +325,22 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
 		goto out;
 	}
 
+	phy->isol = devm_kzalloc(dev, sizeof(struct pmu_isol), GFP_KERNEL);
+	if (!phy->isol) {
+		err = -ENOMEM;
+		goto out;
+	}
+
 	drvdata = match->data;
 	phy->dev = dev;
 	phy->drvdata = drvdata;
 	phy->cfg = drvdata->cfg;
-	phy->isol = &drvdata->isol;
+	memcpy(phy->isol, &drvdata->isol, sizeof(struct pmu_isol));
+
+	if (!of_property_read_u32_index(dev->of_node, "samsung,pmu-syscon", 1,
+					&isol_offset))
+		phy->isol->offset = isol_offset;
+
 	phy->lane_cnt = PHY_DEF_LANE_CNT;
 
 	phy_set_drvdata(gen_phy, phy);
diff --git a/drivers/phy/samsung/phy-samsung-ufs.h b/drivers/phy/samsung/phy-samsung-ufs.h
index 8c3696b3c5ec..d3e1c2016b27 100644
--- a/drivers/phy/samsung/phy-samsung-ufs.h
+++ b/drivers/phy/samsung/phy-samsung-ufs.h
@@ -122,7 +122,7 @@ struct samsung_ufs_phy {
 	struct clk *rx1_symbol_clk;
 	const struct samsung_ufs_phy_drvdata *drvdata;
 	const struct samsung_ufs_phy_cfg **cfg;
-	const struct pmu_isol *isol;
+	struct pmu_isol *isol;
 	u8 lane_cnt;
 	int ufs_phy_state;
 	enum phy_mode mode;
-- 
2.36.1


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[PATCH v2 3/6] phy: samsung: ufs: support secondary ufs phy

[Chanho Park]

To support secondary ufs phy device, we need to get an offset for phy
isolation from the syscon DT node. If the first index argument of the
node is existing, we can read the offset value and set it as isol->offset.
To allow this assignment, we need to change the field so the isol data
needs to be allocated and copied from drvdata.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/phy/samsung/phy-samsung-ufs.c | 14 +++++++++++++-
 drivers/phy/samsung/phy-samsung-ufs.h |  2 +-
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/samsung/phy-samsung-ufs.c b/drivers/phy/samsung/phy-samsung-ufs.c
index b7ddb91a02be..7716b6dc955b 100644
--- a/drivers/phy/samsung/phy-samsung-ufs.c
+++ b/drivers/phy/samsung/phy-samsung-ufs.c
@@ -288,6 +288,7 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
 	struct phy *gen_phy;
 	struct phy_provider *phy_provider;
 	const struct samsung_ufs_phy_drvdata *drvdata;
+	u32 isol_offset;
 	int err = 0;
 
 	match = of_match_node(samsung_ufs_phy_match, dev->of_node);
@@ -324,11 +325,22 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
 		goto out;
 	}
 
+	phy->isol = devm_kzalloc(dev, sizeof(struct pmu_isol), GFP_KERNEL);
+	if (!phy->isol) {
+		err = -ENOMEM;
+		goto out;
+	}
+
 	drvdata = match->data;
 	phy->dev = dev;
 	phy->drvdata = drvdata;
 	phy->cfg = drvdata->cfg;
-	phy->isol = &drvdata->isol;
+	memcpy(phy->isol, &drvdata->isol, sizeof(struct pmu_isol));
+
+	if (!of_property_read_u32_index(dev->of_node, "samsung,pmu-syscon", 1,
+					&isol_offset))
+		phy->isol->offset = isol_offset;
+
 	phy->lane_cnt = PHY_DEF_LANE_CNT;
 
 	phy_set_drvdata(gen_phy, phy);
diff --git a/drivers/phy/samsung/phy-samsung-ufs.h b/drivers/phy/samsung/phy-samsung-ufs.h
index 8c3696b3c5ec..d3e1c2016b27 100644
--- a/drivers/phy/samsung/phy-samsung-ufs.h
+++ b/drivers/phy/samsung/phy-samsung-ufs.h
@@ -122,7 +122,7 @@ struct samsung_ufs_phy {
 	struct clk *rx1_symbol_clk;
 	const struct samsung_ufs_phy_drvdata *drvdata;
 	const struct samsung_ufs_phy_cfg **cfg;
-	const struct pmu_isol *isol;
+	struct pmu_isol *isol;
 	u8 lane_cnt;
 	int ufs_phy_state;
 	enum phy_mode mode;
-- 
2.36.1


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Re: [PATCH v2 3/6] phy: samsung: ufs: support secondary ufs phy

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> To support secondary ufs phy device, we need to get an offset for phy
> isolation from the syscon DT node. If the first index argument of the
> node is existing, we can read the offset value and set it as isol->offset.
> To allow this assignment, we need to change the field so the isol data
> needs to be allocated and copied from drvdata.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  drivers/phy/samsung/phy-samsung-ufs.c | 14 +++++++++++++-
>  drivers/phy/samsung/phy-samsung-ufs.h |  2 +-
>  2 files changed, 14 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/phy/samsung/phy-samsung-ufs.c b/drivers/phy/samsung/phy-samsung-ufs.c
> index b7ddb91a02be..7716b6dc955b 100644
> --- a/drivers/phy/samsung/phy-samsung-ufs.c
> +++ b/drivers/phy/samsung/phy-samsung-ufs.c
> @@ -288,6 +288,7 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
>  	struct phy *gen_phy;
>  	struct phy_provider *phy_provider;
>  	const struct samsung_ufs_phy_drvdata *drvdata;
> +	u32 isol_offset;
>  	int err = 0;
>  
>  	match = of_match_node(samsung_ufs_phy_match, dev->of_node);
> @@ -324,11 +325,22 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
>  		goto out;
>  	}
>  
> +	phy->isol = devm_kzalloc(dev, sizeof(struct pmu_isol), GFP_KERNEL);

1. Looks like devm_kmemdup
2. sizeof(*variable), not sizeof(struct)

3. and actually you can simplify all that by storing struct pmu_isol
directly in struct samsung_ufs_phy, not as pointer.

After all that storing drvdata in samsung_ufs_phy does not make any
sense - only one field is left still used (has_symbol_clk), so this
should be simplified here as well.

> +	if (!phy->isol) {
> +		err = -ENOMEM;
> +		goto out;
> +	}
> +
>  	drvdata = match->data;
>  	phy->dev = dev;
>  	phy->drvdata = drvdata;
>  	phy->cfg = drvdata->cfg;
> -	phy->isol = &drvdata->isol;
> +	memcpy(phy->isol, &drvdata->isol, sizeof(struct pmu_isol));
> +
> +	if (!of_property_read_u32_index(dev->of_node, "samsung,pmu-syscon", 1,
> +					&isol_offset))
> +		phy->isol->offset = isol_offset;
> +
>  	phy->lane_cnt = PHY_DEF_LANE_CNT;
>  
>  	phy_set_drvdata(gen_phy, phy);
> diff --git a/drivers/phy/samsung/phy-samsung-ufs.h b/drivers/phy/samsung/phy-samsung-ufs.h
> index 8c3696b3c5ec..d3e1c2016b27 100644
> --- a/drivers/phy/samsung/phy-samsung-ufs.h
> +++ b/drivers/phy/samsung/phy-samsung-ufs.h
> @@ -122,7 +122,7 @@ struct samsung_ufs_phy {
>  	struct clk *rx1_symbol_clk;
>  	const struct samsung_ufs_phy_drvdata *drvdata;
>  	const struct samsung_ufs_phy_cfg **cfg;
> -	const struct pmu_isol *isol;
> +	struct pmu_isol *isol;
>  	u8 lane_cnt;
>  	int ufs_phy_state;
>  	enum phy_mode mode;


Best regards,
Krzysztof

Re: [PATCH v2 3/6] phy: samsung: ufs: support secondary ufs phy

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> To support secondary ufs phy device, we need to get an offset for phy
> isolation from the syscon DT node. If the first index argument of the
> node is existing, we can read the offset value and set it as isol->offset.
> To allow this assignment, we need to change the field so the isol data
> needs to be allocated and copied from drvdata.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  drivers/phy/samsung/phy-samsung-ufs.c | 14 +++++++++++++-
>  drivers/phy/samsung/phy-samsung-ufs.h |  2 +-
>  2 files changed, 14 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/phy/samsung/phy-samsung-ufs.c b/drivers/phy/samsung/phy-samsung-ufs.c
> index b7ddb91a02be..7716b6dc955b 100644
> --- a/drivers/phy/samsung/phy-samsung-ufs.c
> +++ b/drivers/phy/samsung/phy-samsung-ufs.c
> @@ -288,6 +288,7 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
>  	struct phy *gen_phy;
>  	struct phy_provider *phy_provider;
>  	const struct samsung_ufs_phy_drvdata *drvdata;
> +	u32 isol_offset;
>  	int err = 0;
>  
>  	match = of_match_node(samsung_ufs_phy_match, dev->of_node);
> @@ -324,11 +325,22 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
>  		goto out;
>  	}
>  
> +	phy->isol = devm_kzalloc(dev, sizeof(struct pmu_isol), GFP_KERNEL);

1. Looks like devm_kmemdup
2. sizeof(*variable), not sizeof(struct)

3. and actually you can simplify all that by storing struct pmu_isol
directly in struct samsung_ufs_phy, not as pointer.

After all that storing drvdata in samsung_ufs_phy does not make any
sense - only one field is left still used (has_symbol_clk), so this
should be simplified here as well.

> +	if (!phy->isol) {
> +		err = -ENOMEM;
> +		goto out;
> +	}
> +
>  	drvdata = match->data;
>  	phy->dev = dev;
>  	phy->drvdata = drvdata;
>  	phy->cfg = drvdata->cfg;
> -	phy->isol = &drvdata->isol;
> +	memcpy(phy->isol, &drvdata->isol, sizeof(struct pmu_isol));
> +
> +	if (!of_property_read_u32_index(dev->of_node, "samsung,pmu-syscon", 1,
> +					&isol_offset))
> +		phy->isol->offset = isol_offset;
> +
>  	phy->lane_cnt = PHY_DEF_LANE_CNT;
>  
>  	phy_set_drvdata(gen_phy, phy);
> diff --git a/drivers/phy/samsung/phy-samsung-ufs.h b/drivers/phy/samsung/phy-samsung-ufs.h
> index 8c3696b3c5ec..d3e1c2016b27 100644
> --- a/drivers/phy/samsung/phy-samsung-ufs.h
> +++ b/drivers/phy/samsung/phy-samsung-ufs.h
> @@ -122,7 +122,7 @@ struct samsung_ufs_phy {
>  	struct clk *rx1_symbol_clk;
>  	const struct samsung_ufs_phy_drvdata *drvdata;
>  	const struct samsung_ufs_phy_cfg **cfg;
> -	const struct pmu_isol *isol;
> +	struct pmu_isol *isol;
>  	u8 lane_cnt;
>  	int ufs_phy_state;
>  	enum phy_mode mode;


Best regards,
Krzysztof

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Re: [PATCH v2 3/6] phy: samsung: ufs: support secondary ufs phy

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> To support secondary ufs phy device, we need to get an offset for phy
> isolation from the syscon DT node. If the first index argument of the
> node is existing, we can read the offset value and set it as isol->offset.
> To allow this assignment, we need to change the field so the isol data
> needs to be allocated and copied from drvdata.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  drivers/phy/samsung/phy-samsung-ufs.c | 14 +++++++++++++-
>  drivers/phy/samsung/phy-samsung-ufs.h |  2 +-
>  2 files changed, 14 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/phy/samsung/phy-samsung-ufs.c b/drivers/phy/samsung/phy-samsung-ufs.c
> index b7ddb91a02be..7716b6dc955b 100644
> --- a/drivers/phy/samsung/phy-samsung-ufs.c
> +++ b/drivers/phy/samsung/phy-samsung-ufs.c
> @@ -288,6 +288,7 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
>  	struct phy *gen_phy;
>  	struct phy_provider *phy_provider;
>  	const struct samsung_ufs_phy_drvdata *drvdata;
> +	u32 isol_offset;
>  	int err = 0;
>  
>  	match = of_match_node(samsung_ufs_phy_match, dev->of_node);
> @@ -324,11 +325,22 @@ static int samsung_ufs_phy_probe(struct platform_device *pdev)
>  		goto out;
>  	}
>  
> +	phy->isol = devm_kzalloc(dev, sizeof(struct pmu_isol), GFP_KERNEL);

1. Looks like devm_kmemdup
2. sizeof(*variable), not sizeof(struct)

3. and actually you can simplify all that by storing struct pmu_isol
directly in struct samsung_ufs_phy, not as pointer.

After all that storing drvdata in samsung_ufs_phy does not make any
sense - only one field is left still used (has_symbol_clk), so this
should be simplified here as well.

> +	if (!phy->isol) {
> +		err = -ENOMEM;
> +		goto out;
> +	}
> +
>  	drvdata = match->data;
>  	phy->dev = dev;
>  	phy->drvdata = drvdata;
>  	phy->cfg = drvdata->cfg;
> -	phy->isol = &drvdata->isol;
> +	memcpy(phy->isol, &drvdata->isol, sizeof(struct pmu_isol));
> +
> +	if (!of_property_read_u32_index(dev->of_node, "samsung,pmu-syscon", 1,
> +					&isol_offset))
> +		phy->isol->offset = isol_offset;
> +
>  	phy->lane_cnt = PHY_DEF_LANE_CNT;
>  
>  	phy_set_drvdata(gen_phy, phy);
> diff --git a/drivers/phy/samsung/phy-samsung-ufs.h b/drivers/phy/samsung/phy-samsung-ufs.h
> index 8c3696b3c5ec..d3e1c2016b27 100644
> --- a/drivers/phy/samsung/phy-samsung-ufs.h
> +++ b/drivers/phy/samsung/phy-samsung-ufs.h
> @@ -122,7 +122,7 @@ struct samsung_ufs_phy {
>  	struct clk *rx1_symbol_clk;
>  	const struct samsung_ufs_phy_drvdata *drvdata;
>  	const struct samsung_ufs_phy_cfg **cfg;
> -	const struct pmu_isol *isol;
> +	struct pmu_isol *isol;
>  	u8 lane_cnt;
>  	int ufs_phy_state;
>  	enum phy_mode mode;


Best regards,
Krzysztof

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RE: [PATCH v2 3/6] phy: samsung: ufs: support secondary ufs phy

[Chanho Park]

> > +	phy->isol = devm_kzalloc(dev, sizeof(struct pmu_isol), GFP_KERNEL);
> 
> 1. Looks like devm_kmemdup
> 2. sizeof(*variable), not sizeof(struct)
> 
> 3. and actually you can simplify all that by storing struct pmu_isol
> directly in struct samsung_ufs_phy, not as pointer.
> 
> After all that storing drvdata in samsung_ufs_phy does not make any sense
> - only one field is left still used (has_symbol_clk), so this should be
> simplified here as well.

It would be better storing struct pmu_isol directly and remove drvdata from samsung_ufs_phy as you suggested.
Furthermore, definition of struct pmu_isol looks odd in the definition of samsung_ufs_phy_drvdata.
So, I'll pop it out and change the naming to "struct samsung_ufs_phy_pmu_isol"

Best Regards,
Chanho Park

RE: [PATCH v2 3/6] phy: samsung: ufs: support secondary ufs phy

[Chanho Park]

> > +	phy->isol = devm_kzalloc(dev, sizeof(struct pmu_isol), GFP_KERNEL);
> 
> 1. Looks like devm_kmemdup
> 2. sizeof(*variable), not sizeof(struct)
> 
> 3. and actually you can simplify all that by storing struct pmu_isol
> directly in struct samsung_ufs_phy, not as pointer.
> 
> After all that storing drvdata in samsung_ufs_phy does not make any sense
> - only one field is left still used (has_symbol_clk), so this should be
> simplified here as well.

It would be better storing struct pmu_isol directly and remove drvdata from samsung_ufs_phy as you suggested.
Furthermore, definition of struct pmu_isol looks odd in the definition of samsung_ufs_phy_drvdata.
So, I'll pop it out and change the naming to "struct samsung_ufs_phy_pmu_isol"

Best Regards,
Chanho Park


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RE: [PATCH v2 3/6] phy: samsung: ufs: support secondary ufs phy

[Chanho Park]

> > +	phy->isol = devm_kzalloc(dev, sizeof(struct pmu_isol), GFP_KERNEL);
> 
> 1. Looks like devm_kmemdup
> 2. sizeof(*variable), not sizeof(struct)
> 
> 3. and actually you can simplify all that by storing struct pmu_isol
> directly in struct samsung_ufs_phy, not as pointer.
> 
> After all that storing drvdata in samsung_ufs_phy does not make any sense
> - only one field is left still used (has_symbol_clk), so this should be
> simplified here as well.

It would be better storing struct pmu_isol directly and remove drvdata from samsung_ufs_phy as you suggested.
Furthermore, definition of struct pmu_isol looks odd in the definition of samsung_ufs_phy_drvdata.
So, I'll pop it out and change the naming to "struct samsung_ufs_phy_pmu_isol"

Best Regards,
Chanho Park


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[PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Chanho Park]

Drop "ufs0-" label name usage of ufs phy and hci nodes.
Regarding the comments of reg properties, we don't need to illustrate here
because we can find the description from the dt-binding doc.

Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
index 26e427295946..beb46b5a83b6 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
@@ -369,7 +369,7 @@ serial_0: serial@10300000 {
 			};
 		};
 
-		ufs_0_phy: ufs0-phy@17e04000 {
+		ufs_0_phy: phy@17e04000 {
 			compatible = "samsung,exynosautov9-ufs-phy";
 			reg = <0x17e04000 0xc00>;
 			reg-names = "phy-pma";
@@ -380,13 +380,13 @@ ufs_0_phy: ufs0-phy@17e04000 {
 			status = "disabled";
 		};
 
-		ufs_0: ufs0@17e00000 {
+		ufs_0: ufs@17e00000 {
 			compatible = "samsung,exynosautov9-ufs";
 
-			reg = <0x17e00000 0x100>,  /* 0: HCI standard */
-				<0x17e01100 0x410>,  /* 1: Vendor-specific */
-				<0x17e80000 0x8000>,  /* 2: UNIPRO */
-				<0x17dc0000 0x2200>;  /* 3: UFS protector */
+			reg = <0x17e00000 0x100>,
+			      <0x17e01100 0x410>,
+			      <0x17e80000 0x8000>,
+			      <0x17dc0000 0x2200>;
 			reg-names = "hci", "vs_hci", "unipro", "ufsp";
 			interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD0_ACLK>,
-- 
2.36.1

[PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Chanho Park]

Drop "ufs0-" label name usage of ufs phy and hci nodes.
Regarding the comments of reg properties, we don't need to illustrate here
because we can find the description from the dt-binding doc.

Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
index 26e427295946..beb46b5a83b6 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
@@ -369,7 +369,7 @@ serial_0: serial@10300000 {
 			};
 		};
 
-		ufs_0_phy: ufs0-phy@17e04000 {
+		ufs_0_phy: phy@17e04000 {
 			compatible = "samsung,exynosautov9-ufs-phy";
 			reg = <0x17e04000 0xc00>;
 			reg-names = "phy-pma";
@@ -380,13 +380,13 @@ ufs_0_phy: ufs0-phy@17e04000 {
 			status = "disabled";
 		};
 
-		ufs_0: ufs0@17e00000 {
+		ufs_0: ufs@17e00000 {
 			compatible = "samsung,exynosautov9-ufs";
 
-			reg = <0x17e00000 0x100>,  /* 0: HCI standard */
-				<0x17e01100 0x410>,  /* 1: Vendor-specific */
-				<0x17e80000 0x8000>,  /* 2: UNIPRO */
-				<0x17dc0000 0x2200>;  /* 3: UFS protector */
+			reg = <0x17e00000 0x100>,
+			      <0x17e01100 0x410>,
+			      <0x17e80000 0x8000>,
+			      <0x17dc0000 0x2200>;
 			reg-names = "hci", "vs_hci", "unipro", "ufsp";
 			interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD0_ACLK>,
-- 
2.36.1


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[PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Chanho Park]

Drop "ufs0-" label name usage of ufs phy and hci nodes.
Regarding the comments of reg properties, we don't need to illustrate here
because we can find the description from the dt-binding doc.

Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
index 26e427295946..beb46b5a83b6 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
@@ -369,7 +369,7 @@ serial_0: serial@10300000 {
 			};
 		};
 
-		ufs_0_phy: ufs0-phy@17e04000 {
+		ufs_0_phy: phy@17e04000 {
 			compatible = "samsung,exynosautov9-ufs-phy";
 			reg = <0x17e04000 0xc00>;
 			reg-names = "phy-pma";
@@ -380,13 +380,13 @@ ufs_0_phy: ufs0-phy@17e04000 {
 			status = "disabled";
 		};
 
-		ufs_0: ufs0@17e00000 {
+		ufs_0: ufs@17e00000 {
 			compatible = "samsung,exynosautov9-ufs";
 
-			reg = <0x17e00000 0x100>,  /* 0: HCI standard */
-				<0x17e01100 0x410>,  /* 1: Vendor-specific */
-				<0x17e80000 0x8000>,  /* 2: UNIPRO */
-				<0x17dc0000 0x2200>;  /* 3: UFS protector */
+			reg = <0x17e00000 0x100>,
+			      <0x17e01100 0x410>,
+			      <0x17e80000 0x8000>,
+			      <0x17dc0000 0x2200>;
 			reg-names = "hci", "vs_hci", "unipro", "ufsp";
 			interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD0_ACLK>,
-- 
2.36.1


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Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> Drop "ufs0-" label name usage of ufs phy and hci nodes.
> Regarding the comments of reg properties, we don't need to illustrate here
> because we can find the description from the dt-binding doc.
> 
> Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---

Thanks, DTS look ok, I'll take the last three patches after merge window.

Best regards,
Krzysztof

Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> Drop "ufs0-" label name usage of ufs phy and hci nodes.
> Regarding the comments of reg properties, we don't need to illustrate here
> because we can find the description from the dt-binding doc.
> 
> Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---

Thanks, DTS look ok, I'll take the last three patches after merge window.

Best regards,
Krzysztof

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Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> Drop "ufs0-" label name usage of ufs phy and hci nodes.
> Regarding the comments of reg properties, we don't need to illustrate here
> because we can find the description from the dt-binding doc.
> 
> Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---

Thanks, DTS look ok, I'll take the last three patches after merge window.

Best regards,
Krzysztof

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Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> Drop "ufs0-" label name usage of ufs phy and hci nodes.
> Regarding the comments of reg properties, we don't need to illustrate here
> because we can find the description from the dt-binding doc.
> 
> Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>

This does not apply. Can you rebase and send the DTS patches as separate
patchset?


Best regards,
Krzysztof

Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> Drop "ufs0-" label name usage of ufs phy and hci nodes.
> Regarding the comments of reg properties, we don't need to illustrate here
> because we can find the description from the dt-binding doc.
> 
> Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>

This does not apply. Can you rebase and send the DTS patches as separate
patchset?


Best regards,
Krzysztof

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Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Krzysztof Kozlowski]

On 02/06/2022 07:32, Chanho Park wrote:
> Drop "ufs0-" label name usage of ufs phy and hci nodes.
> Regarding the comments of reg properties, we don't need to illustrate here
> because we can find the description from the dt-binding doc.
> 
> Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>

This does not apply. Can you rebase and send the DTS patches as separate
patchset?


Best regards,
Krzysztof

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RE: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Chanho Park]

> Subject: Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of
> ufs nodes
> 
> On 02/06/2022 07:32, Chanho Park wrote:
> > Drop "ufs0-" label name usage of ufs phy and hci nodes.
> > Regarding the comments of reg properties, we don't need to illustrate
> > here because we can find the description from the dt-binding doc.
> >
> > Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> 
> This does not apply. Can you rebase and send the DTS patches as separate
> patchset?

I forgot to point the baseline of this patchset. I stacked this patch on top of below patch.
If you do not apply below patch or put this separate branch, I'll rebase this patchset without below patch.

https://lore.kernel.org/linux-samsung-soc/20220526204323.832243-1-krzysztof.kozlowski@linaro.org/

Best Regards,
Chanho Park

RE: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Chanho Park]

> Subject: Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of
> ufs nodes
> 
> On 02/06/2022 07:32, Chanho Park wrote:
> > Drop "ufs0-" label name usage of ufs phy and hci nodes.
> > Regarding the comments of reg properties, we don't need to illustrate
> > here because we can find the description from the dt-binding doc.
> >
> > Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> 
> This does not apply. Can you rebase and send the DTS patches as separate
> patchset?

I forgot to point the baseline of this patchset. I stacked this patch on top of below patch.
If you do not apply below patch or put this separate branch, I'll rebase this patchset without below patch.

https://lore.kernel.org/linux-samsung-soc/20220526204323.832243-1-krzysztof.kozlowski@linaro.org/

Best Regards,
Chanho Park


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RE: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Chanho Park]

> Subject: Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of
> ufs nodes
> 
> On 02/06/2022 07:32, Chanho Park wrote:
> > Drop "ufs0-" label name usage of ufs phy and hci nodes.
> > Regarding the comments of reg properties, we don't need to illustrate
> > here because we can find the description from the dt-binding doc.
> >
> > Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> 
> This does not apply. Can you rebase and send the DTS patches as separate
> patchset?

I forgot to point the baseline of this patchset. I stacked this patch on top of below patch.
If you do not apply below patch or put this separate branch, I'll rebase this patchset without below patch.

https://lore.kernel.org/linux-samsung-soc/20220526204323.832243-1-krzysztof.kozlowski@linaro.org/

Best Regards,
Chanho Park


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Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Krzysztof Kozlowski]

On 07/06/2022 07:21, Chanho Park wrote:
>> Subject: Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of
>> ufs nodes
>>
>> On 02/06/2022 07:32, Chanho Park wrote:
>>> Drop "ufs0-" label name usage of ufs phy and hci nodes.
>>> Regarding the comments of reg properties, we don't need to illustrate
>>> here because we can find the description from the dt-binding doc.
>>>
>>> Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>>> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
>>
>> This does not apply. Can you rebase and send the DTS patches as separate
>> patchset?
> 
> I forgot to point the baseline of this patchset. I stacked this patch on top of below patch.
> If you do not apply below patch or put this separate branch, I'll rebase this patchset without below patch.
> 
> https://lore.kernel.org/linux-samsung-soc/20220526204323.832243-1-krzysztof.kozlowski@linaro.org/

Oh, thanks! Unfortunately it helped for the patch #4 (first of DTS) but
not for the next one. Maybe some other patch caused the hunks to differ.
Please rebase remaining two DTS patches.


Best regards,
Krzysztof

Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Krzysztof Kozlowski]

On 07/06/2022 07:21, Chanho Park wrote:
>> Subject: Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of
>> ufs nodes
>>
>> On 02/06/2022 07:32, Chanho Park wrote:
>>> Drop "ufs0-" label name usage of ufs phy and hci nodes.
>>> Regarding the comments of reg properties, we don't need to illustrate
>>> here because we can find the description from the dt-binding doc.
>>>
>>> Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>>> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
>>
>> This does not apply. Can you rebase and send the DTS patches as separate
>> patchset?
> 
> I forgot to point the baseline of this patchset. I stacked this patch on top of below patch.
> If you do not apply below patch or put this separate branch, I'll rebase this patchset without below patch.
> 
> https://lore.kernel.org/linux-samsung-soc/20220526204323.832243-1-krzysztof.kozlowski@linaro.org/

Oh, thanks! Unfortunately it helped for the patch #4 (first of DTS) but
not for the next one. Maybe some other patch caused the hunks to differ.
Please rebase remaining two DTS patches.


Best regards,
Krzysztof

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Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Krzysztof Kozlowski]

On 07/06/2022 07:21, Chanho Park wrote:
>> Subject: Re: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of
>> ufs nodes
>>
>> On 02/06/2022 07:32, Chanho Park wrote:
>>> Drop "ufs0-" label name usage of ufs phy and hci nodes.
>>> Regarding the comments of reg properties, we don't need to illustrate
>>> here because we can find the description from the dt-binding doc.
>>>
>>> Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>>> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
>>
>> This does not apply. Can you rebase and send the DTS patches as separate
>> patchset?
> 
> I forgot to point the baseline of this patchset. I stacked this patch on top of below patch.
> If you do not apply below patch or put this separate branch, I'll rebase this patchset without below patch.
> 
> https://lore.kernel.org/linux-samsung-soc/20220526204323.832243-1-krzysztof.kozlowski@linaro.org/

Oh, thanks! Unfortunately it helped for the patch #4 (first of DTS) but
not for the next one. Maybe some other patch caused the hunks to differ.
Please rebase remaining two DTS patches.


Best regards,
Krzysztof

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RE: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Chanho Park]

> Oh, thanks! Unfortunately it helped for the patch #4 (first of DTS) but
> not for the next one. Maybe some other patch caused the hunks to differ.
> Please rebase remaining two DTS patches.

Looks like they're conflicted with watchdog patches.
I'll rebase rest two patches on top of your next/dt64 branch.
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git/log/?h=next/dt64

Best Regards,
Chanho Park

RE: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Chanho Park]

> Oh, thanks! Unfortunately it helped for the patch #4 (first of DTS) but
> not for the next one. Maybe some other patch caused the hunks to differ.
> Please rebase remaining two DTS patches.

Looks like they're conflicted with watchdog patches.
I'll rebase rest two patches on top of your next/dt64 branch.
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git/log/?h=next/dt64

Best Regards,
Chanho Park


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RE: [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Chanho Park]

> Oh, thanks! Unfortunately it helped for the patch #4 (first of DTS) but
> not for the next one. Maybe some other patch caused the hunks to differ.
> Please rebase remaining two DTS patches.

Looks like they're conflicted with watchdog patches.
I'll rebase rest two patches on top of your next/dt64 branch.
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git/log/?h=next/dt64

Best Regards,
Chanho Park


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Re: (subset) [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Krzysztof Kozlowski]

On Thu, 2 Jun 2022 14:32:48 +0900, Chanho Park wrote:
> Drop "ufs0-" label name usage of ufs phy and hci nodes.
> Regarding the comments of reg properties, we don't need to illustrate here
> because we can find the description from the dt-binding doc.
> 
> 

Applied, thanks!

[4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes
      https://git.kernel.org/krzk/linux/c/283d046406c22409d45b3ab31a4c93fe94b66349

Best regards,
-- 
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Re: (subset) [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Krzysztof Kozlowski]

On Thu, 2 Jun 2022 14:32:48 +0900, Chanho Park wrote:
> Drop "ufs0-" label name usage of ufs phy and hci nodes.
> Regarding the comments of reg properties, we don't need to illustrate here
> because we can find the description from the dt-binding doc.
> 
> 

Applied, thanks!

[4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes
      https://git.kernel.org/krzk/linux/c/283d046406c22409d45b3ab31a4c93fe94b66349

Best regards,
-- 
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

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Re: (subset) [PATCH v2 4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes

[Krzysztof Kozlowski]

On Thu, 2 Jun 2022 14:32:48 +0900, Chanho Park wrote:
> Drop "ufs0-" label name usage of ufs phy and hci nodes.
> Regarding the comments of reg properties, we don't need to illustrate here
> because we can find the description from the dt-binding doc.
> 
> 

Applied, thanks!

[4/6] arm64: dts: exynosautov9: adjust DT style of ufs nodes
      https://git.kernel.org/krzk/linux/c/283d046406c22409d45b3ab31a4c93fe94b66349

Best regards,
-- 
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[PATCH v2 5/6] arm64: dts: exynosautov9: add secondary ufs devices

[Chanho Park]

Add ufs_1_phy and ufs_1 for secondary ufs hci controller and phy
device.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 32 ++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
index beb46b5a83b6..161fd36e718d 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
@@ -400,6 +400,38 @@ ufs_0: ufs@17e00000 {
 			samsung,sysreg = <&syscon_fsys2 0x710>;
 			status = "disabled";
 		};
+
+		ufs_1_phy: phy@17f04000 {
+			compatible = "samsung,exynosautov9-ufs-phy";
+			reg = <0x17f04000 0xc00>;
+			reg-names = "phy-pma";
+			samsung,pmu-syscon = <&pmu_system_controller 0x72c>;
+			#phy-cells = <0>;
+			clocks = <&xtcxo>;
+			clock-names = "ref_clk";
+			status = "disabled";
+		};
+
+		ufs_1: ufs@17f00000 {
+			compatible = "samsung,exynosautov9-ufs";
+
+			reg = <0x17f00000 0x100>,
+			      <0x17f01100 0x410>,
+			      <0x17f80000 0x8000>,
+			      <0x17de0000 0x2200>;
+			reg-names = "hci", "vs_hci", "unipro", "ufsp";
+			interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_ACLK>,
+				 <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_UNIPRO>;
+			clock-names = "core_clk", "sclk_unipro_main";
+			freq-table-hz = <0 0>, <0 0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&ufs_rst_n_1 &ufs_refclk_out_1>;
+			phys = <&ufs_1_phy>;
+			phy-names = "ufs-phy";
+			samsung,sysreg = <&syscon_fsys2 0x714>;
+			status = "disabled";
+		};
 	};
 };
 
-- 
2.36.1

[PATCH v2 5/6] arm64: dts: exynosautov9: add secondary ufs devices

[Chanho Park]

Add ufs_1_phy and ufs_1 for secondary ufs hci controller and phy
device.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 32 ++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
index beb46b5a83b6..161fd36e718d 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
@@ -400,6 +400,38 @@ ufs_0: ufs@17e00000 {
 			samsung,sysreg = <&syscon_fsys2 0x710>;
 			status = "disabled";
 		};
+
+		ufs_1_phy: phy@17f04000 {
+			compatible = "samsung,exynosautov9-ufs-phy";
+			reg = <0x17f04000 0xc00>;
+			reg-names = "phy-pma";
+			samsung,pmu-syscon = <&pmu_system_controller 0x72c>;
+			#phy-cells = <0>;
+			clocks = <&xtcxo>;
+			clock-names = "ref_clk";
+			status = "disabled";
+		};
+
+		ufs_1: ufs@17f00000 {
+			compatible = "samsung,exynosautov9-ufs";
+
+			reg = <0x17f00000 0x100>,
+			      <0x17f01100 0x410>,
+			      <0x17f80000 0x8000>,
+			      <0x17de0000 0x2200>;
+			reg-names = "hci", "vs_hci", "unipro", "ufsp";
+			interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_ACLK>,
+				 <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_UNIPRO>;
+			clock-names = "core_clk", "sclk_unipro_main";
+			freq-table-hz = <0 0>, <0 0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&ufs_rst_n_1 &ufs_refclk_out_1>;
+			phys = <&ufs_1_phy>;
+			phy-names = "ufs-phy";
+			samsung,sysreg = <&syscon_fsys2 0x714>;
+			status = "disabled";
+		};
 	};
 };
 
-- 
2.36.1


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[PATCH v2 5/6] arm64: dts: exynosautov9: add secondary ufs devices

[Chanho Park]

Add ufs_1_phy and ufs_1 for secondary ufs hci controller and phy
device.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 32 ++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
index beb46b5a83b6..161fd36e718d 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
@@ -400,6 +400,38 @@ ufs_0: ufs@17e00000 {
 			samsung,sysreg = <&syscon_fsys2 0x710>;
 			status = "disabled";
 		};
+
+		ufs_1_phy: phy@17f04000 {
+			compatible = "samsung,exynosautov9-ufs-phy";
+			reg = <0x17f04000 0xc00>;
+			reg-names = "phy-pma";
+			samsung,pmu-syscon = <&pmu_system_controller 0x72c>;
+			#phy-cells = <0>;
+			clocks = <&xtcxo>;
+			clock-names = "ref_clk";
+			status = "disabled";
+		};
+
+		ufs_1: ufs@17f00000 {
+			compatible = "samsung,exynosautov9-ufs";
+
+			reg = <0x17f00000 0x100>,
+			      <0x17f01100 0x410>,
+			      <0x17f80000 0x8000>,
+			      <0x17de0000 0x2200>;
+			reg-names = "hci", "vs_hci", "unipro", "ufsp";
+			interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_ACLK>,
+				 <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_UNIPRO>;
+			clock-names = "core_clk", "sclk_unipro_main";
+			freq-table-hz = <0 0>, <0 0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&ufs_rst_n_1 &ufs_refclk_out_1>;
+			phys = <&ufs_1_phy>;
+			phy-names = "ufs-phy";
+			samsung,sysreg = <&syscon_fsys2 0x714>;
+			status = "disabled";
+		};
 	};
 };
 
-- 
2.36.1


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[PATCH v2 6/6] arm64: dts: exynosautov9-sadk: enable secondary ufs devices

[Chanho Park]

Enable ufs_1_phy and ufs_1 devices with ufs_1_fixed_vcc_reg regulator.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 .../boot/dts/exynos/exynosautov9-sadk.dts      | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts
index 17e568853eb6..2b30a7458297 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts
+++ b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts
@@ -39,6 +39,14 @@ ufs_0_fixed_vcc_reg: regulator-0 {
 		regulator-boot-on;
 		enable-active-high;
 	};
+
+	ufs_1_fixed_vcc_reg: regulator-1 {
+		compatible = "regulator-fixed";
+		regulator-name = "ufs-vcc";
+		gpio = <&gpg2 2 GPIO_ACTIVE_HIGH>;
+		regulator-boot-on;
+		enable-active-high;
+	};
 };
 
 &serial_0 {
@@ -49,12 +57,22 @@ &ufs_0_phy {
 	status = "okay";
 };
 
+&ufs_1_phy {
+	status = "okay";
+};
+
 &ufs_0 {
 	status = "okay";
 	vcc-supply = <&ufs_0_fixed_vcc_reg>;
 	vcc-fixed-regulator;
 };
 
+&ufs_1 {
+	status = "okay";
+	vcc-supply = <&ufs_1_fixed_vcc_reg>;
+	vcc-fixed-regulator;
+};
+
 &usi_0 {
 	status = "okay";
 };
-- 
2.36.1

[PATCH v2 6/6] arm64: dts: exynosautov9-sadk: enable secondary ufs devices

[Chanho Park]

Enable ufs_1_phy and ufs_1 devices with ufs_1_fixed_vcc_reg regulator.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 .../boot/dts/exynos/exynosautov9-sadk.dts      | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts
index 17e568853eb6..2b30a7458297 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts
+++ b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts
@@ -39,6 +39,14 @@ ufs_0_fixed_vcc_reg: regulator-0 {
 		regulator-boot-on;
 		enable-active-high;
 	};
+
+	ufs_1_fixed_vcc_reg: regulator-1 {
+		compatible = "regulator-fixed";
+		regulator-name = "ufs-vcc";
+		gpio = <&gpg2 2 GPIO_ACTIVE_HIGH>;
+		regulator-boot-on;
+		enable-active-high;
+	};
 };
 
 &serial_0 {
@@ -49,12 +57,22 @@ &ufs_0_phy {
 	status = "okay";
 };
 
+&ufs_1_phy {
+	status = "okay";
+};
+
 &ufs_0 {
 	status = "okay";
 	vcc-supply = <&ufs_0_fixed_vcc_reg>;
 	vcc-fixed-regulator;
 };
 
+&ufs_1 {
+	status = "okay";
+	vcc-supply = <&ufs_1_fixed_vcc_reg>;
+	vcc-fixed-regulator;
+};
+
 &usi_0 {
 	status = "okay";
 };
-- 
2.36.1


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[PATCH v2 6/6] arm64: dts: exynosautov9-sadk: enable secondary ufs devices

[Chanho Park]

Enable ufs_1_phy and ufs_1 devices with ufs_1_fixed_vcc_reg regulator.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 .../boot/dts/exynos/exynosautov9-sadk.dts      | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts
index 17e568853eb6..2b30a7458297 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts
+++ b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts
@@ -39,6 +39,14 @@ ufs_0_fixed_vcc_reg: regulator-0 {
 		regulator-boot-on;
 		enable-active-high;
 	};
+
+	ufs_1_fixed_vcc_reg: regulator-1 {
+		compatible = "regulator-fixed";
+		regulator-name = "ufs-vcc";
+		gpio = <&gpg2 2 GPIO_ACTIVE_HIGH>;
+		regulator-boot-on;
+		enable-active-high;
+	};
 };
 
 &serial_0 {
@@ -49,12 +57,22 @@ &ufs_0_phy {
 	status = "okay";
 };
 
+&ufs_1_phy {
+	status = "okay";
+};
+
 &ufs_0 {
 	status = "okay";
 	vcc-supply = <&ufs_0_fixed_vcc_reg>;
 	vcc-fixed-regulator;
 };
 
+&ufs_1 {
+	status = "okay";
+	vcc-supply = <&ufs_1_fixed_vcc_reg>;
+	vcc-fixed-regulator;
+};
+
 &usi_0 {
 	status = "okay";
 };
-- 
2.36.1


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