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From: "Paweł Anikiel" <pan@semihalf.com>
To: marex@denx.de, simon.k.r.goldschmidt@gmail.com,
	tien.fong.chee@intel.com, michal.simek@xilinx.com
Cc: u-boot@lists.denx.de, sjg@chromium.org, festevam@denx.de,
	jagan@amarulasolutions.com, andre.przywara@arm.com,
	narmstrong@baylibre.com, pbrobinson@gmail.com,
	tharvey@gateworks.com, paul.liu@linaro.org,
	christianshewitt@gmail.com, adrian.fiergolski@fastree3d.com,
	marek.behun@nic.cz, wd@denx.de, elly.siew.chin.lim@intel.com,
	upstream@semihalf.com, amstan@chromium.org,
	"Paweł Anikiel" <pan@semihalf.com>
Subject: [PATCH v3 04/11] board: Add Chameleonv3 board dir
Date: Fri, 17 Jun 2022 12:47:19 +0200	[thread overview]
Message-ID: <20220617104726.158688-5-pan@semihalf.com> (raw)
In-Reply-To: <20220617104726.158688-1-pan@semihalf.com>

Add board directory for Google Chameleon V3 board

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
 board/google/chameleonv3/Makefile          |  5 +++
 board/google/chameleonv3/board.c           | 27 ++++++++++++++
 board/google/chameleonv3/fpga.its          | 28 ++++++++++++++
 board/google/chameleonv3/fpga_early_io.its | 35 ++++++++++++++++++
 board/google/chameleonv3/mercury_aa1.c     | 43 ++++++++++++++++++++++
 board/google/chameleonv3/mercury_aa1.h     | 12 ++++++
 6 files changed, 150 insertions(+)
 create mode 100644 board/google/chameleonv3/Makefile
 create mode 100644 board/google/chameleonv3/board.c
 create mode 100644 board/google/chameleonv3/fpga.its
 create mode 100644 board/google/chameleonv3/fpga_early_io.its
 create mode 100644 board/google/chameleonv3/mercury_aa1.c
 create mode 100644 board/google/chameleonv3/mercury_aa1.h

diff --git a/board/google/chameleonv3/Makefile b/board/google/chameleonv3/Makefile
new file mode 100644
index 0000000000..bb413fde83
--- /dev/null
+++ b/board/google/chameleonv3/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright 2022 Google LLC
+
+obj-y	:= board.o mercury_aa1.o
diff --git a/board/google/chameleonv3/board.c b/board/google/chameleonv3/board.c
new file mode 100644
index 0000000000..4d3049689d
--- /dev/null
+++ b/board/google/chameleonv3/board.c
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+#include <net.h>
+#include <errno.h>
+#include "mercury_aa1.h"
+
+int misc_init_r(void)
+{
+	u8 mac[ARP_HLEN];
+	int res;
+
+	if (env_get("ethaddr"))
+		return 0;
+
+	res = mercury_aa1_read_mac(mac);
+	if (res) {
+		printf("couldn't read mac address: %s\n", errno_str(res));
+		return 0;
+	}
+
+	if (is_valid_ethaddr(mac))
+		eth_env_set_enetaddr("ethaddr", mac);
+
+	return 0;
+}
diff --git a/board/google/chameleonv3/fpga.its b/board/google/chameleonv3/fpga.its
new file mode 100644
index 0000000000..85a830002f
--- /dev/null
+++ b/board/google/chameleonv3/fpga.its
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+/dts-v1/;
+
+/ {
+	description = "FIT image with FPGA bistream";
+	#address-cells = <1>;
+
+	images {
+		fpga-periph-1 {
+			description = "FPGA full bitstream";
+			data = /incbin/("../../../fpga.rbf");
+			type = "fpga";
+			arch = "arm";
+			compression = "none";
+		};
+	};
+
+	configurations {
+		default = "config-1";
+		config-1 {
+			description = "Boot with FPGA config";
+			fpga = "fpga-periph-1";
+		};
+	};
+};
diff --git a/board/google/chameleonv3/fpga_early_io.its b/board/google/chameleonv3/fpga_early_io.its
new file mode 100644
index 0000000000..ebc7bcbaae
--- /dev/null
+++ b/board/google/chameleonv3/fpga_early_io.its
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+/dts-v1/;
+
+/ {
+	description = "FIT image with FPGA bistream";
+	#address-cells = <1>;
+
+	images {
+		fpga-periph-1 {
+			description = "FPGA peripheral bitstream";
+			data = /incbin/("../../../periph.rbf");
+			type = "fpga";
+			arch = "arm";
+			compression = "none";
+		};
+		fpga-core-1 {
+			description = "FPGA core bitstream";
+			data = /incbin/("../../../core.rbf");
+			type = "fpga";
+			arch = "arm";
+			compression = "none";
+		};
+	};
+
+	configurations {
+		default = "config-1";
+		config-1 {
+			description = "Boot with FPGA config";
+			fpga = "fpga-periph-1", "fpga-core-1";
+		};
+	};
+};
diff --git a/board/google/chameleonv3/mercury_aa1.c b/board/google/chameleonv3/mercury_aa1.c
new file mode 100644
index 0000000000..ed447ec37c
--- /dev/null
+++ b/board/google/chameleonv3/mercury_aa1.c
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+#include <net.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
+#include <atsha204a-i2c.h>
+#include "mercury_aa1.h"
+
+#define MERCURY_AA1_ATSHA204A_OTP_MAC0 4
+#define MERCURY_AA1_ATSHA204A_OTP_MAC1 5
+
+int mercury_aa1_read_mac(u8 *mac)
+{
+	struct udevice *dev;
+	u8 buf[8];
+	int ret;
+
+	ret = uclass_get_device_by_name(UCLASS_MISC, "atsha204a@64", &dev);
+	if (ret)
+		return ret;
+
+	ret = atsha204a_wakeup(dev);
+	if (ret)
+		return ret;
+
+	ret = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false,
+			     MERCURY_AA1_ATSHA204A_OTP_MAC0, buf);
+	if (ret)
+		goto sleep;
+
+	ret = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false,
+			     MERCURY_AA1_ATSHA204A_OTP_MAC1, buf + 4);
+	if (ret)
+		goto sleep;
+
+	memcpy(mac, buf, ARP_HLEN);
+
+sleep:
+	atsha204a_sleep(dev);
+	return ret;
+}
diff --git a/board/google/chameleonv3/mercury_aa1.h b/board/google/chameleonv3/mercury_aa1.h
new file mode 100644
index 0000000000..636b735a3b
--- /dev/null
+++ b/board/google/chameleonv3/mercury_aa1.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright 2022 Google LLC
+ */
+
+/**
+ * mercury_aa1_read_mac() - Read mac address from on-board OTP memory
+ *
+ * @mac: Returned mac address
+ * Return: 0 if successful, -ve on error
+ */
+int mercury_aa1_read_mac(u8 *mac);
-- 
2.36.1.476.g0c4daa206d-goog


  parent reply	other threads:[~2022-06-17 10:48 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-17 10:47 [PATCH v3 00/11] Add Chameleon v3 support Paweł Anikiel
2022-06-17 10:47 ` [PATCH v3 01/11] arm: dts: Add Mercury+ AA1 devicetrees Paweł Anikiel
2022-06-17 10:47 ` [PATCH v3 02/11] arm: dts: Add Chameleonv3 handoff headers Paweł Anikiel
2022-06-17 10:47 ` [PATCH v3 03/11] arm: dts: Add Chameleonv3 devicetrees Paweł Anikiel
2022-06-17 10:47 ` Paweł Anikiel [this message]
2022-06-17 10:47 ` [PATCH v3 05/11] config: Add Chameleonv3 config Paweł Anikiel
2022-06-17 10:47 ` [PATCH v3 06/11] misc: atsha204a: Increase wake delay by tWHI Paweł Anikiel
2022-06-17 10:47 ` [PATCH v3 07/11] sysreset: socfpga: Use parent device for reading base address Paweł Anikiel
2022-06-17 10:47 ` [PATCH v3 08/11] socfpga: arria10: Replace delays with busy waiting in cm_full_cfg Paweł Anikiel
2022-06-20  8:40   ` Chee, Tien Fong
2022-06-20 12:13     ` Paweł Anikiel
2022-06-20 12:29       ` Chee, Tien Fong
2022-06-20 15:59         ` Paweł Anikiel
2022-06-23 11:53           ` Chee, Tien Fong
2022-06-17 10:47 ` [PATCH v3 09/11] socfpga: arria10: Improve bitstream loading speed Paweł Anikiel
2022-06-17 10:47 ` [PATCH v3 10/11] socfpga: arria10: Wait for fifo empty after writing bitstream Paweł Anikiel
2022-06-17 10:47 ` [PATCH v3 11/11] socfpga: arria10: Allow dcache_enable before relocation Paweł Anikiel

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