* [PATCH 0/3] Enable initial support for StarFive VisionFive V1 SBC
@ 2022-09-01 22:42 ` Cristian Ciocaltea
0 siblings, 0 replies; 14+ messages in thread
From: Cristian Ciocaltea @ 2022-09-01 22:42 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Michael Zhu, Drew Fustini, Emil Renner Berthing
Cc: devicetree, linux-riscv, linux-kernel, kernel
The StarFive VisionFive V1 SBC [1] is similar with the already supported
BeagleV Starlight Beta board, both being based on the StarFive JH7100 SoC.
In addition to documenting the necessary compatibles, this patch series
moves most of the content from jh7100-beaglev-starlight.dts to a new file
jh7100-common.dtsi, to be shared between the two boards.
No other changes are required in order to successfully boot the board.
[1] https://github.com/starfive-tech/VisionFive
Cristian Ciocaltea (3):
dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board
riscv: dts: starfive: Add common DT for JH7100 based boards
riscv: dts: starfive: Add StarFive VisionFive V1 device tree
.../devicetree/bindings/riscv/starfive.yaml | 3 +
arch/riscv/boot/dts/starfive/Makefile | 2 +-
.../dts/starfive/jh7100-beaglev-starlight.dts | 153 +----------------
.../boot/dts/starfive/jh7100-common.dtsi | 161 ++++++++++++++++++
.../jh7100-starfive-visionfive-v1.dts | 20 +++
5 files changed, 186 insertions(+), 153 deletions(-)
create mode 100644 arch/riscv/boot/dts/starfive/jh7100-common.dtsi
create mode 100644 arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
--
2.37.2
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 0/3] Enable initial support for StarFive VisionFive V1 SBC
@ 2022-09-01 22:42 ` Cristian Ciocaltea
0 siblings, 0 replies; 14+ messages in thread
From: Cristian Ciocaltea @ 2022-09-01 22:42 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Michael Zhu, Drew Fustini, Emil Renner Berthing
Cc: devicetree, linux-riscv, linux-kernel, kernel
The StarFive VisionFive V1 SBC [1] is similar with the already supported
BeagleV Starlight Beta board, both being based on the StarFive JH7100 SoC.
In addition to documenting the necessary compatibles, this patch series
moves most of the content from jh7100-beaglev-starlight.dts to a new file
jh7100-common.dtsi, to be shared between the two boards.
No other changes are required in order to successfully boot the board.
[1] https://github.com/starfive-tech/VisionFive
Cristian Ciocaltea (3):
dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board
riscv: dts: starfive: Add common DT for JH7100 based boards
riscv: dts: starfive: Add StarFive VisionFive V1 device tree
.../devicetree/bindings/riscv/starfive.yaml | 3 +
arch/riscv/boot/dts/starfive/Makefile | 2 +-
.../dts/starfive/jh7100-beaglev-starlight.dts | 153 +----------------
.../boot/dts/starfive/jh7100-common.dtsi | 161 ++++++++++++++++++
.../jh7100-starfive-visionfive-v1.dts | 20 +++
5 files changed, 186 insertions(+), 153 deletions(-)
create mode 100644 arch/riscv/boot/dts/starfive/jh7100-common.dtsi
create mode 100644 arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
--
2.37.2
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 1/3] dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board
2022-09-01 22:42 ` Cristian Ciocaltea
@ 2022-09-01 22:42 ` Cristian Ciocaltea
-1 siblings, 0 replies; 14+ messages in thread
From: Cristian Ciocaltea @ 2022-09-01 22:42 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Michael Zhu, Drew Fustini, Emil Renner Berthing
Cc: devicetree, linux-riscv, linux-kernel, kernel
Document the compatibles for StarFive VisionFive V1 SBC [1].
The board is based on the StarFive JH7100 SoC.
[1] https://github.com/starfive-tech/VisionFive
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
Documentation/devicetree/bindings/riscv/starfive.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml
index 5b36243fd674..9c948b379c8f 100644
--- a/Documentation/devicetree/bindings/riscv/starfive.yaml
+++ b/Documentation/devicetree/bindings/riscv/starfive.yaml
@@ -21,6 +21,9 @@ properties:
- items:
- const: beagle,beaglev-starlight-jh7100-r0
- const: starfive,jh7100
+ - items:
+ - const: starfive,visionfive-v1
+ - const: starfive,jh7100
additionalProperties: true
--
2.37.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 1/3] dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board
@ 2022-09-01 22:42 ` Cristian Ciocaltea
0 siblings, 0 replies; 14+ messages in thread
From: Cristian Ciocaltea @ 2022-09-01 22:42 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Michael Zhu, Drew Fustini, Emil Renner Berthing
Cc: devicetree, linux-riscv, linux-kernel, kernel
Document the compatibles for StarFive VisionFive V1 SBC [1].
The board is based on the StarFive JH7100 SoC.
[1] https://github.com/starfive-tech/VisionFive
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
Documentation/devicetree/bindings/riscv/starfive.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml
index 5b36243fd674..9c948b379c8f 100644
--- a/Documentation/devicetree/bindings/riscv/starfive.yaml
+++ b/Documentation/devicetree/bindings/riscv/starfive.yaml
@@ -21,6 +21,9 @@ properties:
- items:
- const: beagle,beaglev-starlight-jh7100-r0
- const: starfive,jh7100
+ - items:
+ - const: starfive,visionfive-v1
+ - const: starfive,jh7100
additionalProperties: true
--
2.37.2
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/3] riscv: dts: starfive: Add common DT for JH7100 based boards
2022-09-01 22:42 ` Cristian Ciocaltea
@ 2022-09-01 22:42 ` Cristian Ciocaltea
-1 siblings, 0 replies; 14+ messages in thread
From: Cristian Ciocaltea @ 2022-09-01 22:42 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Michael Zhu, Drew Fustini, Emil Renner Berthing
Cc: devicetree, linux-riscv, linux-kernel, kernel
In preparation for adding initial device tree support for the StarFive
VisionFive board, which is similar with BeagleV Starlight, move most
of the content from jh7100-beaglev-starlight.dts to a new file, to be
shared between the two boards.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
.../dts/starfive/jh7100-beaglev-starlight.dts | 153 +----------------
.../boot/dts/starfive/jh7100-common.dtsi | 161 ++++++++++++++++++
2 files changed, 162 insertions(+), 152 deletions(-)
create mode 100644 arch/riscv/boot/dts/starfive/jh7100-common.dtsi
diff --git a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
index c9af67f7a0d2..7cda3a89020a 100644
--- a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
+++ b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
@@ -5,160 +5,9 @@
*/
/dts-v1/;
-#include "jh7100.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/pinctrl-starfive.h>
+#include "jh7100-common.dtsi"
/ {
model = "BeagleV Starlight Beta";
compatible = "beagle,beaglev-starlight-jh7100-r0", "starfive,jh7100";
-
- aliases {
- serial0 = &uart3;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- cpus {
- timebase-frequency = <6250000>;
- };
-
- memory@80000000 {
- device_type = "memory";
- reg = <0x0 0x80000000 0x2 0x0>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-ack {
- gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_HEARTBEAT;
- linux,default-trigger = "heartbeat";
- label = "ack";
- };
- };
-};
-
-&gpio {
- i2c0_pins: i2c0-0 {
- i2c-pins {
- pinmux = <GPIOMUX(62, GPO_LOW,
- GPO_I2C0_PAD_SCK_OEN,
- GPI_I2C0_PAD_SCK_IN)>,
- <GPIOMUX(61, GPO_LOW,
- GPO_I2C0_PAD_SDA_OEN,
- GPI_I2C0_PAD_SDA_IN)>;
- bias-disable; /* external pull-up */
- input-enable;
- input-schmitt-enable;
- };
- };
-
- i2c1_pins: i2c1-0 {
- i2c-pins {
- pinmux = <GPIOMUX(47, GPO_LOW,
- GPO_I2C1_PAD_SCK_OEN,
- GPI_I2C1_PAD_SCK_IN)>,
- <GPIOMUX(48, GPO_LOW,
- GPO_I2C1_PAD_SDA_OEN,
- GPI_I2C1_PAD_SDA_IN)>;
- bias-pull-up;
- input-enable;
- input-schmitt-enable;
- };
- };
-
- i2c2_pins: i2c2-0 {
- i2c-pins {
- pinmux = <GPIOMUX(60, GPO_LOW,
- GPO_I2C2_PAD_SCK_OEN,
- GPI_I2C2_PAD_SCK_IN)>,
- <GPIOMUX(59, GPO_LOW,
- GPO_I2C2_PAD_SDA_OEN,
- GPI_I2C2_PAD_SDA_IN)>;
- bias-disable; /* external pull-up */
- input-enable;
- input-schmitt-enable;
- };
- };
-
- uart3_pins: uart3-0 {
- rx-pins {
- pinmux = <GPIOMUX(13, GPO_LOW, GPO_DISABLE,
- GPI_UART3_PAD_SIN)>;
- bias-pull-up;
- drive-strength = <14>;
- input-enable;
- input-schmitt-enable;
- slew-rate = <0>;
- };
- tx-pins {
- pinmux = <GPIOMUX(14, GPO_UART3_PAD_SOUT,
- GPO_ENABLE, GPI_NONE)>;
- bias-disable;
- drive-strength = <35>;
- input-disable;
- input-schmitt-disable;
- slew-rate = <0>;
- };
- };
-};
-
-&i2c0 {
- clock-frequency = <100000>;
- i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <500>;
- i2c-scl-falling-time-ns = <500>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins>;
- status = "okay";
-
- pmic@5e {
- compatible = "ti,tps65086";
- reg = <0x5e>;
- gpio-controller;
- #gpio-cells = <2>;
-
- regulators {
- };
- };
-};
-
-&i2c1 {
- clock-frequency = <400000>;
- i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <100>;
- i2c-scl-falling-time-ns = <100>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins>;
- status = "okay";
-};
-
-&i2c2 {
- clock-frequency = <100000>;
- i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <500>;
- i2c-scl-falling-time-ns = <500>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins>;
- status = "okay";
-};
-
-&osc_sys {
- clock-frequency = <25000000>;
-};
-
-&osc_aud {
- clock-frequency = <27000000>;
-};
-
-&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart3_pins>;
- status = "okay";
};
diff --git a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi
new file mode 100644
index 000000000000..6a66abacb612
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi
@@ -0,0 +1,161 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2021 StarFive Technology Co., Ltd.
+ * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
+ */
+
+/dts-v1/;
+#include "jh7100.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/pinctrl-starfive.h>
+
+/ {
+ aliases {
+ serial0 = &uart3;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ cpus {
+ timebase-frequency = <6250000>;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x2 0x0>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-ack {
+ gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_HEARTBEAT;
+ linux,default-trigger = "heartbeat";
+ label = "ack";
+ };
+ };
+};
+
+&gpio {
+ i2c0_pins: i2c0-0 {
+ i2c-pins {
+ pinmux = <GPIOMUX(62, GPO_LOW,
+ GPO_I2C0_PAD_SCK_OEN,
+ GPI_I2C0_PAD_SCK_IN)>,
+ <GPIOMUX(61, GPO_LOW,
+ GPO_I2C0_PAD_SDA_OEN,
+ GPI_I2C0_PAD_SDA_IN)>;
+ bias-disable; /* external pull-up */
+ input-enable;
+ input-schmitt-enable;
+ };
+ };
+
+ i2c1_pins: i2c1-0 {
+ i2c-pins {
+ pinmux = <GPIOMUX(47, GPO_LOW,
+ GPO_I2C1_PAD_SCK_OEN,
+ GPI_I2C1_PAD_SCK_IN)>,
+ <GPIOMUX(48, GPO_LOW,
+ GPO_I2C1_PAD_SDA_OEN,
+ GPI_I2C1_PAD_SDA_IN)>;
+ bias-pull-up;
+ input-enable;
+ input-schmitt-enable;
+ };
+ };
+
+ i2c2_pins: i2c2-0 {
+ i2c-pins {
+ pinmux = <GPIOMUX(60, GPO_LOW,
+ GPO_I2C2_PAD_SCK_OEN,
+ GPI_I2C2_PAD_SCK_IN)>,
+ <GPIOMUX(59, GPO_LOW,
+ GPO_I2C2_PAD_SDA_OEN,
+ GPI_I2C2_PAD_SDA_IN)>;
+ bias-disable; /* external pull-up */
+ input-enable;
+ input-schmitt-enable;
+ };
+ };
+
+ uart3_pins: uart3-0 {
+ rx-pins {
+ pinmux = <GPIOMUX(13, GPO_LOW, GPO_DISABLE,
+ GPI_UART3_PAD_SIN)>;
+ bias-pull-up;
+ drive-strength = <14>;
+ input-enable;
+ input-schmitt-enable;
+ slew-rate = <0>;
+ };
+ tx-pins {
+ pinmux = <GPIOMUX(14, GPO_UART3_PAD_SOUT,
+ GPO_ENABLE, GPI_NONE)>;
+ bias-disable;
+ drive-strength = <35>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+ };
+};
+
+&i2c0 {
+ clock-frequency = <100000>;
+ i2c-sda-hold-time-ns = <300>;
+ i2c-sda-falling-time-ns = <500>;
+ i2c-scl-falling-time-ns = <500>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+
+ pmic@5e {
+ compatible = "ti,tps65086";
+ reg = <0x5e>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ regulators {
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <400000>;
+ i2c-sda-hold-time-ns = <300>;
+ i2c-sda-falling-time-ns = <100>;
+ i2c-scl-falling-time-ns = <100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ i2c-sda-hold-time-ns = <300>;
+ i2c-sda-falling-time-ns = <500>;
+ i2c-scl-falling-time-ns = <500>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+ status = "okay";
+};
+
+&osc_sys {
+ clock-frequency = <25000000>;
+};
+
+&osc_aud {
+ clock-frequency = <27000000>;
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+ status = "okay";
+};
--
2.37.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/3] riscv: dts: starfive: Add common DT for JH7100 based boards
@ 2022-09-01 22:42 ` Cristian Ciocaltea
0 siblings, 0 replies; 14+ messages in thread
From: Cristian Ciocaltea @ 2022-09-01 22:42 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Michael Zhu, Drew Fustini, Emil Renner Berthing
Cc: devicetree, linux-riscv, linux-kernel, kernel
In preparation for adding initial device tree support for the StarFive
VisionFive board, which is similar with BeagleV Starlight, move most
of the content from jh7100-beaglev-starlight.dts to a new file, to be
shared between the two boards.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
.../dts/starfive/jh7100-beaglev-starlight.dts | 153 +----------------
.../boot/dts/starfive/jh7100-common.dtsi | 161 ++++++++++++++++++
2 files changed, 162 insertions(+), 152 deletions(-)
create mode 100644 arch/riscv/boot/dts/starfive/jh7100-common.dtsi
diff --git a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
index c9af67f7a0d2..7cda3a89020a 100644
--- a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
+++ b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
@@ -5,160 +5,9 @@
*/
/dts-v1/;
-#include "jh7100.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/pinctrl-starfive.h>
+#include "jh7100-common.dtsi"
/ {
model = "BeagleV Starlight Beta";
compatible = "beagle,beaglev-starlight-jh7100-r0", "starfive,jh7100";
-
- aliases {
- serial0 = &uart3;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- cpus {
- timebase-frequency = <6250000>;
- };
-
- memory@80000000 {
- device_type = "memory";
- reg = <0x0 0x80000000 0x2 0x0>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-ack {
- gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_HEARTBEAT;
- linux,default-trigger = "heartbeat";
- label = "ack";
- };
- };
-};
-
-&gpio {
- i2c0_pins: i2c0-0 {
- i2c-pins {
- pinmux = <GPIOMUX(62, GPO_LOW,
- GPO_I2C0_PAD_SCK_OEN,
- GPI_I2C0_PAD_SCK_IN)>,
- <GPIOMUX(61, GPO_LOW,
- GPO_I2C0_PAD_SDA_OEN,
- GPI_I2C0_PAD_SDA_IN)>;
- bias-disable; /* external pull-up */
- input-enable;
- input-schmitt-enable;
- };
- };
-
- i2c1_pins: i2c1-0 {
- i2c-pins {
- pinmux = <GPIOMUX(47, GPO_LOW,
- GPO_I2C1_PAD_SCK_OEN,
- GPI_I2C1_PAD_SCK_IN)>,
- <GPIOMUX(48, GPO_LOW,
- GPO_I2C1_PAD_SDA_OEN,
- GPI_I2C1_PAD_SDA_IN)>;
- bias-pull-up;
- input-enable;
- input-schmitt-enable;
- };
- };
-
- i2c2_pins: i2c2-0 {
- i2c-pins {
- pinmux = <GPIOMUX(60, GPO_LOW,
- GPO_I2C2_PAD_SCK_OEN,
- GPI_I2C2_PAD_SCK_IN)>,
- <GPIOMUX(59, GPO_LOW,
- GPO_I2C2_PAD_SDA_OEN,
- GPI_I2C2_PAD_SDA_IN)>;
- bias-disable; /* external pull-up */
- input-enable;
- input-schmitt-enable;
- };
- };
-
- uart3_pins: uart3-0 {
- rx-pins {
- pinmux = <GPIOMUX(13, GPO_LOW, GPO_DISABLE,
- GPI_UART3_PAD_SIN)>;
- bias-pull-up;
- drive-strength = <14>;
- input-enable;
- input-schmitt-enable;
- slew-rate = <0>;
- };
- tx-pins {
- pinmux = <GPIOMUX(14, GPO_UART3_PAD_SOUT,
- GPO_ENABLE, GPI_NONE)>;
- bias-disable;
- drive-strength = <35>;
- input-disable;
- input-schmitt-disable;
- slew-rate = <0>;
- };
- };
-};
-
-&i2c0 {
- clock-frequency = <100000>;
- i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <500>;
- i2c-scl-falling-time-ns = <500>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins>;
- status = "okay";
-
- pmic@5e {
- compatible = "ti,tps65086";
- reg = <0x5e>;
- gpio-controller;
- #gpio-cells = <2>;
-
- regulators {
- };
- };
-};
-
-&i2c1 {
- clock-frequency = <400000>;
- i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <100>;
- i2c-scl-falling-time-ns = <100>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins>;
- status = "okay";
-};
-
-&i2c2 {
- clock-frequency = <100000>;
- i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <500>;
- i2c-scl-falling-time-ns = <500>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins>;
- status = "okay";
-};
-
-&osc_sys {
- clock-frequency = <25000000>;
-};
-
-&osc_aud {
- clock-frequency = <27000000>;
-};
-
-&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart3_pins>;
- status = "okay";
};
diff --git a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi
new file mode 100644
index 000000000000..6a66abacb612
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi
@@ -0,0 +1,161 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2021 StarFive Technology Co., Ltd.
+ * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
+ */
+
+/dts-v1/;
+#include "jh7100.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/pinctrl-starfive.h>
+
+/ {
+ aliases {
+ serial0 = &uart3;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ cpus {
+ timebase-frequency = <6250000>;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x2 0x0>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-ack {
+ gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_HEARTBEAT;
+ linux,default-trigger = "heartbeat";
+ label = "ack";
+ };
+ };
+};
+
+&gpio {
+ i2c0_pins: i2c0-0 {
+ i2c-pins {
+ pinmux = <GPIOMUX(62, GPO_LOW,
+ GPO_I2C0_PAD_SCK_OEN,
+ GPI_I2C0_PAD_SCK_IN)>,
+ <GPIOMUX(61, GPO_LOW,
+ GPO_I2C0_PAD_SDA_OEN,
+ GPI_I2C0_PAD_SDA_IN)>;
+ bias-disable; /* external pull-up */
+ input-enable;
+ input-schmitt-enable;
+ };
+ };
+
+ i2c1_pins: i2c1-0 {
+ i2c-pins {
+ pinmux = <GPIOMUX(47, GPO_LOW,
+ GPO_I2C1_PAD_SCK_OEN,
+ GPI_I2C1_PAD_SCK_IN)>,
+ <GPIOMUX(48, GPO_LOW,
+ GPO_I2C1_PAD_SDA_OEN,
+ GPI_I2C1_PAD_SDA_IN)>;
+ bias-pull-up;
+ input-enable;
+ input-schmitt-enable;
+ };
+ };
+
+ i2c2_pins: i2c2-0 {
+ i2c-pins {
+ pinmux = <GPIOMUX(60, GPO_LOW,
+ GPO_I2C2_PAD_SCK_OEN,
+ GPI_I2C2_PAD_SCK_IN)>,
+ <GPIOMUX(59, GPO_LOW,
+ GPO_I2C2_PAD_SDA_OEN,
+ GPI_I2C2_PAD_SDA_IN)>;
+ bias-disable; /* external pull-up */
+ input-enable;
+ input-schmitt-enable;
+ };
+ };
+
+ uart3_pins: uart3-0 {
+ rx-pins {
+ pinmux = <GPIOMUX(13, GPO_LOW, GPO_DISABLE,
+ GPI_UART3_PAD_SIN)>;
+ bias-pull-up;
+ drive-strength = <14>;
+ input-enable;
+ input-schmitt-enable;
+ slew-rate = <0>;
+ };
+ tx-pins {
+ pinmux = <GPIOMUX(14, GPO_UART3_PAD_SOUT,
+ GPO_ENABLE, GPI_NONE)>;
+ bias-disable;
+ drive-strength = <35>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+ };
+};
+
+&i2c0 {
+ clock-frequency = <100000>;
+ i2c-sda-hold-time-ns = <300>;
+ i2c-sda-falling-time-ns = <500>;
+ i2c-scl-falling-time-ns = <500>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+
+ pmic@5e {
+ compatible = "ti,tps65086";
+ reg = <0x5e>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ regulators {
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <400000>;
+ i2c-sda-hold-time-ns = <300>;
+ i2c-sda-falling-time-ns = <100>;
+ i2c-scl-falling-time-ns = <100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ i2c-sda-hold-time-ns = <300>;
+ i2c-sda-falling-time-ns = <500>;
+ i2c-scl-falling-time-ns = <500>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+ status = "okay";
+};
+
+&osc_sys {
+ clock-frequency = <25000000>;
+};
+
+&osc_aud {
+ clock-frequency = <27000000>;
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+ status = "okay";
+};
--
2.37.2
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 3/3] riscv: dts: starfive: Add StarFive VisionFive V1 device tree
2022-09-01 22:42 ` Cristian Ciocaltea
@ 2022-09-01 22:42 ` Cristian Ciocaltea
-1 siblings, 0 replies; 14+ messages in thread
From: Cristian Ciocaltea @ 2022-09-01 22:42 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Michael Zhu, Drew Fustini, Emil Renner Berthing
Cc: devicetree, linux-riscv, linux-kernel, kernel
Add initial device tree for the StarFive VisionFive V1 SBC [1], which
is similar with the already supported BeagleV Starlight Beta board,
both being based on the StarFive JH7100 SoC.
[1] https://github.com/starfive-tech/VisionFive
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
arch/riscv/boot/dts/starfive/Makefile | 2 +-
.../jh7100-starfive-visionfive-v1.dts | 20 +++++++++++++++++++
2 files changed, 21 insertions(+), 1 deletion(-)
create mode 100644 arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
index 0ea1bc15ab30..039c143cba33 100644
--- a/arch/riscv/boot/dts/starfive/Makefile
+++ b/arch/riscv/boot/dts/starfive/Makefile
@@ -1,2 +1,2 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb
+dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
diff --git a/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
new file mode 100644
index 000000000000..e82af72f1aaf
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2021 StarFive Technology Co., Ltd.
+ * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
+ */
+
+/dts-v1/;
+#include "jh7100-common.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "StarFive VisionFive V1";
+ compatible = "starfive,visionfive-v1", "starfive,jh7100";
+
+ gpio-restart {
+ compatible = "gpio-restart";
+ gpios = <&gpio 63 GPIO_ACTIVE_HIGH>;
+ priority = <224>;
+ };
+};
--
2.37.2
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 3/3] riscv: dts: starfive: Add StarFive VisionFive V1 device tree
@ 2022-09-01 22:42 ` Cristian Ciocaltea
0 siblings, 0 replies; 14+ messages in thread
From: Cristian Ciocaltea @ 2022-09-01 22:42 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Michael Zhu, Drew Fustini, Emil Renner Berthing
Cc: devicetree, linux-riscv, linux-kernel, kernel
Add initial device tree for the StarFive VisionFive V1 SBC [1], which
is similar with the already supported BeagleV Starlight Beta board,
both being based on the StarFive JH7100 SoC.
[1] https://github.com/starfive-tech/VisionFive
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
arch/riscv/boot/dts/starfive/Makefile | 2 +-
.../jh7100-starfive-visionfive-v1.dts | 20 +++++++++++++++++++
2 files changed, 21 insertions(+), 1 deletion(-)
create mode 100644 arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
index 0ea1bc15ab30..039c143cba33 100644
--- a/arch/riscv/boot/dts/starfive/Makefile
+++ b/arch/riscv/boot/dts/starfive/Makefile
@@ -1,2 +1,2 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb
+dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
diff --git a/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
new file mode 100644
index 000000000000..e82af72f1aaf
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2021 StarFive Technology Co., Ltd.
+ * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
+ */
+
+/dts-v1/;
+#include "jh7100-common.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "StarFive VisionFive V1";
+ compatible = "starfive,visionfive-v1", "starfive,jh7100";
+
+ gpio-restart {
+ compatible = "gpio-restart";
+ gpios = <&gpio 63 GPIO_ACTIVE_HIGH>;
+ priority = <224>;
+ };
+};
--
2.37.2
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board
2022-09-01 22:42 ` Cristian Ciocaltea
@ 2022-09-02 5:41 ` Conor.Dooley
-1 siblings, 0 replies; 14+ messages in thread
From: Conor.Dooley @ 2022-09-02 5:41 UTC (permalink / raw)
To: cristian.ciocaltea, robh+dt, krzysztof.kozlowski+dt,
paul.walmsley, palmer, aou, michael.zhu, drew, kernel
Cc: devicetree, linux-riscv, linux-kernel, kernel
Hey Cristian,
On 01/09/2022 23:42, Cristian Ciocaltea wrote:
> [You don't often get email from cristian.ciocaltea@collabora.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Document the compatibles for StarFive VisionFive V1 SBC [1].
> The board is based on the StarFive JH7100 SoC.
>
> [1] https://github.com/starfive-tech/VisionFive
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---
> Documentation/devicetree/bindings/riscv/starfive.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml
> index 5b36243fd674..9c948b379c8f 100644
> --- a/Documentation/devicetree/bindings/riscv/starfive.yaml
> +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml
> @@ -21,6 +21,9 @@ properties:
> - items:
> - const: beagle,beaglev-starlight-jh7100-r0
Can you use an enum here please?
> - const: starfive,jh7100
> + - items:
> + - const: starfive,visionfive-v1
> + - const: starfive,jh7100
>
> additionalProperties: true
>
> --
> 2.37.2
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board
@ 2022-09-02 5:41 ` Conor.Dooley
0 siblings, 0 replies; 14+ messages in thread
From: Conor.Dooley @ 2022-09-02 5:41 UTC (permalink / raw)
To: cristian.ciocaltea, robh+dt, krzysztof.kozlowski+dt,
paul.walmsley, palmer, aou, michael.zhu, drew, kernel
Cc: devicetree, linux-riscv, linux-kernel, kernel
Hey Cristian,
On 01/09/2022 23:42, Cristian Ciocaltea wrote:
> [You don't often get email from cristian.ciocaltea@collabora.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Document the compatibles for StarFive VisionFive V1 SBC [1].
> The board is based on the StarFive JH7100 SoC.
>
> [1] https://github.com/starfive-tech/VisionFive
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---
> Documentation/devicetree/bindings/riscv/starfive.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml
> index 5b36243fd674..9c948b379c8f 100644
> --- a/Documentation/devicetree/bindings/riscv/starfive.yaml
> +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml
> @@ -21,6 +21,9 @@ properties:
> - items:
> - const: beagle,beaglev-starlight-jh7100-r0
Can you use an enum here please?
> - const: starfive,jh7100
> + - items:
> + - const: starfive,visionfive-v1
> + - const: starfive,jh7100
>
> additionalProperties: true
>
> --
> 2.37.2
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/3] Enable initial support for StarFive VisionFive V1 SBC
2022-09-01 22:42 ` Cristian Ciocaltea
@ 2022-09-02 6:27 ` Conor.Dooley
-1 siblings, 0 replies; 14+ messages in thread
From: Conor.Dooley @ 2022-09-02 6:27 UTC (permalink / raw)
To: cristian.ciocaltea, robh+dt, krzysztof.kozlowski+dt,
paul.walmsley, palmer, aou, michael.zhu, drew, kernel
Cc: devicetree, linux-riscv, linux-kernel, kernel
On 01/09/2022 23:42, Cristian Ciocaltea wrote:
> [You don't often get email from cristian.ciocaltea@collabora.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> The StarFive VisionFive V1 SBC [1] is similar with the already supported
> BeagleV Starlight Beta board, both being based on the StarFive JH7100 SoC.
>
> In addition to documenting the necessary compatibles, this patch series
> moves most of the content from jh7100-beaglev-starlight.dts to a new file
> jh7100-common.dtsi, to be shared between the two boards.
>
> No other changes are required in order to successfully boot the board.
Gave it a go this morning, dts stuff itself looks good to me. No new
warnings, although that's to be expected, & boots fine.
I know that most jn7100 stuff is not really wanted upstream, but I'd
say that the minimal vision5 dts is an exception to that, so with the
one comment on patch 1 resolved:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
>
> [1] https://github.com/starfive-tech/VisionFive
>
> Cristian Ciocaltea (3):
> dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board
> riscv: dts: starfive: Add common DT for JH7100 based boards
> riscv: dts: starfive: Add StarFive VisionFive V1 device tree
>
> .../devicetree/bindings/riscv/starfive.yaml | 3 +
> arch/riscv/boot/dts/starfive/Makefile | 2 +-
> .../dts/starfive/jh7100-beaglev-starlight.dts | 153 +----------------
> .../boot/dts/starfive/jh7100-common.dtsi | 161 ++++++++++++++++++
> .../jh7100-starfive-visionfive-v1.dts | 20 +++
> 5 files changed, 186 insertions(+), 153 deletions(-)
> create mode 100644 arch/riscv/boot/dts/starfive/jh7100-common.dtsi
> create mode 100644 arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
>
> --
> 2.37.2
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/3] Enable initial support for StarFive VisionFive V1 SBC
@ 2022-09-02 6:27 ` Conor.Dooley
0 siblings, 0 replies; 14+ messages in thread
From: Conor.Dooley @ 2022-09-02 6:27 UTC (permalink / raw)
To: cristian.ciocaltea, robh+dt, krzysztof.kozlowski+dt,
paul.walmsley, palmer, aou, michael.zhu, drew, kernel
Cc: devicetree, linux-riscv, linux-kernel, kernel
On 01/09/2022 23:42, Cristian Ciocaltea wrote:
> [You don't often get email from cristian.ciocaltea@collabora.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> The StarFive VisionFive V1 SBC [1] is similar with the already supported
> BeagleV Starlight Beta board, both being based on the StarFive JH7100 SoC.
>
> In addition to documenting the necessary compatibles, this patch series
> moves most of the content from jh7100-beaglev-starlight.dts to a new file
> jh7100-common.dtsi, to be shared between the two boards.
>
> No other changes are required in order to successfully boot the board.
Gave it a go this morning, dts stuff itself looks good to me. No new
warnings, although that's to be expected, & boots fine.
I know that most jn7100 stuff is not really wanted upstream, but I'd
say that the minimal vision5 dts is an exception to that, so with the
one comment on patch 1 resolved:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
>
> [1] https://github.com/starfive-tech/VisionFive
>
> Cristian Ciocaltea (3):
> dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board
> riscv: dts: starfive: Add common DT for JH7100 based boards
> riscv: dts: starfive: Add StarFive VisionFive V1 device tree
>
> .../devicetree/bindings/riscv/starfive.yaml | 3 +
> arch/riscv/boot/dts/starfive/Makefile | 2 +-
> .../dts/starfive/jh7100-beaglev-starlight.dts | 153 +----------------
> .../boot/dts/starfive/jh7100-common.dtsi | 161 ++++++++++++++++++
> .../jh7100-starfive-visionfive-v1.dts | 20 +++
> 5 files changed, 186 insertions(+), 153 deletions(-)
> create mode 100644 arch/riscv/boot/dts/starfive/jh7100-common.dtsi
> create mode 100644 arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
>
> --
> 2.37.2
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/3] Enable initial support for StarFive VisionFive V1 SBC
2022-09-02 6:27 ` Conor.Dooley
@ 2022-09-02 10:12 ` Cristian Ciocaltea
-1 siblings, 0 replies; 14+ messages in thread
From: Cristian Ciocaltea @ 2022-09-02 10:12 UTC (permalink / raw)
To: Conor.Dooley, robh+dt, krzysztof.kozlowski+dt, paul.walmsley,
palmer, aou, michael.zhu, drew, kernel
Cc: devicetree, linux-riscv, linux-kernel, kernel
On 9/2/22 09:27, Conor.Dooley@microchip.com wrote:
> On 01/09/2022 23:42, Cristian Ciocaltea wrote:
>> [You don't often get email from cristian.ciocaltea@collabora.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>>
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> The StarFive VisionFive V1 SBC [1] is similar with the already supported
>> BeagleV Starlight Beta board, both being based on the StarFive JH7100 SoC.
>>
>> In addition to documenting the necessary compatibles, this patch series
>> moves most of the content from jh7100-beaglev-starlight.dts to a new file
>> jh7100-common.dtsi, to be shared between the two boards.
>>
>> No other changes are required in order to successfully boot the board.
>
> Gave it a go this morning, dts stuff itself looks good to me. No new
> warnings, although that's to be expected, & boots fine.
>
> I know that most jn7100 stuff is not really wanted upstream, but I'd
> say that the minimal vision5 dts is an exception to that, so with the
> one comment on patch 1 resolved:
>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks for the quick review, I have submitted v2:
https://lore.kernel.org/all/20220902100806.2378543-1-cristian.ciocaltea@collabora.com/
Regards,
Cristian
> Thanks,
> Conor.
>
>>
>> [1] https://github.com/starfive-tech/VisionFive
>>
>> Cristian Ciocaltea (3):
>> dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board
>> riscv: dts: starfive: Add common DT for JH7100 based boards
>> riscv: dts: starfive: Add StarFive VisionFive V1 device tree
>>
>> .../devicetree/bindings/riscv/starfive.yaml | 3 +
>> arch/riscv/boot/dts/starfive/Makefile | 2 +-
>> .../dts/starfive/jh7100-beaglev-starlight.dts | 153 +----------------
>> .../boot/dts/starfive/jh7100-common.dtsi | 161 ++++++++++++++++++
>> .../jh7100-starfive-visionfive-v1.dts | 20 +++
>> 5 files changed, 186 insertions(+), 153 deletions(-)
>> create mode 100644 arch/riscv/boot/dts/starfive/jh7100-common.dtsi
>> create mode 100644 arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
>>
>> --
>> 2.37.2
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/3] Enable initial support for StarFive VisionFive V1 SBC
@ 2022-09-02 10:12 ` Cristian Ciocaltea
0 siblings, 0 replies; 14+ messages in thread
From: Cristian Ciocaltea @ 2022-09-02 10:12 UTC (permalink / raw)
To: Conor.Dooley, robh+dt, krzysztof.kozlowski+dt, paul.walmsley,
palmer, aou, michael.zhu, drew, kernel
Cc: devicetree, linux-riscv, linux-kernel, kernel
On 9/2/22 09:27, Conor.Dooley@microchip.com wrote:
> On 01/09/2022 23:42, Cristian Ciocaltea wrote:
>> [You don't often get email from cristian.ciocaltea@collabora.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>>
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> The StarFive VisionFive V1 SBC [1] is similar with the already supported
>> BeagleV Starlight Beta board, both being based on the StarFive JH7100 SoC.
>>
>> In addition to documenting the necessary compatibles, this patch series
>> moves most of the content from jh7100-beaglev-starlight.dts to a new file
>> jh7100-common.dtsi, to be shared between the two boards.
>>
>> No other changes are required in order to successfully boot the board.
>
> Gave it a go this morning, dts stuff itself looks good to me. No new
> warnings, although that's to be expected, & boots fine.
>
> I know that most jn7100 stuff is not really wanted upstream, but I'd
> say that the minimal vision5 dts is an exception to that, so with the
> one comment on patch 1 resolved:
>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks for the quick review, I have submitted v2:
https://lore.kernel.org/all/20220902100806.2378543-1-cristian.ciocaltea@collabora.com/
Regards,
Cristian
> Thanks,
> Conor.
>
>>
>> [1] https://github.com/starfive-tech/VisionFive
>>
>> Cristian Ciocaltea (3):
>> dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board
>> riscv: dts: starfive: Add common DT for JH7100 based boards
>> riscv: dts: starfive: Add StarFive VisionFive V1 device tree
>>
>> .../devicetree/bindings/riscv/starfive.yaml | 3 +
>> arch/riscv/boot/dts/starfive/Makefile | 2 +-
>> .../dts/starfive/jh7100-beaglev-starlight.dts | 153 +----------------
>> .../boot/dts/starfive/jh7100-common.dtsi | 161 ++++++++++++++++++
>> .../jh7100-starfive-visionfive-v1.dts | 20 +++
>> 5 files changed, 186 insertions(+), 153 deletions(-)
>> create mode 100644 arch/riscv/boot/dts/starfive/jh7100-common.dtsi
>> create mode 100644 arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
>>
>> --
>> 2.37.2
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2022-09-02 10:13 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-01 22:42 [PATCH 0/3] Enable initial support for StarFive VisionFive V1 SBC Cristian Ciocaltea
2022-09-01 22:42 ` Cristian Ciocaltea
2022-09-01 22:42 ` [PATCH 1/3] dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board Cristian Ciocaltea
2022-09-01 22:42 ` Cristian Ciocaltea
2022-09-02 5:41 ` Conor.Dooley
2022-09-02 5:41 ` Conor.Dooley
2022-09-01 22:42 ` [PATCH 2/3] riscv: dts: starfive: Add common DT for JH7100 based boards Cristian Ciocaltea
2022-09-01 22:42 ` Cristian Ciocaltea
2022-09-01 22:42 ` [PATCH 3/3] riscv: dts: starfive: Add StarFive VisionFive V1 device tree Cristian Ciocaltea
2022-09-01 22:42 ` Cristian Ciocaltea
2022-09-02 6:27 ` [PATCH 0/3] Enable initial support for StarFive VisionFive V1 SBC Conor.Dooley
2022-09-02 6:27 ` Conor.Dooley
2022-09-02 10:12 ` Cristian Ciocaltea
2022-09-02 10:12 ` Cristian Ciocaltea
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