From: Sergiu Moga <sergiu.moga@microchip.com> To: <lee@kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <claudiu.beznea@microchip.com>, <radu_nicolae.pirea@upb.ro>, <richard.genoud@gmail.com>, <gregkh@linuxfoundation.org>, <broonie@kernel.org>, <mturquette@baylibre.com>, <sboyd@kernel.org>, <jirislaby@kernel.org>, <sergiu.moga@microchip.com>, <admin@hifiphile.com>, <kavyasree.kotagiri@microchip.com>, <tudor.ambarus@microchip.com> Cc: <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-serial@vger.kernel.org>, <linux-clk@vger.kernel.org> Subject: [PATCH v3 12/14] tty: serial: atmel: Only divide Clock Divisor if the IP is USART Date: Tue, 13 Sep 2022 17:22:04 +0300 [thread overview] Message-ID: <20220913142205.162399-13-sergiu.moga@microchip.com> (raw) In-Reply-To: <20220913142205.162399-1-sergiu.moga@microchip.com> Make sure that the driver only divides the clock divisor if the IP handled at that point is USART, since UART IP's do not support implicit peripheral clock division. Instead, in the case of UART, go with the highest possible clock divisor. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> --- v1 -> v2: - Nothing, this patch was not here before and is mainly meant as both cleanup and as a way to introduce a new field into struct atmel_uart_port that will be used by the last patch to diferentiate between USART and UART regarding the location of the Baudrate Clock Source bitmask. v2 -> v3: - Use ATMEL_US_CD instead of 65535 - Previously [PATCH 10] drivers/tty/serial/atmel_serial.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index ab4a9dfae07d..ad7483230090 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -150,6 +150,7 @@ struct atmel_uart_port { u32 rts_low; bool ms_irq_enabled; u32 rtor; /* address of receiver timeout register if it exists */ + bool is_usart; bool has_frac_baudrate; bool has_hw_timer; struct timer_list uart_timer; @@ -1825,6 +1826,7 @@ static void atmel_get_ip_name(struct uart_port *port) */ atmel_port->has_frac_baudrate = false; atmel_port->has_hw_timer = false; + atmel_port->is_usart = false; if (name == new_uart) { dev_dbg(port->dev, "Uart with hw timer"); @@ -1834,6 +1836,7 @@ static void atmel_get_ip_name(struct uart_port *port) dev_dbg(port->dev, "Usart\n"); atmel_port->has_frac_baudrate = true; atmel_port->has_hw_timer = true; + atmel_port->is_usart = true; atmel_port->rtor = ATMEL_US_RTOR; version = atmel_uart_readl(port, ATMEL_US_VERSION); switch (version) { @@ -1863,6 +1866,7 @@ static void atmel_get_ip_name(struct uart_port *port) dev_dbg(port->dev, "This version is usart\n"); atmel_port->has_frac_baudrate = true; atmel_port->has_hw_timer = true; + atmel_port->is_usart = true; atmel_port->rtor = ATMEL_US_RTOR; break; case 0x203: @@ -2283,10 +2287,21 @@ static void atmel_set_termios(struct uart_port *port, cd = uart_get_divisor(port, baud); } - if (cd > 65535) { /* BRGR is 16-bit, so switch to slower clock */ + /* + * If the current value of the Clock Divisor surpasses the 16 bit + * ATMEL_US_CD mask and the IP is USART, switch to the Peripheral + * Clock implicitly divided by 8. + * If the IP is UART however, keep the highest possible value for + * the CD and avoid needless division of CD, since UART IP's do not + * support implicit division of the Peripheral Clock. + */ + if (atmel_port->is_usart && cd > ATMEL_US_CD) { cd /= 8; mode |= ATMEL_US_USCLKS_MCK_DIV8; + } else { + cd &= ATMEL_US_CD; } + quot = cd | fp << ATMEL_US_FP_OFFSET; if (!(port->iso7816.flags & SER_ISO7816_ENABLED)) -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Sergiu Moga <sergiu.moga@microchip.com> To: <lee@kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <claudiu.beznea@microchip.com>, <radu_nicolae.pirea@upb.ro>, <richard.genoud@gmail.com>, <gregkh@linuxfoundation.org>, <broonie@kernel.org>, <mturquette@baylibre.com>, <sboyd@kernel.org>, <jirislaby@kernel.org>, <sergiu.moga@microchip.com>, <admin@hifiphile.com>, <kavyasree.kotagiri@microchip.com>, <tudor.ambarus@microchip.com> Cc: <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-serial@vger.kernel.org>, <linux-clk@vger.kernel.org> Subject: [PATCH v3 12/14] tty: serial: atmel: Only divide Clock Divisor if the IP is USART Date: Tue, 13 Sep 2022 17:22:04 +0300 [thread overview] Message-ID: <20220913142205.162399-13-sergiu.moga@microchip.com> (raw) In-Reply-To: <20220913142205.162399-1-sergiu.moga@microchip.com> Make sure that the driver only divides the clock divisor if the IP handled at that point is USART, since UART IP's do not support implicit peripheral clock division. Instead, in the case of UART, go with the highest possible clock divisor. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> --- v1 -> v2: - Nothing, this patch was not here before and is mainly meant as both cleanup and as a way to introduce a new field into struct atmel_uart_port that will be used by the last patch to diferentiate between USART and UART regarding the location of the Baudrate Clock Source bitmask. v2 -> v3: - Use ATMEL_US_CD instead of 65535 - Previously [PATCH 10] drivers/tty/serial/atmel_serial.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index ab4a9dfae07d..ad7483230090 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -150,6 +150,7 @@ struct atmel_uart_port { u32 rts_low; bool ms_irq_enabled; u32 rtor; /* address of receiver timeout register if it exists */ + bool is_usart; bool has_frac_baudrate; bool has_hw_timer; struct timer_list uart_timer; @@ -1825,6 +1826,7 @@ static void atmel_get_ip_name(struct uart_port *port) */ atmel_port->has_frac_baudrate = false; atmel_port->has_hw_timer = false; + atmel_port->is_usart = false; if (name == new_uart) { dev_dbg(port->dev, "Uart with hw timer"); @@ -1834,6 +1836,7 @@ static void atmel_get_ip_name(struct uart_port *port) dev_dbg(port->dev, "Usart\n"); atmel_port->has_frac_baudrate = true; atmel_port->has_hw_timer = true; + atmel_port->is_usart = true; atmel_port->rtor = ATMEL_US_RTOR; version = atmel_uart_readl(port, ATMEL_US_VERSION); switch (version) { @@ -1863,6 +1866,7 @@ static void atmel_get_ip_name(struct uart_port *port) dev_dbg(port->dev, "This version is usart\n"); atmel_port->has_frac_baudrate = true; atmel_port->has_hw_timer = true; + atmel_port->is_usart = true; atmel_port->rtor = ATMEL_US_RTOR; break; case 0x203: @@ -2283,10 +2287,21 @@ static void atmel_set_termios(struct uart_port *port, cd = uart_get_divisor(port, baud); } - if (cd > 65535) { /* BRGR is 16-bit, so switch to slower clock */ + /* + * If the current value of the Clock Divisor surpasses the 16 bit + * ATMEL_US_CD mask and the IP is USART, switch to the Peripheral + * Clock implicitly divided by 8. + * If the IP is UART however, keep the highest possible value for + * the CD and avoid needless division of CD, since UART IP's do not + * support implicit division of the Peripheral Clock. + */ + if (atmel_port->is_usart && cd > ATMEL_US_CD) { cd /= 8; mode |= ATMEL_US_USCLKS_MCK_DIV8; + } else { + cd &= ATMEL_US_CD; } + quot = cd | fp << ATMEL_US_FP_OFFSET; if (!(port->iso7816.flags & SER_ISO7816_ENABLED)) -- 2.34.1
next prev parent reply other threads:[~2022-09-13 14:43 UTC|newest] Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-09-13 14:21 [PATCH v3 00/14] Make atmel serial driver aware of GCLK Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-13 14:21 ` [PATCH v3 01/14] ARM: dts: at91: sama7g5: Swap rx and tx for spi11 Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-16 8:13 ` Claudiu.Beznea 2022-09-16 8:13 ` Claudiu.Beznea 2022-09-13 14:21 ` [PATCH v3 02/14] ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1 Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-16 8:14 ` Claudiu.Beznea 2022-09-16 8:14 ` Claudiu.Beznea 2022-09-13 14:21 ` [PATCH v3 03/14] ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodes Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-16 8:15 ` Claudiu.Beznea 2022-09-16 8:15 ` Claudiu.Beznea 2022-09-13 14:21 ` [PATCH v3 04/14] spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-16 8:15 ` Claudiu.Beznea 2022-09-16 8:15 ` Claudiu.Beznea 2022-09-13 14:21 ` [PATCH v3 05/14] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-13 14:21 ` [PATCH v3 06/14] dt-bindings: serial: atmel,at91-usart: convert to json-schema Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-13 14:28 ` Krzysztof Kozlowski 2022-09-13 14:28 ` Krzysztof Kozlowski 2022-09-13 14:21 ` [PATCH v3 07/14] dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to SAM9X60 Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-13 14:28 ` Krzysztof Kozlowski 2022-09-13 14:28 ` Krzysztof Kozlowski 2022-09-13 14:22 ` [PATCH v3 08/14] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding Sergiu Moga 2022-09-13 14:22 ` Sergiu Moga 2022-09-13 14:29 ` Krzysztof Kozlowski 2022-09-13 14:29 ` Krzysztof Kozlowski 2022-09-13 14:22 ` [PATCH v3 09/14] dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock Sergiu Moga 2022-09-13 14:22 ` Sergiu Moga 2022-09-13 14:29 ` Krzysztof Kozlowski 2022-09-13 14:29 ` Krzysztof Kozlowski 2022-09-13 14:22 ` [PATCH v3 10/14] tty: serial: atmel: Define GCLK as USART baudrate source clock Sergiu Moga 2022-09-13 14:22 ` Sergiu Moga 2022-09-13 14:22 ` [PATCH v3 11/14] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register Sergiu Moga 2022-09-13 14:22 ` Sergiu Moga 2022-09-13 14:22 ` Sergiu Moga [this message] 2022-09-13 14:22 ` [PATCH v3 12/14] tty: serial: atmel: Only divide Clock Divisor if the IP is USART Sergiu Moga 2022-09-14 11:01 ` Ilpo Järvinen 2022-09-14 11:01 ` Ilpo Järvinen 2022-09-14 12:17 ` Sergiu.Moga 2022-09-14 12:17 ` Sergiu.Moga 2022-09-13 14:22 ` [PATCH v3 13/14] clk: at91: sama5d2: Add Generic Clocks for UART/USART Sergiu Moga 2022-09-13 14:22 ` Sergiu Moga 2022-09-16 8:16 ` Claudiu.Beznea 2022-09-16 8:16 ` Claudiu.Beznea 2022-09-13 14:22 ` [PATCH v3 14/14] tty: serial: atmel: Make the driver aware of the existence of GCLK Sergiu Moga 2022-09-13 14:22 ` Sergiu Moga
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