From: Sergiu Moga <sergiu.moga@microchip.com> To: <lee@kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <claudiu.beznea@microchip.com>, <radu_nicolae.pirea@upb.ro>, <richard.genoud@gmail.com>, <gregkh@linuxfoundation.org>, <broonie@kernel.org>, <mturquette@baylibre.com>, <sboyd@kernel.org>, <jirislaby@kernel.org>, <sergiu.moga@microchip.com>, <admin@hifiphile.com>, <kavyasree.kotagiri@microchip.com>, <tudor.ambarus@microchip.com> Cc: <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-serial@vger.kernel.org>, <linux-clk@vger.kernel.org> Subject: [PATCH v3 14/14] tty: serial: atmel: Make the driver aware of the existence of GCLK Date: Tue, 13 Sep 2022 17:22:06 +0300 [thread overview] Message-ID: <20220913142205.162399-15-sergiu.moga@microchip.com> (raw) In-Reply-To: <20220913142205.162399-1-sergiu.moga@microchip.com> Previously, the atmel serial driver did not take into account the possibility of using the more customizable generic clock as its baudrate generator. Unless there is a Fractional Part available to increase accuracy, there is a high chance that we may be able to generate a baudrate closer to the desired one by using the GCLK as the clock source. Now, depending on the error rate between the desired baudrate and the actual baudrate, the serial driver will fallback on the generic clock. The generic clock must be provided in the DT node of the serial that may need a more flexible clock source. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> --- v1 -> v2: - take into account the different placement of the baudrate clock source into the IP's Mode Register (USART vs UART) - don't check for atmel_port->gclk != NULL - use clk_round_rate instead of clk_set_rate + clk_get_rate - remove clk_disable_unprepare from the end of the probe method v2 -> v3: - add `gclk_fail` goto - replace `goto err` with `goto err_clk_disable_unprepare;` drivers/tty/serial/atmel_serial.c | 59 ++++++++++++++++++++++++++++++- 1 file changed, 58 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index ad7483230090..920548c55c25 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -15,6 +15,7 @@ #include <linux/init.h> #include <linux/serial.h> #include <linux/clk.h> +#include <linux/clk-provider.h> #include <linux/console.h> #include <linux/sysrq.h> #include <linux/tty_flip.h> @@ -110,6 +111,7 @@ struct atmel_uart_char { struct atmel_uart_port { struct uart_port uart; /* uart */ struct clk *clk; /* uart clock */ + struct clk *gclk; /* uart generic clock */ int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */ u32 backup_imr; /* IMR saved during suspend */ int break_active; /* break being received */ @@ -229,6 +231,11 @@ static inline int atmel_uart_is_half_duplex(struct uart_port *port) (port->iso7816.flags & SER_ISO7816_ENABLED); } +static inline int atmel_error_rate(int desired_value, int actual_value) +{ + return 100 - (desired_value * 100) / actual_value; +} + #ifdef CONFIG_SERIAL_ATMEL_PDC static bool atmel_use_pdc_rx(struct uart_port *port) { @@ -2117,6 +2124,8 @@ static void atmel_serial_pm(struct uart_port *port, unsigned int state, * This is called on uart_close() or a suspend event. */ clk_disable_unprepare(atmel_port->clk); + if (__clk_is_enabled(atmel_port->gclk)) + clk_disable_unprepare(atmel_port->gclk); break; default: dev_err(port->dev, "atmel_serial: unknown pm %d\n", state); @@ -2132,7 +2141,9 @@ static void atmel_set_termios(struct uart_port *port, { struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); unsigned long flags; - unsigned int old_mode, mode, imr, quot, baud, div, cd, fp = 0; + unsigned int old_mode, mode, imr, quot, div, cd, fp = 0; + unsigned int baud, actual_baud, gclk_rate; + int ret; /* save the current mode register */ mode = old_mode = atmel_uart_readl(port, ATMEL_US_MR); @@ -2302,6 +2313,46 @@ static void atmel_set_termios(struct uart_port *port, cd &= ATMEL_US_CD; } + /* + * If there is no Fractional Part, there is a high chance that + * we may be able to generate a baudrate closer to the desired one + * if we use the GCLK as the clock source driving the baudrate + * generator. + */ + if (!atmel_port->has_frac_baudrate) { + if (__clk_is_enabled(atmel_port->gclk)) + clk_disable_unprepare(atmel_port->gclk); + gclk_rate = clk_round_rate(atmel_port->gclk, 16 * baud); + actual_baud = clk_get_rate(atmel_port->clk) / (16 * cd); + if (gclk_rate && abs(atmel_error_rate(baud, actual_baud)) > + abs(atmel_error_rate(baud, gclk_rate / 16))) { + clk_set_rate(atmel_port->gclk, 16 * baud); + ret = clk_prepare_enable(atmel_port->gclk); + if (ret) + goto gclk_fail; + + if (atmel_port->is_usart) { + mode &= ~ATMEL_US_USCLKS; + mode |= ATMEL_US_USCLKS_GCLK; + } else { + mode &= ~ATMEL_UA_BRSRCCK; + mode |= ATMEL_UA_BRSRCCK_GCLK; + } + + /* + * Set the Clock Divisor for GCLK to 1. + * Since we were able to generate the smallest + * multiple of the desired baudrate times 16, + * then we surely can generate a bigger multiple + * with the exact error rate for an equally increased + * CD. Thus no need to take into account + * a higher value for CD. + */ + cd = 1; + } + } + +gclk_fail: quot = cd | fp << ATMEL_US_FP_OFFSET; if (!(port->iso7816.flags & SER_ISO7816_ENABLED)) @@ -2897,6 +2948,12 @@ static int atmel_serial_probe(struct platform_device *pdev) if (ret) goto err; + atmel_port->gclk = devm_clk_get_optional(&pdev->dev, "gclk"); + if (IS_ERR(atmel_port->gclk)) { + ret = PTR_ERR(atmel_port->gclk); + goto err_clk_disable_unprepare; + } + ret = atmel_init_port(atmel_port, pdev); if (ret) goto err_clk_disable_unprepare; -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Sergiu Moga <sergiu.moga@microchip.com> To: <lee@kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <claudiu.beznea@microchip.com>, <radu_nicolae.pirea@upb.ro>, <richard.genoud@gmail.com>, <gregkh@linuxfoundation.org>, <broonie@kernel.org>, <mturquette@baylibre.com>, <sboyd@kernel.org>, <jirislaby@kernel.org>, <sergiu.moga@microchip.com>, <admin@hifiphile.com>, <kavyasree.kotagiri@microchip.com>, <tudor.ambarus@microchip.com> Cc: <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-serial@vger.kernel.org>, <linux-clk@vger.kernel.org> Subject: [PATCH v3 14/14] tty: serial: atmel: Make the driver aware of the existence of GCLK Date: Tue, 13 Sep 2022 17:22:06 +0300 [thread overview] Message-ID: <20220913142205.162399-15-sergiu.moga@microchip.com> (raw) In-Reply-To: <20220913142205.162399-1-sergiu.moga@microchip.com> Previously, the atmel serial driver did not take into account the possibility of using the more customizable generic clock as its baudrate generator. Unless there is a Fractional Part available to increase accuracy, there is a high chance that we may be able to generate a baudrate closer to the desired one by using the GCLK as the clock source. Now, depending on the error rate between the desired baudrate and the actual baudrate, the serial driver will fallback on the generic clock. The generic clock must be provided in the DT node of the serial that may need a more flexible clock source. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> --- v1 -> v2: - take into account the different placement of the baudrate clock source into the IP's Mode Register (USART vs UART) - don't check for atmel_port->gclk != NULL - use clk_round_rate instead of clk_set_rate + clk_get_rate - remove clk_disable_unprepare from the end of the probe method v2 -> v3: - add `gclk_fail` goto - replace `goto err` with `goto err_clk_disable_unprepare;` drivers/tty/serial/atmel_serial.c | 59 ++++++++++++++++++++++++++++++- 1 file changed, 58 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index ad7483230090..920548c55c25 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -15,6 +15,7 @@ #include <linux/init.h> #include <linux/serial.h> #include <linux/clk.h> +#include <linux/clk-provider.h> #include <linux/console.h> #include <linux/sysrq.h> #include <linux/tty_flip.h> @@ -110,6 +111,7 @@ struct atmel_uart_char { struct atmel_uart_port { struct uart_port uart; /* uart */ struct clk *clk; /* uart clock */ + struct clk *gclk; /* uart generic clock */ int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */ u32 backup_imr; /* IMR saved during suspend */ int break_active; /* break being received */ @@ -229,6 +231,11 @@ static inline int atmel_uart_is_half_duplex(struct uart_port *port) (port->iso7816.flags & SER_ISO7816_ENABLED); } +static inline int atmel_error_rate(int desired_value, int actual_value) +{ + return 100 - (desired_value * 100) / actual_value; +} + #ifdef CONFIG_SERIAL_ATMEL_PDC static bool atmel_use_pdc_rx(struct uart_port *port) { @@ -2117,6 +2124,8 @@ static void atmel_serial_pm(struct uart_port *port, unsigned int state, * This is called on uart_close() or a suspend event. */ clk_disable_unprepare(atmel_port->clk); + if (__clk_is_enabled(atmel_port->gclk)) + clk_disable_unprepare(atmel_port->gclk); break; default: dev_err(port->dev, "atmel_serial: unknown pm %d\n", state); @@ -2132,7 +2141,9 @@ static void atmel_set_termios(struct uart_port *port, { struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); unsigned long flags; - unsigned int old_mode, mode, imr, quot, baud, div, cd, fp = 0; + unsigned int old_mode, mode, imr, quot, div, cd, fp = 0; + unsigned int baud, actual_baud, gclk_rate; + int ret; /* save the current mode register */ mode = old_mode = atmel_uart_readl(port, ATMEL_US_MR); @@ -2302,6 +2313,46 @@ static void atmel_set_termios(struct uart_port *port, cd &= ATMEL_US_CD; } + /* + * If there is no Fractional Part, there is a high chance that + * we may be able to generate a baudrate closer to the desired one + * if we use the GCLK as the clock source driving the baudrate + * generator. + */ + if (!atmel_port->has_frac_baudrate) { + if (__clk_is_enabled(atmel_port->gclk)) + clk_disable_unprepare(atmel_port->gclk); + gclk_rate = clk_round_rate(atmel_port->gclk, 16 * baud); + actual_baud = clk_get_rate(atmel_port->clk) / (16 * cd); + if (gclk_rate && abs(atmel_error_rate(baud, actual_baud)) > + abs(atmel_error_rate(baud, gclk_rate / 16))) { + clk_set_rate(atmel_port->gclk, 16 * baud); + ret = clk_prepare_enable(atmel_port->gclk); + if (ret) + goto gclk_fail; + + if (atmel_port->is_usart) { + mode &= ~ATMEL_US_USCLKS; + mode |= ATMEL_US_USCLKS_GCLK; + } else { + mode &= ~ATMEL_UA_BRSRCCK; + mode |= ATMEL_UA_BRSRCCK_GCLK; + } + + /* + * Set the Clock Divisor for GCLK to 1. + * Since we were able to generate the smallest + * multiple of the desired baudrate times 16, + * then we surely can generate a bigger multiple + * with the exact error rate for an equally increased + * CD. Thus no need to take into account + * a higher value for CD. + */ + cd = 1; + } + } + +gclk_fail: quot = cd | fp << ATMEL_US_FP_OFFSET; if (!(port->iso7816.flags & SER_ISO7816_ENABLED)) @@ -2897,6 +2948,12 @@ static int atmel_serial_probe(struct platform_device *pdev) if (ret) goto err; + atmel_port->gclk = devm_clk_get_optional(&pdev->dev, "gclk"); + if (IS_ERR(atmel_port->gclk)) { + ret = PTR_ERR(atmel_port->gclk); + goto err_clk_disable_unprepare; + } + ret = atmel_init_port(atmel_port, pdev); if (ret) goto err_clk_disable_unprepare; -- 2.34.1
next prev parent reply other threads:[~2022-09-13 14:45 UTC|newest] Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-09-13 14:21 [PATCH v3 00/14] Make atmel serial driver aware of GCLK Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-13 14:21 ` [PATCH v3 01/14] ARM: dts: at91: sama7g5: Swap rx and tx for spi11 Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-16 8:13 ` Claudiu.Beznea 2022-09-16 8:13 ` Claudiu.Beznea 2022-09-13 14:21 ` [PATCH v3 02/14] ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1 Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-16 8:14 ` Claudiu.Beznea 2022-09-16 8:14 ` Claudiu.Beznea 2022-09-13 14:21 ` [PATCH v3 03/14] ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodes Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-16 8:15 ` Claudiu.Beznea 2022-09-16 8:15 ` Claudiu.Beznea 2022-09-13 14:21 ` [PATCH v3 04/14] spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-16 8:15 ` Claudiu.Beznea 2022-09-16 8:15 ` Claudiu.Beznea 2022-09-13 14:21 ` [PATCH v3 05/14] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-13 14:21 ` [PATCH v3 06/14] dt-bindings: serial: atmel,at91-usart: convert to json-schema Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-13 14:28 ` Krzysztof Kozlowski 2022-09-13 14:28 ` Krzysztof Kozlowski 2022-09-13 14:21 ` [PATCH v3 07/14] dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to SAM9X60 Sergiu Moga 2022-09-13 14:21 ` Sergiu Moga 2022-09-13 14:28 ` Krzysztof Kozlowski 2022-09-13 14:28 ` Krzysztof Kozlowski 2022-09-13 14:22 ` [PATCH v3 08/14] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding Sergiu Moga 2022-09-13 14:22 ` Sergiu Moga 2022-09-13 14:29 ` Krzysztof Kozlowski 2022-09-13 14:29 ` Krzysztof Kozlowski 2022-09-13 14:22 ` [PATCH v3 09/14] dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock Sergiu Moga 2022-09-13 14:22 ` Sergiu Moga 2022-09-13 14:29 ` Krzysztof Kozlowski 2022-09-13 14:29 ` Krzysztof Kozlowski 2022-09-13 14:22 ` [PATCH v3 10/14] tty: serial: atmel: Define GCLK as USART baudrate source clock Sergiu Moga 2022-09-13 14:22 ` Sergiu Moga 2022-09-13 14:22 ` [PATCH v3 11/14] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register Sergiu Moga 2022-09-13 14:22 ` Sergiu Moga 2022-09-13 14:22 ` [PATCH v3 12/14] tty: serial: atmel: Only divide Clock Divisor if the IP is USART Sergiu Moga 2022-09-13 14:22 ` Sergiu Moga 2022-09-14 11:01 ` Ilpo Järvinen 2022-09-14 11:01 ` Ilpo Järvinen 2022-09-14 12:17 ` Sergiu.Moga 2022-09-14 12:17 ` Sergiu.Moga 2022-09-13 14:22 ` [PATCH v3 13/14] clk: at91: sama5d2: Add Generic Clocks for UART/USART Sergiu Moga 2022-09-13 14:22 ` Sergiu Moga 2022-09-16 8:16 ` Claudiu.Beznea 2022-09-16 8:16 ` Claudiu.Beznea 2022-09-13 14:22 ` Sergiu Moga [this message] 2022-09-13 14:22 ` [PATCH v3 14/14] tty: serial: atmel: Make the driver aware of the existence of GCLK Sergiu Moga
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