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From: John Keeping <john@metanate.com>
To: Jaehoon Chung <jh80.chung@samsung.com>
Cc: John Keeping <john@metanate.com>, Peng Fan <peng.fan@nxp.com>,
	u-boot@lists.denx.de
Subject: [PATCH] mmc: dwmmc: only clear handled interrupts
Date: Thu, 15 Sep 2022 18:56:56 +0100	[thread overview]
Message-ID: <20220915175656.3447093-1-john@metanate.com> (raw)

Unconditionally clearing DTO when RXDR is set leads to spurious timeouts
in FIFO mode transfers if events occur in the following order:

	mask = dwmci_readl(host, DWMCI_RINTSTS);

	// Hardware asserts DWMCI_INTMSK_DTO here

	dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);

	if (mask & DWMCI_INTMSK_DTO) {
		// Unreachable as DTO is cleared without being handled!
		return 0;
	}

Only clear interrupts that we have seen and are handling so that DTO is
not missed.

Signed-off-by: John Keeping <john@metanate.com>
---
 drivers/mmc/dw_mmc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 4232c5eb8c..5085a3b491 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -168,7 +168,8 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 			if (data->flags == MMC_DATA_READ &&
 			    (mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO))) {
 				dwmci_writel(host, DWMCI_RINTSTS,
-					     DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO);
+					     mask & (DWMCI_INTMSK_RXDR |
+						     DWMCI_INTMSK_DTO));
 				while (size) {
 					ret = dwmci_fifo_ready(host,
 							DWMCI_FIFO_EMPTY,
-- 
2.37.3


             reply	other threads:[~2022-09-15 17:57 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-15 17:56 John Keeping [this message]
2022-09-16  8:20 ` [PATCH] mmc: dwmmc: only clear handled interrupts Jerome Forissier
2022-09-16  8:56 ` Quentin Schulz
2022-10-07 12:34 ` Jaehoon Chung
     [not found] ` <CGME20221025000216epcas1p3175ad85b4e7212f3304e9b616c27000f@epcas1p3.samsung.com>
2022-10-25  0:02   ` Jaehoon Chung

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