* [PATCH v2 0/2] Fix chrontel-ch7033 reversion
@ 2022-09-19 10:20 Robert Foss
2022-09-19 10:20 ` [PATCH v2 1/2] Revert "Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP"" Robert Foss
2022-09-19 10:20 ` [PATCH v2 2/2] Revert "drm/bridge: chrontel-ch7033: Add byteswap order setting" Robert Foss
0 siblings, 2 replies; 9+ messages in thread
From: Robert Foss @ 2022-09-19 10:20 UTC (permalink / raw)
To: andrzej.hajda, narmstrong, robert.foss, Laurent.pinchart, jonas,
jernej.skrabec, airlied, daniel, dianders, dri-devel,
linux-kernel, Chris Morgan, devicetree
When the chrontel-ch7033 series from Chris Morgan was reverted[1], I made mistake.
Patch 2/2 in this[1] series reverts [2] when it should have reverted [3].
This series fixes this mistake.
[1] https://lore.kernel.org/all/20220912113856.817188-1-robert.foss@linaro.org/
[2] c312b0df3b13 - drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP
[3] ce9564cfc9ae - drm/bridge: chrontel-ch7033: Add byteswap order setting
Changes since v1:
- Add Fixes tag (Laurent)
Robert Foss (2):
Revert "Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector
operations for DP""
Revert "drm/bridge: chrontel-ch7033: Add byteswap order setting"
drivers/gpu/drm/bridge/chrontel-ch7033.c | 15 ++-----------
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 28 ++++++++++++++++++++++++
2 files changed, 30 insertions(+), 13 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 1/2] Revert "Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP""
2022-09-19 10:20 [PATCH v2 0/2] Fix chrontel-ch7033 reversion Robert Foss
@ 2022-09-19 10:20 ` Robert Foss
2022-09-19 10:43 ` Laurent Pinchart
2022-09-19 10:20 ` [PATCH v2 2/2] Revert "drm/bridge: chrontel-ch7033: Add byteswap order setting" Robert Foss
1 sibling, 1 reply; 9+ messages in thread
From: Robert Foss @ 2022-09-19 10:20 UTC (permalink / raw)
To: andrzej.hajda, narmstrong, robert.foss, Laurent.pinchart, jonas,
jernej.skrabec, airlied, daniel, dianders, dri-devel,
linux-kernel, Chris Morgan, devicetree
This commit was accidentally reverted instead of another commit, and
therefore needs to be reinstated.
This reverts commit 8c9c40ec83445b188fb6b59e119bf5c2de81b02d.
Fixes: 8c9c40ec8344 ("Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP"")
Signed-off-by: Robert Foss <robert.foss@linaro.org>
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 28 +++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
index 6e053e2af229..3c3561942eb6 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
@@ -29,6 +29,7 @@
#include <drm/drm_atomic_helper.h>
#include <drm/drm_bridge.h>
#include <drm/drm_bridge_connector.h>
+#include <drm/drm_edid.h>
#include <drm/drm_mipi_dsi.h>
#include <drm/drm_of.h>
#include <drm/drm_panel.h>
@@ -68,6 +69,7 @@
#define BPP_18_RGB BIT(0)
#define SN_HPD_DISABLE_REG 0x5C
#define HPD_DISABLE BIT(0)
+#define HPD_DEBOUNCED_STATE BIT(4)
#define SN_GPIO_IO_REG 0x5E
#define SN_GPIO_INPUT_SHIFT 4
#define SN_GPIO_OUTPUT_SHIFT 0
@@ -1158,10 +1160,33 @@ static void ti_sn_bridge_atomic_post_disable(struct drm_bridge *bridge,
pm_runtime_put_sync(pdata->dev);
}
+static enum drm_connector_status ti_sn_bridge_detect(struct drm_bridge *bridge)
+{
+ struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
+ int val = 0;
+
+ pm_runtime_get_sync(pdata->dev);
+ regmap_read(pdata->regmap, SN_HPD_DISABLE_REG, &val);
+ pm_runtime_put_autosuspend(pdata->dev);
+
+ return val & HPD_DEBOUNCED_STATE ? connector_status_connected
+ : connector_status_disconnected;
+}
+
+static struct edid *ti_sn_bridge_get_edid(struct drm_bridge *bridge,
+ struct drm_connector *connector)
+{
+ struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
+
+ return drm_get_edid(connector, &pdata->aux.ddc);
+}
+
static const struct drm_bridge_funcs ti_sn_bridge_funcs = {
.attach = ti_sn_bridge_attach,
.detach = ti_sn_bridge_detach,
.mode_valid = ti_sn_bridge_mode_valid,
+ .get_edid = ti_sn_bridge_get_edid,
+ .detect = ti_sn_bridge_detect,
.atomic_pre_enable = ti_sn_bridge_atomic_pre_enable,
.atomic_enable = ti_sn_bridge_atomic_enable,
.atomic_disable = ti_sn_bridge_atomic_disable,
@@ -1257,6 +1282,9 @@ static int ti_sn_bridge_probe(struct auxiliary_device *adev,
pdata->bridge.type = pdata->next_bridge->type == DRM_MODE_CONNECTOR_DisplayPort
? DRM_MODE_CONNECTOR_DisplayPort : DRM_MODE_CONNECTOR_eDP;
+ if (pdata->bridge.type == DRM_MODE_CONNECTOR_DisplayPort)
+ pdata->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_DETECT;
+
drm_bridge_add(&pdata->bridge);
ret = ti_sn_attach_host(pdata);
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v2 2/2] Revert "drm/bridge: chrontel-ch7033: Add byteswap order setting"
2022-09-19 10:20 [PATCH v2 0/2] Fix chrontel-ch7033 reversion Robert Foss
2022-09-19 10:20 ` [PATCH v2 1/2] Revert "Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP"" Robert Foss
@ 2022-09-19 10:20 ` Robert Foss
2022-09-19 10:47 ` Laurent Pinchart
1 sibling, 1 reply; 9+ messages in thread
From: Robert Foss @ 2022-09-19 10:20 UTC (permalink / raw)
To: andrzej.hajda, narmstrong, robert.foss, Laurent.pinchart, jonas,
jernej.skrabec, airlied, daniel, dianders, dri-devel,
linux-kernel, Chris Morgan, devicetree
Revert this patch since it depends on devicetree functionality that
previously has been reverted in the below commit.
commit e798ba3374a1 ("Revert "dt-bindings: Add byteswap order to chrontel ch7033"")
This reverts commit ce9564cfc9aea65e68eb343c599317633bc2321a.
Fixes: 8c9c40ec8344 ("Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP"")
Signed-off-by: Robert Foss <robert.foss@linaro.org>
---
drivers/gpu/drm/bridge/chrontel-ch7033.c | 15 ++-------------
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/bridge/chrontel-ch7033.c b/drivers/gpu/drm/bridge/chrontel-ch7033.c
index c5719908ce2d..ba060277c3fd 100644
--- a/drivers/gpu/drm/bridge/chrontel-ch7033.c
+++ b/drivers/gpu/drm/bridge/chrontel-ch7033.c
@@ -68,7 +68,6 @@ enum {
BYTE_SWAP_GBR = 3,
BYTE_SWAP_BRG = 4,
BYTE_SWAP_BGR = 5,
- BYTE_SWAP_MAX = 6,
};
/* Page 0, Register 0x19 */
@@ -356,8 +355,6 @@ static void ch7033_bridge_mode_set(struct drm_bridge *bridge,
int hsynclen = mode->hsync_end - mode->hsync_start;
int vbporch = mode->vsync_start - mode->vdisplay;
int vsynclen = mode->vsync_end - mode->vsync_start;
- u8 byte_swap;
- int ret;
/*
* Page 4
@@ -401,16 +398,8 @@ static void ch7033_bridge_mode_set(struct drm_bridge *bridge,
regmap_write(priv->regmap, 0x15, vbporch);
regmap_write(priv->regmap, 0x16, vsynclen);
- /* Input color swap. Byte order is optional and will default to
- * BYTE_SWAP_BGR to preserve backwards compatibility with existing
- * driver.
- */
- ret = of_property_read_u8(priv->bridge.of_node, "chrontel,byteswap",
- &byte_swap);
- if (!ret && byte_swap < BYTE_SWAP_MAX)
- regmap_update_bits(priv->regmap, 0x18, SWAP, byte_swap);
- else
- regmap_update_bits(priv->regmap, 0x18, SWAP, BYTE_SWAP_BGR);
+ /* Input color swap. */
+ regmap_update_bits(priv->regmap, 0x18, SWAP, BYTE_SWAP_BGR);
/* Input clock and sync polarity. */
regmap_update_bits(priv->regmap, 0x19, 0x1, mode->clock >> 16);
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v2 1/2] Revert "Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP""
2022-09-19 10:20 ` [PATCH v2 1/2] Revert "Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP"" Robert Foss
@ 2022-09-19 10:43 ` Laurent Pinchart
0 siblings, 0 replies; 9+ messages in thread
From: Laurent Pinchart @ 2022-09-19 10:43 UTC (permalink / raw)
To: Robert Foss
Cc: devicetree, andrzej.hajda, jonas, airlied, narmstrong,
Chris Morgan, dianders, jernej.skrabec, linux-kernel, dri-devel
Hi Rob,
Thank you for the patch.
On Mon, Sep 19, 2022 at 12:20:08PM +0200, Robert Foss wrote:
> This commit was accidentally reverted instead of another commit, and
> therefore needs to be reinstated.
>
> This reverts commit 8c9c40ec83445b188fb6b59e119bf5c2de81b02d.
>
> Fixes: 8c9c40ec8344 ("Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP"")
> Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 28 +++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> index 6e053e2af229..3c3561942eb6 100644
> --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> @@ -29,6 +29,7 @@
> #include <drm/drm_atomic_helper.h>
> #include <drm/drm_bridge.h>
> #include <drm/drm_bridge_connector.h>
> +#include <drm/drm_edid.h>
> #include <drm/drm_mipi_dsi.h>
> #include <drm/drm_of.h>
> #include <drm/drm_panel.h>
> @@ -68,6 +69,7 @@
> #define BPP_18_RGB BIT(0)
> #define SN_HPD_DISABLE_REG 0x5C
> #define HPD_DISABLE BIT(0)
> +#define HPD_DEBOUNCED_STATE BIT(4)
> #define SN_GPIO_IO_REG 0x5E
> #define SN_GPIO_INPUT_SHIFT 4
> #define SN_GPIO_OUTPUT_SHIFT 0
> @@ -1158,10 +1160,33 @@ static void ti_sn_bridge_atomic_post_disable(struct drm_bridge *bridge,
> pm_runtime_put_sync(pdata->dev);
> }
>
> +static enum drm_connector_status ti_sn_bridge_detect(struct drm_bridge *bridge)
> +{
> + struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
> + int val = 0;
> +
> + pm_runtime_get_sync(pdata->dev);
> + regmap_read(pdata->regmap, SN_HPD_DISABLE_REG, &val);
> + pm_runtime_put_autosuspend(pdata->dev);
> +
> + return val & HPD_DEBOUNCED_STATE ? connector_status_connected
> + : connector_status_disconnected;
> +}
> +
> +static struct edid *ti_sn_bridge_get_edid(struct drm_bridge *bridge,
> + struct drm_connector *connector)
> +{
> + struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
> +
> + return drm_get_edid(connector, &pdata->aux.ddc);
> +}
> +
> static const struct drm_bridge_funcs ti_sn_bridge_funcs = {
> .attach = ti_sn_bridge_attach,
> .detach = ti_sn_bridge_detach,
> .mode_valid = ti_sn_bridge_mode_valid,
> + .get_edid = ti_sn_bridge_get_edid,
> + .detect = ti_sn_bridge_detect,
> .atomic_pre_enable = ti_sn_bridge_atomic_pre_enable,
> .atomic_enable = ti_sn_bridge_atomic_enable,
> .atomic_disable = ti_sn_bridge_atomic_disable,
> @@ -1257,6 +1282,9 @@ static int ti_sn_bridge_probe(struct auxiliary_device *adev,
> pdata->bridge.type = pdata->next_bridge->type == DRM_MODE_CONNECTOR_DisplayPort
> ? DRM_MODE_CONNECTOR_DisplayPort : DRM_MODE_CONNECTOR_eDP;
>
> + if (pdata->bridge.type == DRM_MODE_CONNECTOR_DisplayPort)
> + pdata->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_DETECT;
> +
> drm_bridge_add(&pdata->bridge);
>
> ret = ti_sn_attach_host(pdata);
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 1/2] Revert "Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP""
@ 2022-09-19 10:43 ` Laurent Pinchart
0 siblings, 0 replies; 9+ messages in thread
From: Laurent Pinchart @ 2022-09-19 10:43 UTC (permalink / raw)
To: Robert Foss
Cc: andrzej.hajda, narmstrong, jonas, jernej.skrabec, airlied,
daniel, dianders, dri-devel, linux-kernel, Chris Morgan,
devicetree
Hi Rob,
Thank you for the patch.
On Mon, Sep 19, 2022 at 12:20:08PM +0200, Robert Foss wrote:
> This commit was accidentally reverted instead of another commit, and
> therefore needs to be reinstated.
>
> This reverts commit 8c9c40ec83445b188fb6b59e119bf5c2de81b02d.
>
> Fixes: 8c9c40ec8344 ("Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP"")
> Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 28 +++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> index 6e053e2af229..3c3561942eb6 100644
> --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> @@ -29,6 +29,7 @@
> #include <drm/drm_atomic_helper.h>
> #include <drm/drm_bridge.h>
> #include <drm/drm_bridge_connector.h>
> +#include <drm/drm_edid.h>
> #include <drm/drm_mipi_dsi.h>
> #include <drm/drm_of.h>
> #include <drm/drm_panel.h>
> @@ -68,6 +69,7 @@
> #define BPP_18_RGB BIT(0)
> #define SN_HPD_DISABLE_REG 0x5C
> #define HPD_DISABLE BIT(0)
> +#define HPD_DEBOUNCED_STATE BIT(4)
> #define SN_GPIO_IO_REG 0x5E
> #define SN_GPIO_INPUT_SHIFT 4
> #define SN_GPIO_OUTPUT_SHIFT 0
> @@ -1158,10 +1160,33 @@ static void ti_sn_bridge_atomic_post_disable(struct drm_bridge *bridge,
> pm_runtime_put_sync(pdata->dev);
> }
>
> +static enum drm_connector_status ti_sn_bridge_detect(struct drm_bridge *bridge)
> +{
> + struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
> + int val = 0;
> +
> + pm_runtime_get_sync(pdata->dev);
> + regmap_read(pdata->regmap, SN_HPD_DISABLE_REG, &val);
> + pm_runtime_put_autosuspend(pdata->dev);
> +
> + return val & HPD_DEBOUNCED_STATE ? connector_status_connected
> + : connector_status_disconnected;
> +}
> +
> +static struct edid *ti_sn_bridge_get_edid(struct drm_bridge *bridge,
> + struct drm_connector *connector)
> +{
> + struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
> +
> + return drm_get_edid(connector, &pdata->aux.ddc);
> +}
> +
> static const struct drm_bridge_funcs ti_sn_bridge_funcs = {
> .attach = ti_sn_bridge_attach,
> .detach = ti_sn_bridge_detach,
> .mode_valid = ti_sn_bridge_mode_valid,
> + .get_edid = ti_sn_bridge_get_edid,
> + .detect = ti_sn_bridge_detect,
> .atomic_pre_enable = ti_sn_bridge_atomic_pre_enable,
> .atomic_enable = ti_sn_bridge_atomic_enable,
> .atomic_disable = ti_sn_bridge_atomic_disable,
> @@ -1257,6 +1282,9 @@ static int ti_sn_bridge_probe(struct auxiliary_device *adev,
> pdata->bridge.type = pdata->next_bridge->type == DRM_MODE_CONNECTOR_DisplayPort
> ? DRM_MODE_CONNECTOR_DisplayPort : DRM_MODE_CONNECTOR_eDP;
>
> + if (pdata->bridge.type == DRM_MODE_CONNECTOR_DisplayPort)
> + pdata->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_DETECT;
> +
> drm_bridge_add(&pdata->bridge);
>
> ret = ti_sn_attach_host(pdata);
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/2] Revert "drm/bridge: chrontel-ch7033: Add byteswap order setting"
2022-09-19 10:20 ` [PATCH v2 2/2] Revert "drm/bridge: chrontel-ch7033: Add byteswap order setting" Robert Foss
@ 2022-09-19 10:47 ` Laurent Pinchart
0 siblings, 0 replies; 9+ messages in thread
From: Laurent Pinchart @ 2022-09-19 10:47 UTC (permalink / raw)
To: Robert Foss
Cc: devicetree, andrzej.hajda, jonas, airlied, narmstrong,
Chris Morgan, dianders, jernej.skrabec, linux-kernel, dri-devel
Hi Rob,
Thank you for the patch.
On Mon, Sep 19, 2022 at 12:20:09PM +0200, Robert Foss wrote:
> Revert this patch since it depends on devicetree functionality that
> previously has been reverted in the below commit.
>
> commit e798ba3374a1 ("Revert "dt-bindings: Add byteswap order to chrontel ch7033"")
>
> This reverts commit ce9564cfc9aea65e68eb343c599317633bc2321a.
>
> Fixes: 8c9c40ec8344 ("Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP"")
I'm not sure this Fixes tag is meaningful here. Apart from that,
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Signed-off-by: Robert Foss <robert.foss@linaro.org>
> ---
> drivers/gpu/drm/bridge/chrontel-ch7033.c | 15 ++-------------
> 1 file changed, 2 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/chrontel-ch7033.c b/drivers/gpu/drm/bridge/chrontel-ch7033.c
> index c5719908ce2d..ba060277c3fd 100644
> --- a/drivers/gpu/drm/bridge/chrontel-ch7033.c
> +++ b/drivers/gpu/drm/bridge/chrontel-ch7033.c
> @@ -68,7 +68,6 @@ enum {
> BYTE_SWAP_GBR = 3,
> BYTE_SWAP_BRG = 4,
> BYTE_SWAP_BGR = 5,
> - BYTE_SWAP_MAX = 6,
> };
>
> /* Page 0, Register 0x19 */
> @@ -356,8 +355,6 @@ static void ch7033_bridge_mode_set(struct drm_bridge *bridge,
> int hsynclen = mode->hsync_end - mode->hsync_start;
> int vbporch = mode->vsync_start - mode->vdisplay;
> int vsynclen = mode->vsync_end - mode->vsync_start;
> - u8 byte_swap;
> - int ret;
>
> /*
> * Page 4
> @@ -401,16 +398,8 @@ static void ch7033_bridge_mode_set(struct drm_bridge *bridge,
> regmap_write(priv->regmap, 0x15, vbporch);
> regmap_write(priv->regmap, 0x16, vsynclen);
>
> - /* Input color swap. Byte order is optional and will default to
> - * BYTE_SWAP_BGR to preserve backwards compatibility with existing
> - * driver.
> - */
> - ret = of_property_read_u8(priv->bridge.of_node, "chrontel,byteswap",
> - &byte_swap);
> - if (!ret && byte_swap < BYTE_SWAP_MAX)
> - regmap_update_bits(priv->regmap, 0x18, SWAP, byte_swap);
> - else
> - regmap_update_bits(priv->regmap, 0x18, SWAP, BYTE_SWAP_BGR);
> + /* Input color swap. */
> + regmap_update_bits(priv->regmap, 0x18, SWAP, BYTE_SWAP_BGR);
>
> /* Input clock and sync polarity. */
> regmap_update_bits(priv->regmap, 0x19, 0x1, mode->clock >> 16);
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/2] Revert "drm/bridge: chrontel-ch7033: Add byteswap order setting"
@ 2022-09-19 10:47 ` Laurent Pinchart
0 siblings, 0 replies; 9+ messages in thread
From: Laurent Pinchart @ 2022-09-19 10:47 UTC (permalink / raw)
To: Robert Foss
Cc: andrzej.hajda, narmstrong, jonas, jernej.skrabec, airlied,
daniel, dianders, dri-devel, linux-kernel, Chris Morgan,
devicetree
Hi Rob,
Thank you for the patch.
On Mon, Sep 19, 2022 at 12:20:09PM +0200, Robert Foss wrote:
> Revert this patch since it depends on devicetree functionality that
> previously has been reverted in the below commit.
>
> commit e798ba3374a1 ("Revert "dt-bindings: Add byteswap order to chrontel ch7033"")
>
> This reverts commit ce9564cfc9aea65e68eb343c599317633bc2321a.
>
> Fixes: 8c9c40ec8344 ("Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP"")
I'm not sure this Fixes tag is meaningful here. Apart from that,
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Signed-off-by: Robert Foss <robert.foss@linaro.org>
> ---
> drivers/gpu/drm/bridge/chrontel-ch7033.c | 15 ++-------------
> 1 file changed, 2 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/chrontel-ch7033.c b/drivers/gpu/drm/bridge/chrontel-ch7033.c
> index c5719908ce2d..ba060277c3fd 100644
> --- a/drivers/gpu/drm/bridge/chrontel-ch7033.c
> +++ b/drivers/gpu/drm/bridge/chrontel-ch7033.c
> @@ -68,7 +68,6 @@ enum {
> BYTE_SWAP_GBR = 3,
> BYTE_SWAP_BRG = 4,
> BYTE_SWAP_BGR = 5,
> - BYTE_SWAP_MAX = 6,
> };
>
> /* Page 0, Register 0x19 */
> @@ -356,8 +355,6 @@ static void ch7033_bridge_mode_set(struct drm_bridge *bridge,
> int hsynclen = mode->hsync_end - mode->hsync_start;
> int vbporch = mode->vsync_start - mode->vdisplay;
> int vsynclen = mode->vsync_end - mode->vsync_start;
> - u8 byte_swap;
> - int ret;
>
> /*
> * Page 4
> @@ -401,16 +398,8 @@ static void ch7033_bridge_mode_set(struct drm_bridge *bridge,
> regmap_write(priv->regmap, 0x15, vbporch);
> regmap_write(priv->regmap, 0x16, vsynclen);
>
> - /* Input color swap. Byte order is optional and will default to
> - * BYTE_SWAP_BGR to preserve backwards compatibility with existing
> - * driver.
> - */
> - ret = of_property_read_u8(priv->bridge.of_node, "chrontel,byteswap",
> - &byte_swap);
> - if (!ret && byte_swap < BYTE_SWAP_MAX)
> - regmap_update_bits(priv->regmap, 0x18, SWAP, byte_swap);
> - else
> - regmap_update_bits(priv->regmap, 0x18, SWAP, BYTE_SWAP_BGR);
> + /* Input color swap. */
> + regmap_update_bits(priv->regmap, 0x18, SWAP, BYTE_SWAP_BGR);
>
> /* Input clock and sync polarity. */
> regmap_update_bits(priv->regmap, 0x19, 0x1, mode->clock >> 16);
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/2] Revert "drm/bridge: chrontel-ch7033: Add byteswap order setting"
2022-09-19 10:47 ` Laurent Pinchart
@ 2022-09-19 13:18 ` Robert Foss
-1 siblings, 0 replies; 9+ messages in thread
From: Robert Foss @ 2022-09-19 13:18 UTC (permalink / raw)
To: Laurent Pinchart
Cc: andrzej.hajda, narmstrong, jonas, jernej.skrabec, airlied,
daniel, dianders, dri-devel, linux-kernel, Chris Morgan,
devicetree
On Mon, 19 Sept 2022 at 12:48, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>
> Hi Rob,
>
> Thank you for the patch.
>
> On Mon, Sep 19, 2022 at 12:20:09PM +0200, Robert Foss wrote:
> > Revert this patch since it depends on devicetree functionality that
> > previously has been reverted in the below commit.
> >
> > commit e798ba3374a1 ("Revert "dt-bindings: Add byteswap order to chrontel ch7033"")
> >
> > This reverts commit ce9564cfc9aea65e68eb343c599317633bc2321a.
> >
> > Fixes: 8c9c40ec8344 ("Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP"")
>
> I'm not sure this Fixes tag is meaningful here. Apart from that,
Ack.
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>
> > Signed-off-by: Robert Foss <robert.foss@linaro.org>
> > ---
> > drivers/gpu/drm/bridge/chrontel-ch7033.c | 15 ++-------------
> > 1 file changed, 2 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/chrontel-ch7033.c b/drivers/gpu/drm/bridge/chrontel-ch7033.c
> > index c5719908ce2d..ba060277c3fd 100644
> > --- a/drivers/gpu/drm/bridge/chrontel-ch7033.c
> > +++ b/drivers/gpu/drm/bridge/chrontel-ch7033.c
> > @@ -68,7 +68,6 @@ enum {
> > BYTE_SWAP_GBR = 3,
> > BYTE_SWAP_BRG = 4,
> > BYTE_SWAP_BGR = 5,
> > - BYTE_SWAP_MAX = 6,
> > };
> >
> > /* Page 0, Register 0x19 */
> > @@ -356,8 +355,6 @@ static void ch7033_bridge_mode_set(struct drm_bridge *bridge,
> > int hsynclen = mode->hsync_end - mode->hsync_start;
> > int vbporch = mode->vsync_start - mode->vdisplay;
> > int vsynclen = mode->vsync_end - mode->vsync_start;
> > - u8 byte_swap;
> > - int ret;
> >
> > /*
> > * Page 4
> > @@ -401,16 +398,8 @@ static void ch7033_bridge_mode_set(struct drm_bridge *bridge,
> > regmap_write(priv->regmap, 0x15, vbporch);
> > regmap_write(priv->regmap, 0x16, vsynclen);
> >
> > - /* Input color swap. Byte order is optional and will default to
> > - * BYTE_SWAP_BGR to preserve backwards compatibility with existing
> > - * driver.
> > - */
> > - ret = of_property_read_u8(priv->bridge.of_node, "chrontel,byteswap",
> > - &byte_swap);
> > - if (!ret && byte_swap < BYTE_SWAP_MAX)
> > - regmap_update_bits(priv->regmap, 0x18, SWAP, byte_swap);
> > - else
> > - regmap_update_bits(priv->regmap, 0x18, SWAP, BYTE_SWAP_BGR);
> > + /* Input color swap. */
> > + regmap_update_bits(priv->regmap, 0x18, SWAP, BYTE_SWAP_BGR);
> >
> > /* Input clock and sync polarity. */
> > regmap_update_bits(priv->regmap, 0x19, 0x1, mode->clock >> 16);
>
> --
> Regards,
>
> Laurent Pinchart
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/2] Revert "drm/bridge: chrontel-ch7033: Add byteswap order setting"
@ 2022-09-19 13:18 ` Robert Foss
0 siblings, 0 replies; 9+ messages in thread
From: Robert Foss @ 2022-09-19 13:18 UTC (permalink / raw)
To: Laurent Pinchart
Cc: devicetree, andrzej.hajda, jonas, airlied, narmstrong,
Chris Morgan, dianders, jernej.skrabec, linux-kernel, dri-devel
On Mon, 19 Sept 2022 at 12:48, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>
> Hi Rob,
>
> Thank you for the patch.
>
> On Mon, Sep 19, 2022 at 12:20:09PM +0200, Robert Foss wrote:
> > Revert this patch since it depends on devicetree functionality that
> > previously has been reverted in the below commit.
> >
> > commit e798ba3374a1 ("Revert "dt-bindings: Add byteswap order to chrontel ch7033"")
> >
> > This reverts commit ce9564cfc9aea65e68eb343c599317633bc2321a.
> >
> > Fixes: 8c9c40ec8344 ("Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP"")
>
> I'm not sure this Fixes tag is meaningful here. Apart from that,
Ack.
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>
> > Signed-off-by: Robert Foss <robert.foss@linaro.org>
> > ---
> > drivers/gpu/drm/bridge/chrontel-ch7033.c | 15 ++-------------
> > 1 file changed, 2 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/chrontel-ch7033.c b/drivers/gpu/drm/bridge/chrontel-ch7033.c
> > index c5719908ce2d..ba060277c3fd 100644
> > --- a/drivers/gpu/drm/bridge/chrontel-ch7033.c
> > +++ b/drivers/gpu/drm/bridge/chrontel-ch7033.c
> > @@ -68,7 +68,6 @@ enum {
> > BYTE_SWAP_GBR = 3,
> > BYTE_SWAP_BRG = 4,
> > BYTE_SWAP_BGR = 5,
> > - BYTE_SWAP_MAX = 6,
> > };
> >
> > /* Page 0, Register 0x19 */
> > @@ -356,8 +355,6 @@ static void ch7033_bridge_mode_set(struct drm_bridge *bridge,
> > int hsynclen = mode->hsync_end - mode->hsync_start;
> > int vbporch = mode->vsync_start - mode->vdisplay;
> > int vsynclen = mode->vsync_end - mode->vsync_start;
> > - u8 byte_swap;
> > - int ret;
> >
> > /*
> > * Page 4
> > @@ -401,16 +398,8 @@ static void ch7033_bridge_mode_set(struct drm_bridge *bridge,
> > regmap_write(priv->regmap, 0x15, vbporch);
> > regmap_write(priv->regmap, 0x16, vsynclen);
> >
> > - /* Input color swap. Byte order is optional and will default to
> > - * BYTE_SWAP_BGR to preserve backwards compatibility with existing
> > - * driver.
> > - */
> > - ret = of_property_read_u8(priv->bridge.of_node, "chrontel,byteswap",
> > - &byte_swap);
> > - if (!ret && byte_swap < BYTE_SWAP_MAX)
> > - regmap_update_bits(priv->regmap, 0x18, SWAP, byte_swap);
> > - else
> > - regmap_update_bits(priv->regmap, 0x18, SWAP, BYTE_SWAP_BGR);
> > + /* Input color swap. */
> > + regmap_update_bits(priv->regmap, 0x18, SWAP, BYTE_SWAP_BGR);
> >
> > /* Input clock and sync polarity. */
> > regmap_update_bits(priv->regmap, 0x19, 0x1, mode->clock >> 16);
>
> --
> Regards,
>
> Laurent Pinchart
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2022-09-19 13:19 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-19 10:20 [PATCH v2 0/2] Fix chrontel-ch7033 reversion Robert Foss
2022-09-19 10:20 ` [PATCH v2 1/2] Revert "Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP"" Robert Foss
2022-09-19 10:43 ` Laurent Pinchart
2022-09-19 10:43 ` Laurent Pinchart
2022-09-19 10:20 ` [PATCH v2 2/2] Revert "drm/bridge: chrontel-ch7033: Add byteswap order setting" Robert Foss
2022-09-19 10:47 ` Laurent Pinchart
2022-09-19 10:47 ` Laurent Pinchart
2022-09-19 13:18 ` Robert Foss
2022-09-19 13:18 ` Robert Foss
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.