* [PULL 0/5] loongarch-to-apply queue @ 2022-10-17 6:39 Song Gao 2022-10-17 6:39 ` [PULL 1/5] target/loongarch: bstrins.w src register need EXT_NONE Song Gao ` (5 more replies) 0 siblings, 6 replies; 16+ messages in thread From: Song Gao @ 2022-10-17 6:39 UTC (permalink / raw) To: qemu-devel; +Cc: richard.henderson, stefanha The following changes since commit 5c2439a92ce4a1c5a53070bd803d6f7647e702ca: Merge tag 'pull-riscv-to-apply-20221014' of https://github.com/alistair23/qemu into staging (2022-10-16 15:53:13 -0400) are available in the Git repository at: https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20221017 for you to fetch changes up to 5ef4a4af8b41fb175374726f379a2aea79929023: hw/intc: Fix LoongArch ipi device emulation (2022-10-17 10:28:35 +0800) ---------------------------------------------------------------- pull-loongarch-20221017 ---------------------------------------------------------------- Song Gao (3): target/loongarch: bstrins.w src register need EXT_NONE target/loongarch: Fix fnm{sub/add}_{s/d} set wrong flags softfloat: logB(0) should raise divideByZero exception WANG Xuerui (1): linux-user: Fix struct statfs ABI on loongarch64 Xiaojuan Yang (1): hw/intc: Fix LoongArch ipi device emulation fpu/softfloat-parts.c.inc | 1 + hw/intc/loongarch_ipi.c | 1 - linux-user/syscall_defs.h | 3 ++- target/loongarch/insn_trans/trans_bit.c.inc | 36 ++++++++++++++++---------- target/loongarch/insn_trans/trans_farith.c.inc | 12 ++++----- 5 files changed, 31 insertions(+), 22 deletions(-) ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PULL 1/5] target/loongarch: bstrins.w src register need EXT_NONE 2022-10-17 6:39 [PULL 0/5] loongarch-to-apply queue Song Gao @ 2022-10-17 6:39 ` Song Gao 2022-10-17 6:39 ` [PULL 2/5] target/loongarch: Fix fnm{sub/add}_{s/d} set wrong flags Song Gao ` (4 subsequent siblings) 5 siblings, 0 replies; 16+ messages in thread From: Song Gao @ 2022-10-17 6:39 UTC (permalink / raw) To: qemu-devel; +Cc: richard.henderson, stefanha use gen_bstrins/gen_bstrpic to replace gen_rr_ms_ls. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220930024510.800005-2-gaosong@loongson.cn> --- target/loongarch/insn_trans/trans_bit.c.inc | 36 +++++++++++++-------- 1 file changed, 22 insertions(+), 14 deletions(-) diff --git a/target/loongarch/insn_trans/trans_bit.c.inc b/target/loongarch/insn_trans/trans_bit.c.inc index 9337714ec4..b01e4aeb23 100644 --- a/target/loongarch/insn_trans/trans_bit.c.inc +++ b/target/loongarch/insn_trans/trans_bit.c.inc @@ -27,26 +27,34 @@ static void gen_bytepick_d(TCGv dest, TCGv src1, TCGv src2, target_long sa) tcg_gen_extract2_i64(dest, src1, src2, (64 - sa * 8)); } -static void gen_bstrins(TCGv dest, TCGv src1, - unsigned int ls, unsigned int len) +static bool gen_bstrins(DisasContext *ctx, arg_rr_ms_ls *a, + DisasExtend dst_ext) { - tcg_gen_deposit_tl(dest, dest, src1, ls, len); + TCGv src1 = gpr_src(ctx, a->rd, EXT_NONE); + TCGv src2 = gpr_src(ctx, a->rj, EXT_NONE); + TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE); + + if (a->ls > a->ms) { + return false; + } + + tcg_gen_deposit_tl(dest, src1, src2, a->ls, a->ms - a->ls + 1); + gen_set_gpr(a->rd, dest, dst_ext); + return true; } -static bool gen_rr_ms_ls(DisasContext *ctx, arg_rr_ms_ls *a, - DisasExtend src_ext, DisasExtend dst_ext, - void (*func)(TCGv, TCGv, unsigned int, unsigned int)) +static bool gen_bstrpick(DisasContext *ctx, arg_rr_ms_ls *a, + DisasExtend dst_ext) { - TCGv dest = gpr_dst(ctx, a->rd, dst_ext); - TCGv src1 = gpr_src(ctx, a->rj, src_ext); + TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE); + TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE); if (a->ls > a->ms) { return false; } - func(dest, src1, a->ls, a->ms - a->ls + 1); + tcg_gen_extract_tl(dest, src1, a->ls, a->ms - a->ls + 1); gen_set_gpr(a->rd, dest, dst_ext); - return true; } @@ -206,7 +214,7 @@ TRANS(maskeqz, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_maskeqz) TRANS(masknez, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_masknez) TRANS(bytepick_w, gen_rrr_sa, EXT_NONE, EXT_NONE, gen_bytepick_w) TRANS(bytepick_d, gen_rrr_sa, EXT_NONE, EXT_NONE, gen_bytepick_d) -TRANS(bstrins_w, gen_rr_ms_ls, EXT_NONE, EXT_NONE, gen_bstrins) -TRANS(bstrins_d, gen_rr_ms_ls, EXT_NONE, EXT_NONE, gen_bstrins) -TRANS(bstrpick_w, gen_rr_ms_ls, EXT_NONE, EXT_SIGN, tcg_gen_extract_tl) -TRANS(bstrpick_d, gen_rr_ms_ls, EXT_NONE, EXT_NONE, tcg_gen_extract_tl) +TRANS(bstrins_w, gen_bstrins, EXT_SIGN) +TRANS(bstrins_d, gen_bstrins, EXT_NONE) +TRANS(bstrpick_w, gen_bstrpick, EXT_SIGN) +TRANS(bstrpick_d, gen_bstrpick, EXT_NONE) -- 2.31.1 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 2/5] target/loongarch: Fix fnm{sub/add}_{s/d} set wrong flags 2022-10-17 6:39 [PULL 0/5] loongarch-to-apply queue Song Gao 2022-10-17 6:39 ` [PULL 1/5] target/loongarch: bstrins.w src register need EXT_NONE Song Gao @ 2022-10-17 6:39 ` Song Gao 2022-10-17 6:39 ` [PULL 3/5] softfloat: logB(0) should raise divideByZero exception Song Gao ` (3 subsequent siblings) 5 siblings, 0 replies; 16+ messages in thread From: Song Gao @ 2022-10-17 6:39 UTC (permalink / raw) To: qemu-devel; +Cc: richard.henderson, stefanha Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220930024510.800005-3-gaosong@loongson.cn> --- target/loongarch/insn_trans/trans_farith.c.inc | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/loongarch/insn_trans/trans_farith.c.inc b/target/loongarch/insn_trans/trans_farith.c.inc index 65ad2ffab8..7bb3f41aee 100644 --- a/target/loongarch/insn_trans/trans_farith.c.inc +++ b/target/loongarch/insn_trans/trans_farith.c.inc @@ -97,9 +97,9 @@ TRANS(fmadd_s, gen_muladd, gen_helper_fmuladd_s, 0) TRANS(fmadd_d, gen_muladd, gen_helper_fmuladd_d, 0) TRANS(fmsub_s, gen_muladd, gen_helper_fmuladd_s, float_muladd_negate_c) TRANS(fmsub_d, gen_muladd, gen_helper_fmuladd_d, float_muladd_negate_c) -TRANS(fnmadd_s, gen_muladd, gen_helper_fmuladd_s, - float_muladd_negate_product | float_muladd_negate_c) -TRANS(fnmadd_d, gen_muladd, gen_helper_fmuladd_d, - float_muladd_negate_product | float_muladd_negate_c) -TRANS(fnmsub_s, gen_muladd, gen_helper_fmuladd_s, float_muladd_negate_product) -TRANS(fnmsub_d, gen_muladd, gen_helper_fmuladd_d, float_muladd_negate_product) +TRANS(fnmadd_s, gen_muladd, gen_helper_fmuladd_s, float_muladd_negate_result) +TRANS(fnmadd_d, gen_muladd, gen_helper_fmuladd_d, float_muladd_negate_result) +TRANS(fnmsub_s, gen_muladd, gen_helper_fmuladd_s, + float_muladd_negate_c | float_muladd_negate_result) +TRANS(fnmsub_d, gen_muladd, gen_helper_fmuladd_d, + float_muladd_negate_c | float_muladd_negate_result) -- 2.31.1 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 3/5] softfloat: logB(0) should raise divideByZero exception 2022-10-17 6:39 [PULL 0/5] loongarch-to-apply queue Song Gao 2022-10-17 6:39 ` [PULL 1/5] target/loongarch: bstrins.w src register need EXT_NONE Song Gao 2022-10-17 6:39 ` [PULL 2/5] target/loongarch: Fix fnm{sub/add}_{s/d} set wrong flags Song Gao @ 2022-10-17 6:39 ` Song Gao 2022-10-17 6:39 ` [PULL 4/5] linux-user: Fix struct statfs ABI on loongarch64 Song Gao ` (2 subsequent siblings) 5 siblings, 0 replies; 16+ messages in thread From: Song Gao @ 2022-10-17 6:39 UTC (permalink / raw) To: qemu-devel; +Cc: richard.henderson, stefanha logB(0) should raise divideByZero exception from IEEE 754-2008 spec 7.3 Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220930024510.800005-4-gaosong@loongson.cn> --- fpu/softfloat-parts.c.inc | 1 + 1 file changed, 1 insertion(+) diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc index a9f268fcab..247400031c 100644 --- a/fpu/softfloat-parts.c.inc +++ b/fpu/softfloat-parts.c.inc @@ -1436,6 +1436,7 @@ static void partsN(log2)(FloatPartsN *a, float_status *s, const FloatFmt *fmt) parts_return_nan(a, s); return; case float_class_zero: + float_raise(float_flag_divbyzero, s); /* log2(0) = -inf */ a->cls = float_class_inf; a->sign = 1; -- 2.31.1 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 4/5] linux-user: Fix struct statfs ABI on loongarch64 2022-10-17 6:39 [PULL 0/5] loongarch-to-apply queue Song Gao ` (2 preceding siblings ...) 2022-10-17 6:39 ` [PULL 3/5] softfloat: logB(0) should raise divideByZero exception Song Gao @ 2022-10-17 6:39 ` Song Gao 2022-10-17 6:39 ` [PULL 5/5] hw/intc: Fix LoongArch ipi device emulation Song Gao 2022-10-17 21:22 ` [PULL 0/5] loongarch-to-apply queue Stefan Hajnoczi 5 siblings, 0 replies; 16+ messages in thread From: Song Gao @ 2022-10-17 6:39 UTC (permalink / raw) To: qemu-devel Cc: richard.henderson, stefanha, WANG Xuerui, Xiaojuan Yang, Andreas K . Hüttel, Philippe Mathieu-Daudé From: WANG Xuerui <xen0n@gentoo.org> Previously the 32-bit version was incorrectly chosen, leading to funny but incorrect output from e.g. df(1). Simply select the version corresponding to the 64-bit asm-generic definition. For reference, this program should produce the same output no matter natively compiled or not, for loongarch64 or not: ```c #include <stdio.h> #include <sys/statfs.h> int main(int argc, const char *argv[]) { struct statfs b; if (statfs(argv[0], &b)) return 1; printf("f_type = 0x%lx\n", b.f_type); printf("f_bsize = %ld\n", b.f_bsize); printf("f_blocks = %ld\n", b.f_blocks); printf("f_bfree = %ld\n", b.f_bfree); printf("f_bavail = %ld\n", b.f_bavail); return 0; } // Example output on my amd64 box, with the test binary residing on a // btrfs partition. // Native and emulated output after the fix: // // f_type = 0x9123683e // f_bsize = 4096 // f_blocks = 268435456 // f_bfree = 168406890 // f_bavail = 168355058 // Output before the fix, note the messed layout: // // f_type = 0x10009123683e // f_bsize = 723302085239504896 // f_blocks = 168355058 // f_bfree = 2250817541779750912 // f_bavail = 1099229433104 ``` Fixes: 1f63019632 ("linux-user: Add LoongArch syscall support") Signed-off-by: WANG Xuerui <xen0n@gentoo.org> Cc: Song Gao <gaosong@loongson.cn> Cc: Xiaojuan Yang <yangxiaojuan@loongson.cn> Cc: Andreas K. Hüttel <dilfridge@gentoo.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Andreas K. Huettel <dilfridge@gentoo.org> Message-Id: <20221006100710.427252-1-xen0n@gentoo.org> Signed-off-by: Song Gao <gaosong@loongson.cn> --- linux-user/syscall_defs.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index 01ee10a88f..77864de57f 100644 --- a/linux-user/syscall_defs.h +++ b/linux-user/syscall_defs.h @@ -2262,7 +2262,8 @@ struct target_statfs64 { }; #elif (defined(TARGET_PPC64) || defined(TARGET_X86_64) || \ defined(TARGET_SPARC64) || defined(TARGET_AARCH64) || \ - defined(TARGET_RISCV)) && !defined(TARGET_ABI32) + defined(TARGET_RISCV) || defined(TARGET_LOONGARCH64)) && \ + !defined(TARGET_ABI32) struct target_statfs { abi_long f_type; abi_long f_bsize; -- 2.31.1 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PULL 5/5] hw/intc: Fix LoongArch ipi device emulation 2022-10-17 6:39 [PULL 0/5] loongarch-to-apply queue Song Gao ` (3 preceding siblings ...) 2022-10-17 6:39 ` [PULL 4/5] linux-user: Fix struct statfs ABI on loongarch64 Song Gao @ 2022-10-17 6:39 ` Song Gao 2022-10-17 21:22 ` [PULL 0/5] loongarch-to-apply queue Stefan Hajnoczi 5 siblings, 0 replies; 16+ messages in thread From: Song Gao @ 2022-10-17 6:39 UTC (permalink / raw) To: qemu-devel; +Cc: richard.henderson, stefanha, Xiaojuan Yang From: Xiaojuan Yang <yangxiaojuan@loongson.cn> In ipi_send function, it should not to set irq before writing data to dest cpu iocsr space, as the irq will trigger after data writing. When call this function 'address_space_stl()', it will trigger loongarch_ipi_writel(), the addr arg is 0x1008 ('CORE_SET_OFF'), and qemu_irq_raise will be called in this case. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220930095139.867115-3-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> --- hw/intc/loongarch_ipi.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c index 4f3c58f872..aa4bf9eb74 100644 --- a/hw/intc/loongarch_ipi.c +++ b/hw/intc/loongarch_ipi.c @@ -88,7 +88,6 @@ static void ipi_send(uint64_t val) cs = qemu_get_cpu(cpuid); cpu = LOONGARCH_CPU(cs); env = &cpu->env; - loongarch_cpu_set_irq(cpu, IRQ_IPI, 1); address_space_stl(&env->address_space_iocsr, 0x1008, data, MEMTXATTRS_UNSPECIFIED, NULL); -- 2.31.1 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PULL 0/5] loongarch-to-apply queue 2022-10-17 6:39 [PULL 0/5] loongarch-to-apply queue Song Gao ` (4 preceding siblings ...) 2022-10-17 6:39 ` [PULL 5/5] hw/intc: Fix LoongArch ipi device emulation Song Gao @ 2022-10-17 21:22 ` Stefan Hajnoczi 5 siblings, 0 replies; 16+ messages in thread From: Stefan Hajnoczi @ 2022-10-17 21:22 UTC (permalink / raw) To: Song Gao; +Cc: qemu-devel, richard.henderson, stefanha [-- Attachment #1: Type: text/plain, Size: 115 bytes --] Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/7.2 for any user-visible changes. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --] ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PULL 0/5] loongarch-to-apply queue @ 2023-03-03 2:40 Song Gao 2023-03-04 13:59 ` Peter Maydell 0 siblings, 1 reply; 16+ messages in thread From: Song Gao @ 2023-03-03 2:40 UTC (permalink / raw) To: qemu-devel; +Cc: richard.henderson, peter.maydell The following changes since commit 262312d7ba6e2966acedb4f9c134fd19176b4083: Merge tag 'pull-testing-next-010323-1' of https://gitlab.com/stsquad/qemu into staging (2023-03-02 13:02:53 +0000) are available in the Git repository at: https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230303 for you to fetch changes up to 0d588c4f999699a430b32c563fe9ccc1710b8fd7: hw/loongarch/virt: add system_powerdown hmp command support (2023-03-03 09:37:30 +0800) ---------------------------------------------------------------- pull-loongarch-20230303 ---------------------------------------------------------------- Bibo Mao (1): hw/loongarch/virt: rename PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASE Song Gao (4): loongarch: Add smbios command line option. docs/system/loongarch: update loongson3.rst and rename it to virt.rst target/loongarch: Implement Chip Configuraiton Version Register(0x0000) hw/loongarch/virt: add system_powerdown hmp command support docs/system/loongarch/{loongson3.rst => virt.rst} | 97 +++++++++-------------- hw/loongarch/acpi-build.c | 3 +- hw/loongarch/virt.c | 20 ++++- include/hw/loongarch/virt.h | 1 + include/hw/pci-host/ls7a.h | 17 ++-- qemu-options.hx | 2 +- target/loongarch/cpu.c | 2 + target/loongarch/cpu.h | 1 + 8 files changed, 70 insertions(+), 73 deletions(-) rename docs/system/loongarch/{loongson3.rst => virt.rst} (51%) ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PULL 0/5] loongarch-to-apply queue 2023-03-03 2:40 Song Gao @ 2023-03-04 13:59 ` Peter Maydell 0 siblings, 0 replies; 16+ messages in thread From: Peter Maydell @ 2023-03-04 13:59 UTC (permalink / raw) To: Song Gao; +Cc: qemu-devel, richard.henderson On Fri, 3 Mar 2023 at 02:41, Song Gao <gaosong@loongson.cn> wrote: > > The following changes since commit 262312d7ba6e2966acedb4f9c134fd19176b4083: > > Merge tag 'pull-testing-next-010323-1' of https://gitlab.com/stsquad/qemu into staging (2023-03-02 13:02:53 +0000) > > are available in the Git repository at: > > https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230303 > > for you to fetch changes up to 0d588c4f999699a430b32c563fe9ccc1710b8fd7: > > hw/loongarch/virt: add system_powerdown hmp command support (2023-03-03 09:37:30 +0800) > > ---------------------------------------------------------------- > pull-loongarch-20230303 > > ---------------------------------------------------------------- > Bibo Mao (1): > hw/loongarch/virt: rename PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASE > > Song Gao (4): > loongarch: Add smbios command line option. > docs/system/loongarch: update loongson3.rst and rename it to virt.rst > target/loongarch: Implement Chip Configuraiton Version Register(0x0000) > hw/loongarch/virt: add system_powerdown hmp command support Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/8.0 for any user-visible changes. -- PMM ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PULL 0/5] loongarch-to-apply queue @ 2023-05-15 11:19 Song Gao 2023-05-15 17:13 ` Richard Henderson 0 siblings, 1 reply; 16+ messages in thread From: Song Gao @ 2023-05-15 11:19 UTC (permalink / raw) To: qemu-devel; +Cc: richard.henderson The following changes since commit 8844bb8d896595ee1d25d21c770e6e6f29803097: Merge tag 'or1k-pull-request-20230513' of https://github.com/stffrdhrn/qemu into staging (2023-05-13 11:23:14 +0100) are available in the Git repository at: https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230515 for you to fetch changes up to 7ef0eb35a4e6961d7e40f03f16ed241c95ae93f9: hw/intc: Add NULL pointer check on LoongArch ipi device (2023-05-15 19:09:33 +0800) ---------------------------------------------------------------- pull-loongarch-20230515 ---------------------------------------------------------------- Alexander Bulekov (1): loongarch: mark loongarch_ipi_iocsr re-entrnacy safe Song Gao (4): tests/avocado: Add LoongArch machine start test hw/loongarch/virt: Modify ipi as percpu device hw/loongarch/virt: Set max 256 cpus support on loongarch virt machine hw/intc: Add NULL pointer check on LoongArch ipi device MAINTAINERS | 1 + hw/intc/loongarch_extioi.c | 4 +- hw/intc/loongarch_ipi.c | 86 +++++++++++++++++++++----------------- hw/intc/trace-events | 1 + hw/loongarch/virt.c | 25 ++++++----- include/hw/intc/loongarch_extioi.h | 10 +++-- include/hw/intc/loongarch_ipi.h | 10 ++--- include/hw/loongarch/virt.h | 3 +- tests/avocado/machine_loongarch.py | 58 +++++++++++++++++++++++++ 9 files changed, 136 insertions(+), 62 deletions(-) create mode 100644 tests/avocado/machine_loongarch.py ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PULL 0/5] loongarch-to-apply queue 2023-05-15 11:19 Song Gao @ 2023-05-15 17:13 ` Richard Henderson 0 siblings, 0 replies; 16+ messages in thread From: Richard Henderson @ 2023-05-15 17:13 UTC (permalink / raw) To: Song Gao, qemu-devel On 5/15/23 04:19, Song Gao wrote: > The following changes since commit 8844bb8d896595ee1d25d21c770e6e6f29803097: > > Merge tag 'or1k-pull-request-20230513' ofhttps://github.com/stffrdhrn/qemu into staging (2023-05-13 11:23:14 +0100) > > are available in the Git repository at: > > https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230515 > > for you to fetch changes up to 7ef0eb35a4e6961d7e40f03f16ed241c95ae93f9: > > hw/intc: Add NULL pointer check on LoongArch ipi device (2023-05-15 19:09:33 +0800) > > ---------------------------------------------------------------- > pull-loongarch-20230515 Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/8.1 as appropriate. r~ ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PULL 0/5] loongarch-to-apply queue @ 2023-06-16 10:01 Song Gao 2023-06-17 8:02 ` Richard Henderson 0 siblings, 1 reply; 16+ messages in thread From: Song Gao @ 2023-06-16 10:01 UTC (permalink / raw) To: qemu-devel; +Cc: richard.henderson The following changes since commit 7efd65423ab22e6f5890ca08ae40c84d6660242f: Merge tag 'pull-riscv-to-apply-20230614' of https://github.com/alistair23/qemu into staging (2023-06-14 05:28:51 +0200) are available in the Git repository at: https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230616 for you to fetch changes up to 505aa8d8f29b79fcef77563bb4124208badbd8d4: target/loongarch: Fix CSR.DMW0-3.VSEG check (2023-06-16 17:58:46 +0800) ---------------------------------------------------------------- pull-loongarch-20230616 * Fix CSR.DMW0-3.VSEG check * Add cpu arch_id support * Set physical cpuid route for LoongArch ipi device * Add numa support * Supplement cpu topology arguments ---------------------------------------------------------------- Jiajie Chen (1): target/loongarch: Fix CSR.DMW0-3.VSEG check Tianrui Zhao (4): hw/loongarch/virt: Add cpu arch_id support hw/intc: Set physical cpuid route for LoongArch ipi device hw/loongarch: Add numa support hw/loongarch: Supplement cpu topology arguments hw/intc/loongarch_ipi.c | 44 +++++++++++-- hw/loongarch/Kconfig | 1 + hw/loongarch/acpi-build.c | 78 ++++++++++++++++++----- hw/loongarch/virt.c | 144 ++++++++++++++++++++++++++++++++++++++---- target/loongarch/cpu.h | 2 + target/loongarch/tlb_helper.c | 4 +- 6 files changed, 235 insertions(+), 38 deletions(-) ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PULL 0/5] loongarch-to-apply queue 2023-06-16 10:01 Song Gao @ 2023-06-17 8:02 ` Richard Henderson 0 siblings, 0 replies; 16+ messages in thread From: Richard Henderson @ 2023-06-17 8:02 UTC (permalink / raw) To: Song Gao, qemu-devel On 6/16/23 12:01, Song Gao wrote: > The following changes since commit 7efd65423ab22e6f5890ca08ae40c84d6660242f: > > Merge tag 'pull-riscv-to-apply-20230614' ofhttps://github.com/alistair23/qemu into staging (2023-06-14 05:28:51 +0200) > > are available in the Git repository at: > > https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230616 > > for you to fetch changes up to 505aa8d8f29b79fcef77563bb4124208badbd8d4: > > target/loongarch: Fix CSR.DMW0-3.VSEG check (2023-06-16 17:58:46 +0800) > > ---------------------------------------------------------------- > pull-loongarch-20230616 > > * Fix CSR.DMW0-3.VSEG check > * Add cpu arch_id support > * Set physical cpuid route for LoongArch ipi device > * Add numa support > * Supplement cpu topology arguments Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/8.1 as appropriate. r~ ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PULL 0/5] loongarch-to-apply queue @ 2024-05-16 9:11 Song Gao 2024-05-16 9:28 ` Peter Maydell 0 siblings, 1 reply; 16+ messages in thread From: Song Gao @ 2024-05-16 9:11 UTC (permalink / raw) To: qemu-devel; +Cc: richard.henderson The following changes since commit 922582ace2df59572a671f5c0c5c6c5c706995e5: Merge tag 'pull-hppa-20240515' of https://gitlab.com/rth7680/qemu into staging (2024-05-15 11:46:58 +0200) are available in the Git repository at: https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240516 for you to fetch changes up to d55d16700a2e2b36c7e34724d4d77f4a75c5243a: target/loongarch/kvm: fpu save the vreg registers high 192bit (2024-05-16 16:32:35 +0800) ---------------------------------------------------------------- pull-loongarch-20240516 ---------------------------------------------------------------- Bibo Mao (3): hw/loongarch: Add compat machine for 9.1 hw/loongarch: Remove minimum and default memory size tests: Add migration test for loongarch64 Song Gao (2): target/loongarch/kvm: Fix VM recovery from disk failures target/loongarch/kvm: fpu save the vreg registers high 192bit hw/loongarch/virt.c | 66 +++++++++++++++++++++++--------- target/loongarch/kvm/kvm.c | 6 +++ target/loongarch/machine.c | 6 ++- tests/migration/Makefile | 2 +- tests/migration/loongarch64/Makefile | 18 +++++++++ tests/migration/loongarch64/a-b-kernel.S | 49 ++++++++++++++++++++++++ tests/migration/loongarch64/a-b-kernel.h | 16 ++++++++ tests/migration/migration-test.h | 3 ++ tests/qtest/meson.build | 2 +- tests/qtest/migration-test.c | 10 +++++ 10 files changed, 156 insertions(+), 22 deletions(-) create mode 100644 tests/migration/loongarch64/Makefile create mode 100644 tests/migration/loongarch64/a-b-kernel.S create mode 100644 tests/migration/loongarch64/a-b-kernel.h ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PULL 0/5] loongarch-to-apply queue 2024-05-16 9:11 Song Gao @ 2024-05-16 9:28 ` Peter Maydell 2024-05-17 1:06 ` gaosong 0 siblings, 1 reply; 16+ messages in thread From: Peter Maydell @ 2024-05-16 9:28 UTC (permalink / raw) To: Song Gao; +Cc: qemu-devel, richard.henderson On Thu, 16 May 2024 at 10:12, Song Gao <gaosong@loongson.cn> wrote: > > The following changes since commit 922582ace2df59572a671f5c0c5c6c5c706995e5: > > Merge tag 'pull-hppa-20240515' of https://gitlab.com/rth7680/qemu into staging (2024-05-15 11:46:58 +0200) > > are available in the Git repository at: > > https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240516 > > for you to fetch changes up to d55d16700a2e2b36c7e34724d4d77f4a75c5243a: > > target/loongarch/kvm: fpu save the vreg registers high 192bit (2024-05-16 16:32:35 +0800) > > ---------------------------------------------------------------- > pull-loongarch-20240516 > > ---------------------------------------------------------------- > Bibo Mao (3): > hw/loongarch: Add compat machine for 9.1 > hw/loongarch: Remove minimum and default memory size > tests: Add migration test for loongarch64 RTH: I had a comment about adding the versioned machine type, so we should hold off on applying this until that is resolved, I think. thanks -- PMM ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PULL 0/5] loongarch-to-apply queue 2024-05-16 9:28 ` Peter Maydell @ 2024-05-17 1:06 ` gaosong 0 siblings, 0 replies; 16+ messages in thread From: gaosong @ 2024-05-17 1:06 UTC (permalink / raw) To: Peter Maydell; +Cc: qemu-devel, richard.henderson 在 2024/5/16 下午5:28, Peter Maydell 写道: > On Thu, 16 May 2024 at 10:12, Song Gao <gaosong@loongson.cn> wrote: >> The following changes since commit 922582ace2df59572a671f5c0c5c6c5c706995e5: >> >> Merge tag 'pull-hppa-20240515' of https://gitlab.com/rth7680/qemu into staging (2024-05-15 11:46:58 +0200) >> >> are available in the Git repository at: >> >> https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240516 >> >> for you to fetch changes up to d55d16700a2e2b36c7e34724d4d77f4a75c5243a: >> >> target/loongarch/kvm: fpu save the vreg registers high 192bit (2024-05-16 16:32:35 +0800) >> >> ---------------------------------------------------------------- >> pull-loongarch-20240516 >> >> ---------------------------------------------------------------- >> Bibo Mao (3): >> hw/loongarch: Add compat machine for 9.1 >> hw/loongarch: Remove minimum and default memory size >> tests: Add migration test for loongarch64 > RTH: I had a comment about adding the versioned machine type, so we > should hold off on applying this until that is resolved, I think. Agreed, We will try resolved it. Thanks for your explanation. Thanks. Song Gao > thanks > -- PMM ^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2024-05-17 1:06 UTC | newest] Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-10-17 6:39 [PULL 0/5] loongarch-to-apply queue Song Gao 2022-10-17 6:39 ` [PULL 1/5] target/loongarch: bstrins.w src register need EXT_NONE Song Gao 2022-10-17 6:39 ` [PULL 2/5] target/loongarch: Fix fnm{sub/add}_{s/d} set wrong flags Song Gao 2022-10-17 6:39 ` [PULL 3/5] softfloat: logB(0) should raise divideByZero exception Song Gao 2022-10-17 6:39 ` [PULL 4/5] linux-user: Fix struct statfs ABI on loongarch64 Song Gao 2022-10-17 6:39 ` [PULL 5/5] hw/intc: Fix LoongArch ipi device emulation Song Gao 2022-10-17 21:22 ` [PULL 0/5] loongarch-to-apply queue Stefan Hajnoczi 2023-03-03 2:40 Song Gao 2023-03-04 13:59 ` Peter Maydell 2023-05-15 11:19 Song Gao 2023-05-15 17:13 ` Richard Henderson 2023-06-16 10:01 Song Gao 2023-06-17 8:02 ` Richard Henderson 2024-05-16 9:11 Song Gao 2024-05-16 9:28 ` Peter Maydell 2024-05-17 1:06 ` gaosong
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