From: Vyacheslav Bocharov <adeep@lexina.in>
To: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 3/4] arm64: amlogic: dts: meson: update meson-axg device-tree for new core, tx, rx phase clock settings.
Date: Thu, 10 Nov 2022 18:00:34 +0300 [thread overview]
Message-ID: <20221110150035.2824580-4-adeep@lexina.in> (raw)
In-Reply-To: <20221110150035.2824580-1-adeep@lexina.in>
Use phase 270 for core MMC clock on axg meson boards.
Tested on JetHub J100/110 devices.
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 04f797b5a012..0af4784d84c7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -13,6 +13,7 @@
#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
#include <dt-bindings/reset/amlogic,meson-axg-reset.h>
#include <dt-bindings/power/meson-axg-power.h>
+#include <dt-bindings/mmc/meson-gx-mmc.h>
/ {
compatible = "amlogic,meson-axg";
@@ -1891,6 +1892,7 @@ sd_emmc_b: sd@5000 {
<&clkc CLKID_SD_EMMC_B_CLK0>,
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
+ amlogic,mmc-phase = <CLK_PHASE_270 CLK_PHASE_0 CLK_PHASE_0>;
resets = <&reset RESET_SD_EMMC_B>;
};
@@ -1904,6 +1906,7 @@ sd_emmc_c: mmc@7000 {
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_C>;
+ amlogic,mmc-phase = <CLK_PHASE_270 CLK_PHASE_0 CLK_PHASE_0>;
};
usb2_phy1: phy@9020 {
--
2.30.2
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
WARNING: multiple messages have this Message-ID (diff)
From: Vyacheslav Bocharov <adeep@lexina.in>
To: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 3/4] arm64: amlogic: dts: meson: update meson-axg device-tree for new core, tx, rx phase clock settings.
Date: Thu, 10 Nov 2022 18:00:34 +0300 [thread overview]
Message-ID: <20221110150035.2824580-4-adeep@lexina.in> (raw)
In-Reply-To: <20221110150035.2824580-1-adeep@lexina.in>
Use phase 270 for core MMC clock on axg meson boards.
Tested on JetHub J100/110 devices.
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 04f797b5a012..0af4784d84c7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -13,6 +13,7 @@
#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
#include <dt-bindings/reset/amlogic,meson-axg-reset.h>
#include <dt-bindings/power/meson-axg-power.h>
+#include <dt-bindings/mmc/meson-gx-mmc.h>
/ {
compatible = "amlogic,meson-axg";
@@ -1891,6 +1892,7 @@ sd_emmc_b: sd@5000 {
<&clkc CLKID_SD_EMMC_B_CLK0>,
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
+ amlogic,mmc-phase = <CLK_PHASE_270 CLK_PHASE_0 CLK_PHASE_0>;
resets = <&reset RESET_SD_EMMC_B>;
};
@@ -1904,6 +1906,7 @@ sd_emmc_c: mmc@7000 {
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_C>;
+ amlogic,mmc-phase = <CLK_PHASE_270 CLK_PHASE_0 CLK_PHASE_0>;
};
usb2_phy1: phy@9020 {
--
2.30.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Vyacheslav Bocharov <adeep@lexina.in>
To: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 3/4] arm64: amlogic: dts: meson: update meson-axg device-tree for new core, tx, rx phase clock settings.
Date: Thu, 10 Nov 2022 18:00:34 +0300 [thread overview]
Message-ID: <20221110150035.2824580-4-adeep@lexina.in> (raw)
In-Reply-To: <20221110150035.2824580-1-adeep@lexina.in>
Use phase 270 for core MMC clock on axg meson boards.
Tested on JetHub J100/110 devices.
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 04f797b5a012..0af4784d84c7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -13,6 +13,7 @@
#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
#include <dt-bindings/reset/amlogic,meson-axg-reset.h>
#include <dt-bindings/power/meson-axg-power.h>
+#include <dt-bindings/mmc/meson-gx-mmc.h>
/ {
compatible = "amlogic,meson-axg";
@@ -1891,6 +1892,7 @@ sd_emmc_b: sd@5000 {
<&clkc CLKID_SD_EMMC_B_CLK0>,
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
+ amlogic,mmc-phase = <CLK_PHASE_270 CLK_PHASE_0 CLK_PHASE_0>;
resets = <&reset RESET_SD_EMMC_B>;
};
@@ -1904,6 +1906,7 @@ sd_emmc_c: mmc@7000 {
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_C>;
+ amlogic,mmc-phase = <CLK_PHASE_270 CLK_PHASE_0 CLK_PHASE_0>;
};
usb2_phy1: phy@9020 {
--
2.30.2
next prev parent reply other threads:[~2022-11-10 15:01 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-10 15:00 [PATCH 0/4] arm64: amlogic: mmc: meson-gx: Add core, tx, rx Vyacheslav Bocharov
2022-11-10 15:00 ` Vyacheslav Bocharov
2022-11-10 15:00 ` Vyacheslav Bocharov
2022-11-10 15:00 ` [PATCH 1/4] arm64: amlogic: mmc: meson-gx: Add core, tx, rx eMMC/SD/SDIO phase clock settings from devicetree data Vyacheslav Bocharov
2022-11-10 15:00 ` Vyacheslav Bocharov
2022-11-10 15:00 ` Vyacheslav Bocharov
2022-11-12 22:57 ` Martin Blumenstingl
2022-11-12 22:57 ` Martin Blumenstingl
2022-11-12 22:57 ` Martin Blumenstingl
2022-11-10 15:00 ` [PATCH 2/4] arm64: amlogic: mmc: meson-gx: Add dts binding include for " Vyacheslav Bocharov
2022-11-10 15:00 ` Vyacheslav Bocharov
2022-11-10 15:00 ` Vyacheslav Bocharov
2022-11-12 22:59 ` Martin Blumenstingl
2022-11-12 22:59 ` Martin Blumenstingl
2022-11-12 22:59 ` Martin Blumenstingl
2022-11-10 15:00 ` Vyacheslav Bocharov [this message]
2022-11-10 15:00 ` [PATCH 3/4] arm64: amlogic: dts: meson: update meson-axg device-tree for new core, tx, rx phase clock settings Vyacheslav Bocharov
2022-11-10 15:00 ` Vyacheslav Bocharov
2022-11-10 15:00 ` [PATCH 4/4] arm64: dts: docs: Update mmc meson-gx documentation for new config option amlogic,mmc-phase Vyacheslav Bocharov
2022-11-10 15:00 ` Vyacheslav Bocharov
2022-11-10 15:00 ` Vyacheslav Bocharov
2022-11-12 23:01 ` Martin Blumenstingl
2022-11-12 23:01 ` Martin Blumenstingl
2022-11-12 23:01 ` Martin Blumenstingl
2022-11-23 16:23 ` Krzysztof Kozlowski
2022-11-23 16:23 ` Krzysztof Kozlowski
2022-11-23 16:23 ` Krzysztof Kozlowski
2022-11-13 20:06 ` [PATCH 0/4] arm64: amlogic: mmc: meson-gx: Add core, tx, rx Jerome Brunet
2022-11-13 20:06 ` Jerome Brunet
2022-11-13 20:06 ` Jerome Brunet
2022-11-24 6:22 ` Vyacheslav
2022-11-24 6:22 ` Vyacheslav
2022-11-24 6:22 ` Vyacheslav
2022-11-25 10:28 ` Jerome Brunet
2022-11-25 10:28 ` Jerome Brunet
2022-11-25 10:28 ` Jerome Brunet
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221110150035.2824580-4-adeep@lexina.in \
--to=adeep@lexina.in \
--cc=devicetree@vger.kernel.org \
--cc=linux-amlogic@lists.infradead.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.