* [PATCH 0/5] pwm: Use regmap_clear_bits and regmap_set_bits where applicable
@ 2022-11-15 11:13 ` Uwe Kleine-König
0 siblings, 0 replies; 17+ messages in thread
From: Uwe Kleine-König @ 2022-11-15 11:13 UTC (permalink / raw)
To: Thierry Reding, Fabrice Gasnier, Maxime Coquelin, Alexandre Torgue
Cc: Mark Brown, linux-pwm, kernel, linux-stm32, linux-arm-kernel
Hello,
I recently learned a bit of coccinelle and triggered by Paul Cercueil's
patch that replaces regmap_update_bits() by regmap_set_bits() and
regmap_clear_bits() where applicable in the jz4740 pwm driver[1] I
created a cocci patch for such calls.
This series adapts the other drivers below drivers/pwm accordingly.
Best regards
Uwe
[1] https://lore.kernel.org/linux-pwm/20221024205213.327001-6-paul@crapouillou.net
Uwe Kleine-König (5):
pwm: fsl-ftm: Use regmap_clear_bits and regmap_set_bits where
applicable
pwm: img: Use regmap_clear_bits and regmap_set_bits where applicable
pwm: iqs620a: Use regmap_clear_bits and regmap_set_bits where
applicable
pwm: stm32-lp: Use regmap_clear_bits and regmap_set_bits where
applicable
pwm: stm32: Use regmap_clear_bits and regmap_set_bits where applicable
drivers/pwm/pwm-fsl-ftm.c | 18 +++++++-----------
drivers/pwm/pwm-img.c | 15 +++++++--------
drivers/pwm/pwm-iqs620a.c | 4 ++--
drivers/pwm/pwm-stm32-lp.c | 5 ++---
drivers/pwm/pwm-stm32.c | 34 ++++++++++++++++------------------
5 files changed, 34 insertions(+), 42 deletions(-)
base-commit: 094226ad94f471a9f19e8f8e7140a09c2625abaa
--
2.38.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 17+ messages in thread* [PATCH 1/5] pwm: fsl-ftm: Use regmap_clear_bits and regmap_set_bits where applicable
2022-11-15 11:13 ` Uwe Kleine-König
(?)
@ 2022-11-15 11:13 ` Uwe Kleine-König
-1 siblings, 0 replies; 17+ messages in thread
From: Uwe Kleine-König @ 2022-11-15 11:13 UTC (permalink / raw)
To: Thierry Reding; +Cc: Mark Brown, linux-pwm, kernel
Found using coccinelle and the following semantic patch:
@@
expression map, reg, bits;
@@
- regmap_update_bits(map, reg, bits, bits)
+ regmap_set_bits(map, reg, bits)
@@
expression map, reg, bits;
@@
- regmap_update_bits(map, reg, bits, 0)
+ regmap_clear_bits(map, reg, bits)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
drivers/pwm/pwm-fsl-ftm.c | 18 +++++++-----------
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/pwm/pwm-fsl-ftm.c b/drivers/pwm/pwm-fsl-ftm.c
index 0247757f9a72..5caadbd6194e 100644
--- a/drivers/pwm/pwm-fsl-ftm.c
+++ b/drivers/pwm/pwm-fsl-ftm.c
@@ -65,13 +65,12 @@ static void ftm_clear_write_protection(struct fsl_pwm_chip *fpc)
regmap_read(fpc->regmap, FTM_FMS, &val);
if (val & FTM_FMS_WPEN)
- regmap_update_bits(fpc->regmap, FTM_MODE, FTM_MODE_WPDIS,
- FTM_MODE_WPDIS);
+ regmap_set_bits(fpc->regmap, FTM_MODE, FTM_MODE_WPDIS);
}
static void ftm_set_write_protection(struct fsl_pwm_chip *fpc)
{
- regmap_update_bits(fpc->regmap, FTM_FMS, FTM_FMS_WPEN, FTM_FMS_WPEN);
+ regmap_set_bits(fpc->regmap, FTM_FMS, FTM_FMS_WPEN);
}
static bool fsl_pwm_periodcfg_are_equal(const struct fsl_pwm_periodcfg *a,
@@ -94,8 +93,7 @@ static int fsl_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
ret = clk_prepare_enable(fpc->ipg_clk);
if (!ret && fpc->soc->has_enable_bits) {
mutex_lock(&fpc->lock);
- regmap_update_bits(fpc->regmap, FTM_SC, BIT(pwm->hwpwm + 16),
- BIT(pwm->hwpwm + 16));
+ regmap_set_bits(fpc->regmap, FTM_SC, BIT(pwm->hwpwm + 16));
mutex_unlock(&fpc->lock);
}
@@ -108,8 +106,7 @@ static void fsl_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
if (fpc->soc->has_enable_bits) {
mutex_lock(&fpc->lock);
- regmap_update_bits(fpc->regmap, FTM_SC, BIT(pwm->hwpwm + 16),
- 0);
+ regmap_clear_bits(fpc->regmap, FTM_SC, BIT(pwm->hwpwm + 16));
mutex_unlock(&fpc->lock);
}
@@ -317,8 +314,8 @@ static int fsl_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
if (!newstate->enabled) {
if (oldstate->enabled) {
- regmap_update_bits(fpc->regmap, FTM_OUTMASK,
- BIT(pwm->hwpwm), BIT(pwm->hwpwm));
+ regmap_set_bits(fpc->regmap, FTM_OUTMASK,
+ BIT(pwm->hwpwm));
clk_disable_unprepare(fpc->clk[FSL_PWM_CLK_CNTEN]);
clk_disable_unprepare(fpc->clk[fpc->period.clk_select]);
}
@@ -342,8 +339,7 @@ static int fsl_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
goto end_mutex;
}
- regmap_update_bits(fpc->regmap, FTM_OUTMASK, BIT(pwm->hwpwm),
- 0);
+ regmap_clear_bits(fpc->regmap, FTM_OUTMASK, BIT(pwm->hwpwm));
}
end_mutex:
--
2.38.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 2/5] pwm: img: Use regmap_clear_bits and regmap_set_bits where applicable
2022-11-15 11:13 ` Uwe Kleine-König
(?)
(?)
@ 2022-11-15 11:13 ` Uwe Kleine-König
-1 siblings, 0 replies; 17+ messages in thread
From: Uwe Kleine-König @ 2022-11-15 11:13 UTC (permalink / raw)
To: Thierry Reding; +Cc: Mark Brown, linux-pwm, kernel
Found using coccinelle and the following semantic patch:
@@
expression map, reg, bits;
@@
- regmap_update_bits(map, reg, bits, bits)
+ regmap_set_bits(map, reg, bits)
@@
expression map, reg, bits;
@@
- regmap_update_bits(map, reg, bits, 0)
+ regmap_clear_bits(map, reg, bits)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
drivers/pwm/pwm-img.c | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/pwm/pwm-img.c b/drivers/pwm/pwm-img.c
index 0fccf061ab95..89362afe3c91 100644
--- a/drivers/pwm/pwm-img.c
+++ b/drivers/pwm/pwm-img.c
@@ -161,9 +161,9 @@ static int img_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
val |= BIT(pwm->hwpwm);
img_pwm_writel(imgchip, PWM_CTRL_CFG, val);
- regmap_update_bits(imgchip->periph_regs, PERIP_PWM_PDM_CONTROL,
- PERIP_PWM_PDM_CONTROL_CH_MASK <<
- PERIP_PWM_PDM_CONTROL_CH_SHIFT(pwm->hwpwm), 0);
+ regmap_clear_bits(imgchip->periph_regs, PERIP_PWM_PDM_CONTROL,
+ PERIP_PWM_PDM_CONTROL_CH_MASK <<
+ PERIP_PWM_PDM_CONTROL_CH_SHIFT(pwm->hwpwm));
return 0;
}
@@ -397,11 +397,10 @@ static int img_pwm_resume(struct device *dev)
for (i = 0; i < imgchip->chip.npwm; i++)
if (imgchip->suspend_ctrl_cfg & BIT(i))
- regmap_update_bits(imgchip->periph_regs,
- PERIP_PWM_PDM_CONTROL,
- PERIP_PWM_PDM_CONTROL_CH_MASK <<
- PERIP_PWM_PDM_CONTROL_CH_SHIFT(i),
- 0);
+ regmap_clear_bits(imgchip->periph_regs,
+ PERIP_PWM_PDM_CONTROL,
+ PERIP_PWM_PDM_CONTROL_CH_MASK <<
+ PERIP_PWM_PDM_CONTROL_CH_SHIFT(i));
if (pm_runtime_status_suspended(dev))
img_pwm_runtime_suspend(dev);
--
2.38.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 3/5] pwm: iqs620a: Use regmap_clear_bits and regmap_set_bits where applicable
2022-11-15 11:13 ` Uwe Kleine-König
` (2 preceding siblings ...)
(?)
@ 2022-11-15 11:13 ` Uwe Kleine-König
-1 siblings, 0 replies; 17+ messages in thread
From: Uwe Kleine-König @ 2022-11-15 11:13 UTC (permalink / raw)
To: Thierry Reding; +Cc: Mark Brown, linux-pwm, kernel
Found using coccinelle and the following semantic patch:
@@
expression map, reg, bits;
@@
- regmap_update_bits(map, reg, bits, bits)
+ regmap_set_bits(map, reg, bits)
@@
expression map, reg, bits;
@@
- regmap_update_bits(map, reg, bits, 0)
+ regmap_clear_bits(map, reg, bits)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
drivers/pwm/pwm-iqs620a.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pwm/pwm-iqs620a.c b/drivers/pwm/pwm-iqs620a.c
index 54bd95a5cab0..7246176fce06 100644
--- a/drivers/pwm/pwm-iqs620a.c
+++ b/drivers/pwm/pwm-iqs620a.c
@@ -47,8 +47,8 @@ static int iqs620_pwm_init(struct iqs620_pwm_private *iqs620_pwm,
int ret;
if (!duty_scale)
- return regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
- IQS620_PWR_SETTINGS_PWM_OUT, 0);
+ return regmap_clear_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
+ IQS620_PWR_SETTINGS_PWM_OUT);
ret = regmap_write(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE,
duty_scale - 1);
--
2.38.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 4/5] pwm: stm32-lp: Use regmap_clear_bits and regmap_set_bits where applicable
2022-11-15 11:13 ` Uwe Kleine-König
@ 2022-11-15 11:13 ` Uwe Kleine-König
-1 siblings, 0 replies; 17+ messages in thread
From: Uwe Kleine-König @ 2022-11-15 11:13 UTC (permalink / raw)
To: Fabrice Gasnier, Thierry Reding, Maxime Coquelin, Alexandre Torgue
Cc: Mark Brown, linux-pwm, linux-stm32, linux-arm-kernel, kernel
Found using coccinelle and the following semantic patch:
@@
expression map, reg, bits;
@@
- regmap_update_bits(map, reg, bits, bits)
+ regmap_set_bits(map, reg, bits)
@@
expression map, reg, bits;
@@
- regmap_update_bits(map, reg, bits, 0)
+ regmap_clear_bits(map, reg, bits)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
drivers/pwm/pwm-stm32-lp.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
index 3115abb3f52a..212bdc7d51ee 100644
--- a/drivers/pwm/pwm-stm32-lp.c
+++ b/drivers/pwm/pwm-stm32-lp.c
@@ -140,9 +140,8 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,
if (reenable) {
/* Start LP timer in continuous mode */
- ret = regmap_update_bits(priv->regmap, STM32_LPTIM_CR,
- STM32_LPTIM_CNTSTRT,
- STM32_LPTIM_CNTSTRT);
+ ret = regmap_set_bits(priv->regmap, STM32_LPTIM_CR,
+ STM32_LPTIM_CNTSTRT);
if (ret) {
regmap_write(priv->regmap, STM32_LPTIM_CR, 0);
goto err;
--
2.38.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 4/5] pwm: stm32-lp: Use regmap_clear_bits and regmap_set_bits where applicable
@ 2022-11-15 11:13 ` Uwe Kleine-König
0 siblings, 0 replies; 17+ messages in thread
From: Uwe Kleine-König @ 2022-11-15 11:13 UTC (permalink / raw)
To: Fabrice Gasnier, Thierry Reding, Maxime Coquelin, Alexandre Torgue
Cc: Mark Brown, linux-pwm, linux-stm32, linux-arm-kernel, kernel
Found using coccinelle and the following semantic patch:
@@
expression map, reg, bits;
@@
- regmap_update_bits(map, reg, bits, bits)
+ regmap_set_bits(map, reg, bits)
@@
expression map, reg, bits;
@@
- regmap_update_bits(map, reg, bits, 0)
+ regmap_clear_bits(map, reg, bits)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
drivers/pwm/pwm-stm32-lp.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
index 3115abb3f52a..212bdc7d51ee 100644
--- a/drivers/pwm/pwm-stm32-lp.c
+++ b/drivers/pwm/pwm-stm32-lp.c
@@ -140,9 +140,8 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,
if (reenable) {
/* Start LP timer in continuous mode */
- ret = regmap_update_bits(priv->regmap, STM32_LPTIM_CR,
- STM32_LPTIM_CNTSTRT,
- STM32_LPTIM_CNTSTRT);
+ ret = regmap_set_bits(priv->regmap, STM32_LPTIM_CR,
+ STM32_LPTIM_CNTSTRT);
if (ret) {
regmap_write(priv->regmap, STM32_LPTIM_CR, 0);
goto err;
--
2.38.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 4/5] pwm: stm32-lp: Use regmap_clear_bits and regmap_set_bits where applicable
2022-11-15 11:13 ` Uwe Kleine-König
@ 2022-11-23 10:23 ` Fabrice Gasnier
-1 siblings, 0 replies; 17+ messages in thread
From: Fabrice Gasnier @ 2022-11-23 10:23 UTC (permalink / raw)
To: Uwe Kleine-König, Thierry Reding, Maxime Coquelin, Alexandre Torgue
Cc: Mark Brown, linux-pwm, linux-stm32, linux-arm-kernel, kernel
On 11/15/22 12:13, Uwe Kleine-König wrote:
> Found using coccinelle and the following semantic patch:
>
> @@
> expression map, reg, bits;
> @@
>
> - regmap_update_bits(map, reg, bits, bits)
> + regmap_set_bits(map, reg, bits)
>
> @@
> expression map, reg, bits;
> @@
>
> - regmap_update_bits(map, reg, bits, 0)
> + regmap_clear_bits(map, reg, bits)
>
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
> drivers/pwm/pwm-stm32-lp.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
> index 3115abb3f52a..212bdc7d51ee 100644
> --- a/drivers/pwm/pwm-stm32-lp.c
> +++ b/drivers/pwm/pwm-stm32-lp.c
> @@ -140,9 +140,8 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,
>
> if (reenable) {
> /* Start LP timer in continuous mode */
> - ret = regmap_update_bits(priv->regmap, STM32_LPTIM_CR,
> - STM32_LPTIM_CNTSTRT,
> - STM32_LPTIM_CNTSTRT);
> + ret = regmap_set_bits(priv->regmap, STM32_LPTIM_CR,
> + STM32_LPTIM_CNTSTRT);
Hi Uwe,
One minor suggestion here: could fit into a single line.
You can add my:
Tested-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Best Regards,
Thanks
Fabrice
> if (ret) {
> regmap_write(priv->regmap, STM32_LPTIM_CR, 0);
> goto err;
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH 4/5] pwm: stm32-lp: Use regmap_clear_bits and regmap_set_bits where applicable
@ 2022-11-23 10:23 ` Fabrice Gasnier
0 siblings, 0 replies; 17+ messages in thread
From: Fabrice Gasnier @ 2022-11-23 10:23 UTC (permalink / raw)
To: Uwe Kleine-König, Thierry Reding, Maxime Coquelin, Alexandre Torgue
Cc: Mark Brown, linux-pwm, linux-stm32, linux-arm-kernel, kernel
On 11/15/22 12:13, Uwe Kleine-König wrote:
> Found using coccinelle and the following semantic patch:
>
> @@
> expression map, reg, bits;
> @@
>
> - regmap_update_bits(map, reg, bits, bits)
> + regmap_set_bits(map, reg, bits)
>
> @@
> expression map, reg, bits;
> @@
>
> - regmap_update_bits(map, reg, bits, 0)
> + regmap_clear_bits(map, reg, bits)
>
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
> drivers/pwm/pwm-stm32-lp.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
> index 3115abb3f52a..212bdc7d51ee 100644
> --- a/drivers/pwm/pwm-stm32-lp.c
> +++ b/drivers/pwm/pwm-stm32-lp.c
> @@ -140,9 +140,8 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,
>
> if (reenable) {
> /* Start LP timer in continuous mode */
> - ret = regmap_update_bits(priv->regmap, STM32_LPTIM_CR,
> - STM32_LPTIM_CNTSTRT,
> - STM32_LPTIM_CNTSTRT);
> + ret = regmap_set_bits(priv->regmap, STM32_LPTIM_CR,
> + STM32_LPTIM_CNTSTRT);
Hi Uwe,
One minor suggestion here: could fit into a single line.
You can add my:
Tested-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Best Regards,
Thanks
Fabrice
> if (ret) {
> regmap_write(priv->regmap, STM32_LPTIM_CR, 0);
> goto err;
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH 4/5] pwm: stm32-lp: Use regmap_clear_bits and regmap_set_bits where applicable
2022-11-23 10:23 ` Fabrice Gasnier
@ 2022-12-02 17:57 ` Uwe Kleine-König
-1 siblings, 0 replies; 17+ messages in thread
From: Uwe Kleine-König @ 2022-12-02 17:57 UTC (permalink / raw)
To: Fabrice Gasnier
Cc: Thierry Reding, Maxime Coquelin, Alexandre Torgue, kernel,
linux-pwm, Mark Brown, linux-stm32, linux-arm-kernel
[-- Attachment #1: Type: text/plain, Size: 1671 bytes --]
On Wed, Nov 23, 2022 at 11:23:14AM +0100, Fabrice Gasnier wrote:
> On 11/15/22 12:13, Uwe Kleine-König wrote:
> > Found using coccinelle and the following semantic patch:
> >
> > @@
> > expression map, reg, bits;
> > @@
> >
> > - regmap_update_bits(map, reg, bits, bits)
> > + regmap_set_bits(map, reg, bits)
> >
> > @@
> > expression map, reg, bits;
> > @@
> >
> > - regmap_update_bits(map, reg, bits, 0)
> > + regmap_clear_bits(map, reg, bits)
> >
> > Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> > ---
> > drivers/pwm/pwm-stm32-lp.c | 5 ++---
> > 1 file changed, 2 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
> > index 3115abb3f52a..212bdc7d51ee 100644
> > --- a/drivers/pwm/pwm-stm32-lp.c
> > +++ b/drivers/pwm/pwm-stm32-lp.c
> > @@ -140,9 +140,8 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,
> >
> > if (reenable) {
> > /* Start LP timer in continuous mode */
> > - ret = regmap_update_bits(priv->regmap, STM32_LPTIM_CR,
> > - STM32_LPTIM_CNTSTRT,
> > - STM32_LPTIM_CNTSTRT);
> > + ret = regmap_set_bits(priv->regmap, STM32_LPTIM_CR,
> > + STM32_LPTIM_CNTSTRT);
>
> Hi Uwe,
>
> One minor suggestion here: could fit into a single line.
That would make the line 89 chars long (counting tag as usual as 8). Up
to now there is no line longer than 78 chars. So I'd not join the two
lines.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH 4/5] pwm: stm32-lp: Use regmap_clear_bits and regmap_set_bits where applicable
@ 2022-12-02 17:57 ` Uwe Kleine-König
0 siblings, 0 replies; 17+ messages in thread
From: Uwe Kleine-König @ 2022-12-02 17:57 UTC (permalink / raw)
To: Fabrice Gasnier
Cc: Thierry Reding, Maxime Coquelin, Alexandre Torgue, kernel,
linux-pwm, Mark Brown, linux-stm32, linux-arm-kernel
[-- Attachment #1.1: Type: text/plain, Size: 1671 bytes --]
On Wed, Nov 23, 2022 at 11:23:14AM +0100, Fabrice Gasnier wrote:
> On 11/15/22 12:13, Uwe Kleine-König wrote:
> > Found using coccinelle and the following semantic patch:
> >
> > @@
> > expression map, reg, bits;
> > @@
> >
> > - regmap_update_bits(map, reg, bits, bits)
> > + regmap_set_bits(map, reg, bits)
> >
> > @@
> > expression map, reg, bits;
> > @@
> >
> > - regmap_update_bits(map, reg, bits, 0)
> > + regmap_clear_bits(map, reg, bits)
> >
> > Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> > ---
> > drivers/pwm/pwm-stm32-lp.c | 5 ++---
> > 1 file changed, 2 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
> > index 3115abb3f52a..212bdc7d51ee 100644
> > --- a/drivers/pwm/pwm-stm32-lp.c
> > +++ b/drivers/pwm/pwm-stm32-lp.c
> > @@ -140,9 +140,8 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,
> >
> > if (reenable) {
> > /* Start LP timer in continuous mode */
> > - ret = regmap_update_bits(priv->regmap, STM32_LPTIM_CR,
> > - STM32_LPTIM_CNTSTRT,
> > - STM32_LPTIM_CNTSTRT);
> > + ret = regmap_set_bits(priv->regmap, STM32_LPTIM_CR,
> > + STM32_LPTIM_CNTSTRT);
>
> Hi Uwe,
>
> One minor suggestion here: could fit into a single line.
That would make the line 89 chars long (counting tag as usual as 8). Up
to now there is no line longer than 78 chars. So I'd not join the two
lines.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 5/5] pwm: stm32: Use regmap_clear_bits and regmap_set_bits where applicable
2022-11-15 11:13 ` Uwe Kleine-König
@ 2022-11-15 11:13 ` Uwe Kleine-König
-1 siblings, 0 replies; 17+ messages in thread
From: Uwe Kleine-König @ 2022-11-15 11:13 UTC (permalink / raw)
To: Fabrice Gasnier, Thierry Reding, Maxime Coquelin, Alexandre Torgue
Cc: Mark Brown, linux-pwm, linux-stm32, linux-arm-kernel, kernel
Found using coccinelle and the following semantic patch:
@@
expression map, reg, bits;
@@
- regmap_update_bits(map, reg, bits, bits)
+ regmap_set_bits(map, reg, bits)
@@
expression map, reg, bits;
@@
- regmap_update_bits(map, reg, bits, 0)
+ regmap_clear_bits(map, reg, bits)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
drivers/pwm/pwm-stm32.c | 34 ++++++++++++++++------------------
1 file changed, 16 insertions(+), 18 deletions(-)
diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c
index 794ca5b02968..21e4a34dfff3 100644
--- a/drivers/pwm/pwm-stm32.c
+++ b/drivers/pwm/pwm-stm32.c
@@ -115,14 +115,14 @@ static int stm32_pwm_raw_capture(struct stm32_pwm *priv, struct pwm_device *pwm,
int ret;
/* Ensure registers have been updated, enable counter and capture */
- regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG);
- regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN);
+ regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG);
+ regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
/* Use cc1 or cc3 DMA resp for PWM input channels 1 & 2 or 3 & 4 */
dma_id = pwm->hwpwm < 2 ? STM32_TIMERS_DMA_CH1 : STM32_TIMERS_DMA_CH3;
ccen = pwm->hwpwm < 2 ? TIM_CCER_CC12E : TIM_CCER_CC34E;
ccr = pwm->hwpwm < 2 ? TIM_CCR1 : TIM_CCR3;
- regmap_update_bits(priv->regmap, TIM_CCER, ccen, ccen);
+ regmap_set_bits(priv->regmap, TIM_CCER, ccen);
/*
* Timer DMA burst mode. Request 2 registers, 2 bursts, to get both
@@ -160,8 +160,8 @@ static int stm32_pwm_raw_capture(struct stm32_pwm *priv, struct pwm_device *pwm,
}
stop:
- regmap_update_bits(priv->regmap, TIM_CCER, ccen, 0);
- regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
+ regmap_clear_bits(priv->regmap, TIM_CCER, ccen);
+ regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
return ret;
}
@@ -359,7 +359,7 @@ static int stm32_pwm_config(struct stm32_pwm *priv, int ch,
regmap_write(priv->regmap, TIM_PSC, prescaler);
regmap_write(priv->regmap, TIM_ARR, prd - 1);
- regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, TIM_CR1_ARPE);
+ regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE);
/* Calculate the duty cycles */
dty = prd * duty_ns;
@@ -377,7 +377,7 @@ static int stm32_pwm_config(struct stm32_pwm *priv, int ch,
else
regmap_update_bits(priv->regmap, TIM_CCMR2, mask, ccmr);
- regmap_update_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE, TIM_BDTR_MOE);
+ regmap_set_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE);
return 0;
}
@@ -411,13 +411,13 @@ static int stm32_pwm_enable(struct stm32_pwm *priv, int ch)
if (priv->have_complementary_output)
mask |= TIM_CCER_CC1NE << (ch * 4);
- regmap_update_bits(priv->regmap, TIM_CCER, mask, mask);
+ regmap_set_bits(priv->regmap, TIM_CCER, mask);
/* Make sure that registers are updated */
- regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG);
+ regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG);
/* Enable controller */
- regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN);
+ regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
return 0;
}
@@ -431,11 +431,11 @@ static void stm32_pwm_disable(struct stm32_pwm *priv, int ch)
if (priv->have_complementary_output)
mask |= TIM_CCER_CC1NE << (ch * 4);
- regmap_update_bits(priv->regmap, TIM_CCER, mask, 0);
+ regmap_clear_bits(priv->regmap, TIM_CCER, mask);
/* When all channels are disabled, we can disable the controller */
if (!active_channels(priv))
- regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
+ regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
clk_disable(priv->clk);
}
@@ -568,10 +568,9 @@ static void stm32_pwm_detect_complementary(struct stm32_pwm *priv)
* If complementary bit doesn't exist writing 1 will have no
* effect so we can detect it.
*/
- regmap_update_bits(priv->regmap,
- TIM_CCER, TIM_CCER_CC1NE, TIM_CCER_CC1NE);
+ regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);
regmap_read(priv->regmap, TIM_CCER, &ccer);
- regmap_update_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE, 0);
+ regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);
priv->have_complementary_output = (ccer != 0);
}
@@ -585,10 +584,9 @@ static int stm32_pwm_detect_channels(struct stm32_pwm *priv)
* If channels enable bits don't exist writing 1 will have no
* effect so we can detect and count them.
*/
- regmap_update_bits(priv->regmap,
- TIM_CCER, TIM_CCER_CCXE, TIM_CCER_CCXE);
+ regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
regmap_read(priv->regmap, TIM_CCER, &ccer);
- regmap_update_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE, 0);
+ regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
if (ccer & TIM_CCER_CC1E)
npwm++;
--
2.38.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 5/5] pwm: stm32: Use regmap_clear_bits and regmap_set_bits where applicable
@ 2022-11-15 11:13 ` Uwe Kleine-König
0 siblings, 0 replies; 17+ messages in thread
From: Uwe Kleine-König @ 2022-11-15 11:13 UTC (permalink / raw)
To: Fabrice Gasnier, Thierry Reding, Maxime Coquelin, Alexandre Torgue
Cc: Mark Brown, linux-pwm, linux-stm32, linux-arm-kernel, kernel
Found using coccinelle and the following semantic patch:
@@
expression map, reg, bits;
@@
- regmap_update_bits(map, reg, bits, bits)
+ regmap_set_bits(map, reg, bits)
@@
expression map, reg, bits;
@@
- regmap_update_bits(map, reg, bits, 0)
+ regmap_clear_bits(map, reg, bits)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
drivers/pwm/pwm-stm32.c | 34 ++++++++++++++++------------------
1 file changed, 16 insertions(+), 18 deletions(-)
diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c
index 794ca5b02968..21e4a34dfff3 100644
--- a/drivers/pwm/pwm-stm32.c
+++ b/drivers/pwm/pwm-stm32.c
@@ -115,14 +115,14 @@ static int stm32_pwm_raw_capture(struct stm32_pwm *priv, struct pwm_device *pwm,
int ret;
/* Ensure registers have been updated, enable counter and capture */
- regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG);
- regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN);
+ regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG);
+ regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
/* Use cc1 or cc3 DMA resp for PWM input channels 1 & 2 or 3 & 4 */
dma_id = pwm->hwpwm < 2 ? STM32_TIMERS_DMA_CH1 : STM32_TIMERS_DMA_CH3;
ccen = pwm->hwpwm < 2 ? TIM_CCER_CC12E : TIM_CCER_CC34E;
ccr = pwm->hwpwm < 2 ? TIM_CCR1 : TIM_CCR3;
- regmap_update_bits(priv->regmap, TIM_CCER, ccen, ccen);
+ regmap_set_bits(priv->regmap, TIM_CCER, ccen);
/*
* Timer DMA burst mode. Request 2 registers, 2 bursts, to get both
@@ -160,8 +160,8 @@ static int stm32_pwm_raw_capture(struct stm32_pwm *priv, struct pwm_device *pwm,
}
stop:
- regmap_update_bits(priv->regmap, TIM_CCER, ccen, 0);
- regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
+ regmap_clear_bits(priv->regmap, TIM_CCER, ccen);
+ regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
return ret;
}
@@ -359,7 +359,7 @@ static int stm32_pwm_config(struct stm32_pwm *priv, int ch,
regmap_write(priv->regmap, TIM_PSC, prescaler);
regmap_write(priv->regmap, TIM_ARR, prd - 1);
- regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, TIM_CR1_ARPE);
+ regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE);
/* Calculate the duty cycles */
dty = prd * duty_ns;
@@ -377,7 +377,7 @@ static int stm32_pwm_config(struct stm32_pwm *priv, int ch,
else
regmap_update_bits(priv->regmap, TIM_CCMR2, mask, ccmr);
- regmap_update_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE, TIM_BDTR_MOE);
+ regmap_set_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE);
return 0;
}
@@ -411,13 +411,13 @@ static int stm32_pwm_enable(struct stm32_pwm *priv, int ch)
if (priv->have_complementary_output)
mask |= TIM_CCER_CC1NE << (ch * 4);
- regmap_update_bits(priv->regmap, TIM_CCER, mask, mask);
+ regmap_set_bits(priv->regmap, TIM_CCER, mask);
/* Make sure that registers are updated */
- regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG);
+ regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG);
/* Enable controller */
- regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN);
+ regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
return 0;
}
@@ -431,11 +431,11 @@ static void stm32_pwm_disable(struct stm32_pwm *priv, int ch)
if (priv->have_complementary_output)
mask |= TIM_CCER_CC1NE << (ch * 4);
- regmap_update_bits(priv->regmap, TIM_CCER, mask, 0);
+ regmap_clear_bits(priv->regmap, TIM_CCER, mask);
/* When all channels are disabled, we can disable the controller */
if (!active_channels(priv))
- regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
+ regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
clk_disable(priv->clk);
}
@@ -568,10 +568,9 @@ static void stm32_pwm_detect_complementary(struct stm32_pwm *priv)
* If complementary bit doesn't exist writing 1 will have no
* effect so we can detect it.
*/
- regmap_update_bits(priv->regmap,
- TIM_CCER, TIM_CCER_CC1NE, TIM_CCER_CC1NE);
+ regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);
regmap_read(priv->regmap, TIM_CCER, &ccer);
- regmap_update_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE, 0);
+ regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);
priv->have_complementary_output = (ccer != 0);
}
@@ -585,10 +584,9 @@ static int stm32_pwm_detect_channels(struct stm32_pwm *priv)
* If channels enable bits don't exist writing 1 will have no
* effect so we can detect and count them.
*/
- regmap_update_bits(priv->regmap,
- TIM_CCER, TIM_CCER_CCXE, TIM_CCER_CCXE);
+ regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
regmap_read(priv->regmap, TIM_CCER, &ccer);
- regmap_update_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE, 0);
+ regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
if (ccer & TIM_CCER_CC1E)
npwm++;
--
2.38.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 5/5] pwm: stm32: Use regmap_clear_bits and regmap_set_bits where applicable
2022-11-15 11:13 ` Uwe Kleine-König
@ 2022-11-23 10:23 ` Fabrice Gasnier
-1 siblings, 0 replies; 17+ messages in thread
From: Fabrice Gasnier @ 2022-11-23 10:23 UTC (permalink / raw)
To: Uwe Kleine-König, Thierry Reding, Maxime Coquelin, Alexandre Torgue
Cc: Mark Brown, linux-pwm, linux-stm32, linux-arm-kernel, kernel
On 11/15/22 12:13, Uwe Kleine-König wrote:
> Found using coccinelle and the following semantic patch:
>
> @@
> expression map, reg, bits;
> @@
>
> - regmap_update_bits(map, reg, bits, bits)
> + regmap_set_bits(map, reg, bits)
>
> @@
> expression map, reg, bits;
> @@
>
> - regmap_update_bits(map, reg, bits, 0)
> + regmap_clear_bits(map, reg, bits)
>
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
> drivers/pwm/pwm-stm32.c | 34 ++++++++++++++++------------------
> 1 file changed, 16 insertions(+), 18 deletions(-)
Hi Uwe,
You can add my:
Tested-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Best Regards,
Thanks
Fabrice
>
> diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c
> index 794ca5b02968..21e4a34dfff3 100644
> --- a/drivers/pwm/pwm-stm32.c
> +++ b/drivers/pwm/pwm-stm32.c
> @@ -115,14 +115,14 @@ static int stm32_pwm_raw_capture(struct stm32_pwm *priv, struct pwm_device *pwm,
> int ret;
>
> /* Ensure registers have been updated, enable counter and capture */
> - regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG);
> - regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN);
> + regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG);
> + regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
>
> /* Use cc1 or cc3 DMA resp for PWM input channels 1 & 2 or 3 & 4 */
> dma_id = pwm->hwpwm < 2 ? STM32_TIMERS_DMA_CH1 : STM32_TIMERS_DMA_CH3;
> ccen = pwm->hwpwm < 2 ? TIM_CCER_CC12E : TIM_CCER_CC34E;
> ccr = pwm->hwpwm < 2 ? TIM_CCR1 : TIM_CCR3;
> - regmap_update_bits(priv->regmap, TIM_CCER, ccen, ccen);
> + regmap_set_bits(priv->regmap, TIM_CCER, ccen);
>
> /*
> * Timer DMA burst mode. Request 2 registers, 2 bursts, to get both
> @@ -160,8 +160,8 @@ static int stm32_pwm_raw_capture(struct stm32_pwm *priv, struct pwm_device *pwm,
> }
>
> stop:
> - regmap_update_bits(priv->regmap, TIM_CCER, ccen, 0);
> - regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
> + regmap_clear_bits(priv->regmap, TIM_CCER, ccen);
> + regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
>
> return ret;
> }
> @@ -359,7 +359,7 @@ static int stm32_pwm_config(struct stm32_pwm *priv, int ch,
>
> regmap_write(priv->regmap, TIM_PSC, prescaler);
> regmap_write(priv->regmap, TIM_ARR, prd - 1);
> - regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, TIM_CR1_ARPE);
> + regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE);
>
> /* Calculate the duty cycles */
> dty = prd * duty_ns;
> @@ -377,7 +377,7 @@ static int stm32_pwm_config(struct stm32_pwm *priv, int ch,
> else
> regmap_update_bits(priv->regmap, TIM_CCMR2, mask, ccmr);
>
> - regmap_update_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE, TIM_BDTR_MOE);
> + regmap_set_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE);
>
> return 0;
> }
> @@ -411,13 +411,13 @@ static int stm32_pwm_enable(struct stm32_pwm *priv, int ch)
> if (priv->have_complementary_output)
> mask |= TIM_CCER_CC1NE << (ch * 4);
>
> - regmap_update_bits(priv->regmap, TIM_CCER, mask, mask);
> + regmap_set_bits(priv->regmap, TIM_CCER, mask);
>
> /* Make sure that registers are updated */
> - regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG);
> + regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG);
>
> /* Enable controller */
> - regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN);
> + regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
>
> return 0;
> }
> @@ -431,11 +431,11 @@ static void stm32_pwm_disable(struct stm32_pwm *priv, int ch)
> if (priv->have_complementary_output)
> mask |= TIM_CCER_CC1NE << (ch * 4);
>
> - regmap_update_bits(priv->regmap, TIM_CCER, mask, 0);
> + regmap_clear_bits(priv->regmap, TIM_CCER, mask);
>
> /* When all channels are disabled, we can disable the controller */
> if (!active_channels(priv))
> - regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
> + regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
>
> clk_disable(priv->clk);
> }
> @@ -568,10 +568,9 @@ static void stm32_pwm_detect_complementary(struct stm32_pwm *priv)
> * If complementary bit doesn't exist writing 1 will have no
> * effect so we can detect it.
> */
> - regmap_update_bits(priv->regmap,
> - TIM_CCER, TIM_CCER_CC1NE, TIM_CCER_CC1NE);
> + regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);
> regmap_read(priv->regmap, TIM_CCER, &ccer);
> - regmap_update_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE, 0);
> + regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);
>
> priv->have_complementary_output = (ccer != 0);
> }
> @@ -585,10 +584,9 @@ static int stm32_pwm_detect_channels(struct stm32_pwm *priv)
> * If channels enable bits don't exist writing 1 will have no
> * effect so we can detect and count them.
> */
> - regmap_update_bits(priv->regmap,
> - TIM_CCER, TIM_CCER_CCXE, TIM_CCER_CCXE);
> + regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
> regmap_read(priv->regmap, TIM_CCER, &ccer);
> - regmap_update_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE, 0);
> + regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
>
> if (ccer & TIM_CCER_CC1E)
> npwm++;
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 5/5] pwm: stm32: Use regmap_clear_bits and regmap_set_bits where applicable
@ 2022-11-23 10:23 ` Fabrice Gasnier
0 siblings, 0 replies; 17+ messages in thread
From: Fabrice Gasnier @ 2022-11-23 10:23 UTC (permalink / raw)
To: Uwe Kleine-König, Thierry Reding, Maxime Coquelin, Alexandre Torgue
Cc: Mark Brown, linux-pwm, linux-stm32, linux-arm-kernel, kernel
On 11/15/22 12:13, Uwe Kleine-König wrote:
> Found using coccinelle and the following semantic patch:
>
> @@
> expression map, reg, bits;
> @@
>
> - regmap_update_bits(map, reg, bits, bits)
> + regmap_set_bits(map, reg, bits)
>
> @@
> expression map, reg, bits;
> @@
>
> - regmap_update_bits(map, reg, bits, 0)
> + regmap_clear_bits(map, reg, bits)
>
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
> drivers/pwm/pwm-stm32.c | 34 ++++++++++++++++------------------
> 1 file changed, 16 insertions(+), 18 deletions(-)
Hi Uwe,
You can add my:
Tested-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Best Regards,
Thanks
Fabrice
>
> diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c
> index 794ca5b02968..21e4a34dfff3 100644
> --- a/drivers/pwm/pwm-stm32.c
> +++ b/drivers/pwm/pwm-stm32.c
> @@ -115,14 +115,14 @@ static int stm32_pwm_raw_capture(struct stm32_pwm *priv, struct pwm_device *pwm,
> int ret;
>
> /* Ensure registers have been updated, enable counter and capture */
> - regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG);
> - regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN);
> + regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG);
> + regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
>
> /* Use cc1 or cc3 DMA resp for PWM input channels 1 & 2 or 3 & 4 */
> dma_id = pwm->hwpwm < 2 ? STM32_TIMERS_DMA_CH1 : STM32_TIMERS_DMA_CH3;
> ccen = pwm->hwpwm < 2 ? TIM_CCER_CC12E : TIM_CCER_CC34E;
> ccr = pwm->hwpwm < 2 ? TIM_CCR1 : TIM_CCR3;
> - regmap_update_bits(priv->regmap, TIM_CCER, ccen, ccen);
> + regmap_set_bits(priv->regmap, TIM_CCER, ccen);
>
> /*
> * Timer DMA burst mode. Request 2 registers, 2 bursts, to get both
> @@ -160,8 +160,8 @@ static int stm32_pwm_raw_capture(struct stm32_pwm *priv, struct pwm_device *pwm,
> }
>
> stop:
> - regmap_update_bits(priv->regmap, TIM_CCER, ccen, 0);
> - regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
> + regmap_clear_bits(priv->regmap, TIM_CCER, ccen);
> + regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
>
> return ret;
> }
> @@ -359,7 +359,7 @@ static int stm32_pwm_config(struct stm32_pwm *priv, int ch,
>
> regmap_write(priv->regmap, TIM_PSC, prescaler);
> regmap_write(priv->regmap, TIM_ARR, prd - 1);
> - regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, TIM_CR1_ARPE);
> + regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE);
>
> /* Calculate the duty cycles */
> dty = prd * duty_ns;
> @@ -377,7 +377,7 @@ static int stm32_pwm_config(struct stm32_pwm *priv, int ch,
> else
> regmap_update_bits(priv->regmap, TIM_CCMR2, mask, ccmr);
>
> - regmap_update_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE, TIM_BDTR_MOE);
> + regmap_set_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE);
>
> return 0;
> }
> @@ -411,13 +411,13 @@ static int stm32_pwm_enable(struct stm32_pwm *priv, int ch)
> if (priv->have_complementary_output)
> mask |= TIM_CCER_CC1NE << (ch * 4);
>
> - regmap_update_bits(priv->regmap, TIM_CCER, mask, mask);
> + regmap_set_bits(priv->regmap, TIM_CCER, mask);
>
> /* Make sure that registers are updated */
> - regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG);
> + regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG);
>
> /* Enable controller */
> - regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN);
> + regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
>
> return 0;
> }
> @@ -431,11 +431,11 @@ static void stm32_pwm_disable(struct stm32_pwm *priv, int ch)
> if (priv->have_complementary_output)
> mask |= TIM_CCER_CC1NE << (ch * 4);
>
> - regmap_update_bits(priv->regmap, TIM_CCER, mask, 0);
> + regmap_clear_bits(priv->regmap, TIM_CCER, mask);
>
> /* When all channels are disabled, we can disable the controller */
> if (!active_channels(priv))
> - regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
> + regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
>
> clk_disable(priv->clk);
> }
> @@ -568,10 +568,9 @@ static void stm32_pwm_detect_complementary(struct stm32_pwm *priv)
> * If complementary bit doesn't exist writing 1 will have no
> * effect so we can detect it.
> */
> - regmap_update_bits(priv->regmap,
> - TIM_CCER, TIM_CCER_CC1NE, TIM_CCER_CC1NE);
> + regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);
> regmap_read(priv->regmap, TIM_CCER, &ccer);
> - regmap_update_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE, 0);
> + regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);
>
> priv->have_complementary_output = (ccer != 0);
> }
> @@ -585,10 +584,9 @@ static int stm32_pwm_detect_channels(struct stm32_pwm *priv)
> * If channels enable bits don't exist writing 1 will have no
> * effect so we can detect and count them.
> */
> - regmap_update_bits(priv->regmap,
> - TIM_CCER, TIM_CCER_CCXE, TIM_CCER_CCXE);
> + regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
> regmap_read(priv->regmap, TIM_CCER, &ccer);
> - regmap_update_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE, 0);
> + regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
>
> if (ccer & TIM_CCER_CC1E)
> npwm++;
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 0/5] pwm: Use regmap_clear_bits and regmap_set_bits where applicable
2022-11-15 11:13 ` Uwe Kleine-König
@ 2022-11-17 13:52 ` Uwe Kleine-König
-1 siblings, 0 replies; 17+ messages in thread
From: Uwe Kleine-König @ 2022-11-17 13:52 UTC (permalink / raw)
To: Thierry Reding, Fabrice Gasnier, Maxime Coquelin,
Alexandre Torgue, Mark Brown
Cc: linux-arm-kernel, linux-pwm, linux-stm32, kernel
[-- Attachment #1: Type: text/plain, Size: 2020 bytes --]
Hello,
On Tue, Nov 15, 2022 at 12:13:42PM +0100, Uwe Kleine-König wrote:
> I recently learned a bit of coccinelle and triggered by Paul Cercueil's
> patch that replaces regmap_update_bits() by regmap_set_bits() and
> regmap_clear_bits() where applicable in the jz4740 pwm driver[1] I
> created a cocci patch for such calls.
Pointing to this series I asked broonie in irc if a conversion like that
would be suitable to do in the complete tree. He objected that doing
that mechanically is probably wrong. His explicit concern was that a
call to regmap_clear_bits() (or regmap_set_bits()) in a series of
regmap_update_bits() is more disturbing than helpful.
So I looked at the remaining calls to regmap_update_bits() in the
drivers I converted in this series:
- pwm-fsl-ftm
There are two calls left that set bits in a mask (these should stay
as they are) and one:
reg_polarity = 0;
if (newstate->polarity == PWM_POLARITY_INVERSED)
reg_polarity = BIT(pwm->hwpwm);
regmap_update_bits(fpc->regmap, FTM_POL, BIT(pwm->hwpwm), reg_polarity);
which could benefit from a conversion (though I expect that to be
controversial).
The converted calls are all independent of the remaining
regmap_update_bits().
- pwm-img
No regmap_update_bits() calls left.
- pwm-iqs620a
There is one call left that does:
return regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
IQS620_PWR_SETTINGS_PWM_OUT, 0xff);
I think this is a bug because IQS620_PWR_SETTINGS_PWM_OUT is only
0xf.
- pwm-stm32-lp
No regmap_update_bits() calls left.
- pwm-stm32
There are several calls left, some of them also near converted calls.
My personal opinion is, that the conversion is fine anyhow.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
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^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH 0/5] pwm: Use regmap_clear_bits and regmap_set_bits where applicable
@ 2022-11-17 13:52 ` Uwe Kleine-König
0 siblings, 0 replies; 17+ messages in thread
From: Uwe Kleine-König @ 2022-11-17 13:52 UTC (permalink / raw)
To: Thierry Reding, Fabrice Gasnier, Maxime Coquelin,
Alexandre Torgue, Mark Brown
Cc: linux-arm-kernel, linux-pwm, linux-stm32, kernel
[-- Attachment #1.1: Type: text/plain, Size: 2020 bytes --]
Hello,
On Tue, Nov 15, 2022 at 12:13:42PM +0100, Uwe Kleine-König wrote:
> I recently learned a bit of coccinelle and triggered by Paul Cercueil's
> patch that replaces regmap_update_bits() by regmap_set_bits() and
> regmap_clear_bits() where applicable in the jz4740 pwm driver[1] I
> created a cocci patch for such calls.
Pointing to this series I asked broonie in irc if a conversion like that
would be suitable to do in the complete tree. He objected that doing
that mechanically is probably wrong. His explicit concern was that a
call to regmap_clear_bits() (or regmap_set_bits()) in a series of
regmap_update_bits() is more disturbing than helpful.
So I looked at the remaining calls to regmap_update_bits() in the
drivers I converted in this series:
- pwm-fsl-ftm
There are two calls left that set bits in a mask (these should stay
as they are) and one:
reg_polarity = 0;
if (newstate->polarity == PWM_POLARITY_INVERSED)
reg_polarity = BIT(pwm->hwpwm);
regmap_update_bits(fpc->regmap, FTM_POL, BIT(pwm->hwpwm), reg_polarity);
which could benefit from a conversion (though I expect that to be
controversial).
The converted calls are all independent of the remaining
regmap_update_bits().
- pwm-img
No regmap_update_bits() calls left.
- pwm-iqs620a
There is one call left that does:
return regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
IQS620_PWR_SETTINGS_PWM_OUT, 0xff);
I think this is a bug because IQS620_PWR_SETTINGS_PWM_OUT is only
0xf.
- pwm-stm32-lp
No regmap_update_bits() calls left.
- pwm-stm32
There are several calls left, some of them also near converted calls.
My personal opinion is, that the conversion is fine anyhow.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
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^ permalink raw reply [flat|nested] 17+ messages in thread