From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: martin.petersen@oracle.com, jejb@linux.ibm.com, andersson@kernel.org, vkoul@kernel.org, quic_cang@quicinc.com, quic_asutoshd@quicinc.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-scsi@vger.kernel.org, ahalaney@redhat.com, abel.vesa@linaro.org, alim.akhtar@samsung.com, avri.altman@wdc.com, bvanassche@acm.org Subject: Re: [PATCH v4 04/23] phy: qcom-qmp-ufs: Add support for configuring PHY in HS Series B mode Date: Tue, 6 Dec 2022 12:42:13 +0530 [thread overview] Message-ID: <20221206071213.GA15486@thinkpad> (raw) In-Reply-To: <32201EF1-8169-4940-99E1-31CC0C37C522@linaro.org> On Tue, Dec 06, 2022 at 12:51:42AM +0300, Dmitry Baryshkov wrote: > > > On 1 December 2022 20:43:09 GMT+03:00, Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> wrote: > >Add separate tables_hs_b instance to allow the PHY driver to configure the > >PHY in HS Series B mode. The individual SoC configs need to supply the > >serdes register setting in tables_hs_b and the UFS driver can request the > >Series B mode by calling phy_set_mode() with mode set to PHY_MODE_UFS_HS_B. > > > >Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > >Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > >--- > > drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 15 +++++++++++++++ > > 1 file changed, 15 insertions(+) > > > >diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > >index 516027e356f0..2d5dd336aeb2 100644 > >--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > >+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > >@@ -547,6 +547,8 @@ struct qmp_phy_cfg { > > > > /* Main init sequence for PHY blocks - serdes, tx, rx, pcs */ > > const struct qmp_phy_cfg_tbls tbls; > >+ /* Additional sequence for HS Series B */ > >+ const struct qmp_phy_cfg_tbls tbls_hs_b; > > > > /* clock ids to be requested */ > > const char * const *clk_list; > >@@ -580,6 +582,7 @@ struct qmp_ufs { > > struct reset_control *ufs_reset; > > > > struct phy *phy; > >+ u32 mode; > > }; > > > > static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val) > >@@ -841,6 +844,8 @@ static void qmp_ufs_pcs_init(struct qmp_ufs *qmp, const struct qmp_phy_cfg_tbls > > static void qmp_ufs_init_registers(struct qmp_ufs *qmp, const struct qmp_phy_cfg *cfg) > > { > > qmp_ufs_serdes_init(qmp, &cfg->tbls); > >+ if (qmp->mode == PHY_MODE_UFS_HS_B) > >+ qmp_ufs_serdes_init(qmp, &cfg->tbls_hs_b); > > I still think that qmp_ufs_init_registers() is a way to go here , see the pcie driver. > I did use qmp_ufs_init_registers() as a wrapper. Only difference here is that there is one more level of abstraction which looks cleaner to me. Thanks, Mani > > qmp_ufs_lanes_init(qmp, &cfg->tbls); > > qmp_ufs_pcs_init(qmp, &cfg->tbls); > > } > >@@ -1011,9 +1016,19 @@ static int qmp_ufs_disable(struct phy *phy) > > return qmp_ufs_exit(phy); > > } > > > >+static int qmp_ufs_set_mode(struct phy *phy, enum phy_mode mode, int submode) > >+{ > >+ struct qmp_ufs *qmp = phy_get_drvdata(phy); > >+ > >+ qmp->mode = mode; > >+ > >+ return 0; > >+} > >+ > > static const struct phy_ops qcom_qmp_ufs_phy_ops = { > > .power_on = qmp_ufs_enable, > > .power_off = qmp_ufs_disable, > >+ .set_mode = qmp_ufs_set_mode, > > .owner = THIS_MODULE, > > }; > > > > -- > With best wishes > Dmitry -- மணிவண்ணன் சதாசிவம்
WARNING: multiple messages have this Message-ID (diff)
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: martin.petersen@oracle.com, jejb@linux.ibm.com, andersson@kernel.org, vkoul@kernel.org, quic_cang@quicinc.com, quic_asutoshd@quicinc.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-scsi@vger.kernel.org, ahalaney@redhat.com, abel.vesa@linaro.org, alim.akhtar@samsung.com, avri.altman@wdc.com, bvanassche@acm.org Subject: Re: [PATCH v4 04/23] phy: qcom-qmp-ufs: Add support for configuring PHY in HS Series B mode Date: Tue, 6 Dec 2022 12:42:13 +0530 [thread overview] Message-ID: <20221206071213.GA15486@thinkpad> (raw) In-Reply-To: <32201EF1-8169-4940-99E1-31CC0C37C522@linaro.org> On Tue, Dec 06, 2022 at 12:51:42AM +0300, Dmitry Baryshkov wrote: > > > On 1 December 2022 20:43:09 GMT+03:00, Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> wrote: > >Add separate tables_hs_b instance to allow the PHY driver to configure the > >PHY in HS Series B mode. The individual SoC configs need to supply the > >serdes register setting in tables_hs_b and the UFS driver can request the > >Series B mode by calling phy_set_mode() with mode set to PHY_MODE_UFS_HS_B. > > > >Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > >Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > >--- > > drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 15 +++++++++++++++ > > 1 file changed, 15 insertions(+) > > > >diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > >index 516027e356f0..2d5dd336aeb2 100644 > >--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > >+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > >@@ -547,6 +547,8 @@ struct qmp_phy_cfg { > > > > /* Main init sequence for PHY blocks - serdes, tx, rx, pcs */ > > const struct qmp_phy_cfg_tbls tbls; > >+ /* Additional sequence for HS Series B */ > >+ const struct qmp_phy_cfg_tbls tbls_hs_b; > > > > /* clock ids to be requested */ > > const char * const *clk_list; > >@@ -580,6 +582,7 @@ struct qmp_ufs { > > struct reset_control *ufs_reset; > > > > struct phy *phy; > >+ u32 mode; > > }; > > > > static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val) > >@@ -841,6 +844,8 @@ static void qmp_ufs_pcs_init(struct qmp_ufs *qmp, const struct qmp_phy_cfg_tbls > > static void qmp_ufs_init_registers(struct qmp_ufs *qmp, const struct qmp_phy_cfg *cfg) > > { > > qmp_ufs_serdes_init(qmp, &cfg->tbls); > >+ if (qmp->mode == PHY_MODE_UFS_HS_B) > >+ qmp_ufs_serdes_init(qmp, &cfg->tbls_hs_b); > > I still think that qmp_ufs_init_registers() is a way to go here , see the pcie driver. > I did use qmp_ufs_init_registers() as a wrapper. Only difference here is that there is one more level of abstraction which looks cleaner to me. Thanks, Mani > > qmp_ufs_lanes_init(qmp, &cfg->tbls); > > qmp_ufs_pcs_init(qmp, &cfg->tbls); > > } > >@@ -1011,9 +1016,19 @@ static int qmp_ufs_disable(struct phy *phy) > > return qmp_ufs_exit(phy); > > } > > > >+static int qmp_ufs_set_mode(struct phy *phy, enum phy_mode mode, int submode) > >+{ > >+ struct qmp_ufs *qmp = phy_get_drvdata(phy); > >+ > >+ qmp->mode = mode; > >+ > >+ return 0; > >+} > >+ > > static const struct phy_ops qcom_qmp_ufs_phy_ops = { > > .power_on = qmp_ufs_enable, > > .power_off = qmp_ufs_disable, > >+ .set_mode = qmp_ufs_set_mode, > > .owner = THIS_MODULE, > > }; > > > > -- > With best wishes > Dmitry -- மணிவண்ணன் சதாசிவம் -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2022-12-06 7:12 UTC|newest] Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-12-01 17:43 [PATCH v4 00/23] ufs: qcom: Add HS-G4 support Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-01 17:43 ` [PATCH v4 01/23] phy: qcom-qmp-ufs: Remove _tbl suffix from qmp_phy_init_tbl definitions Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 21:45 ` Dmitry Baryshkov 2022-12-05 21:45 ` Dmitry Baryshkov 2022-12-01 17:43 ` [PATCH v4 02/23] phy: qcom-qmp-ufs: Rename MSM8996 PHY definitions Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 21:46 ` Dmitry Baryshkov 2022-12-05 21:46 ` Dmitry Baryshkov 2022-12-01 17:43 ` [PATCH v4 03/23] phy: qcom-qmp-ufs: Move register settings to qmp_phy_cfg_tbls struct Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 21:48 ` Dmitry Baryshkov 2022-12-05 21:48 ` Dmitry Baryshkov 2022-12-01 17:43 ` [PATCH v4 04/23] phy: qcom-qmp-ufs: Add support for configuring PHY in HS Series B mode Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 21:51 ` Dmitry Baryshkov 2022-12-05 21:51 ` Dmitry Baryshkov 2022-12-06 7:12 ` Manivannan Sadhasivam [this message] 2022-12-06 7:12 ` Manivannan Sadhasivam 2022-12-01 17:43 ` [PATCH v4 05/23] phy: qcom-qmp-ufs: Add support for configuring PHY in HS G4 mode Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-01 17:43 ` [PATCH v4 06/23] phy: qcom-qmp-ufs: Move HS Rate B register setting to tbls_hs_b Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-01 17:43 ` [PATCH v4 07/23] phy: qcom-qmp-ufs: Add HS G4 mode support to SM8150 SoC Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 21:52 ` Dmitry Baryshkov 2022-12-05 21:52 ` Dmitry Baryshkov 2022-12-01 17:43 ` [PATCH v4 08/23] phy: qcom-qmp-ufs: Add HS G4 mode support to SM8250 SoC Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 21:52 ` Dmitry Baryshkov 2022-12-05 21:52 ` Dmitry Baryshkov 2022-12-01 17:43 ` [PATCH v4 09/23] phy: qcom-qmp-ufs: Avoid setting HS G3 specific registers Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 21:55 ` Dmitry Baryshkov 2022-12-05 21:55 ` Dmitry Baryshkov 2022-12-06 7:16 ` Manivannan Sadhasivam 2022-12-06 7:16 ` Manivannan Sadhasivam 2022-12-01 17:43 ` [PATCH v4 10/23] phy: qcom-qmp-ufs: Add HS G4 mode support to SM8350 SoC Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 21:55 ` Dmitry Baryshkov 2022-12-05 21:55 ` Dmitry Baryshkov 2022-12-01 17:43 ` [PATCH v4 11/23] phy: qcom-qmp-ufs: Add HS G4 mode support to SM8450 SoC Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 21:55 ` Dmitry Baryshkov 2022-12-05 21:55 ` Dmitry Baryshkov 2022-12-01 17:43 ` [PATCH v4 12/23] phy: qcom-qmp-ufs: Add HS G4 mode support to SC8280XP SoC Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 21:56 ` Dmitry Baryshkov 2022-12-05 21:56 ` Dmitry Baryshkov 2022-12-01 17:43 ` [PATCH v4 13/23] scsi: ufs: ufs-qcom: Remove un-necessary goto statements Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 19:53 ` Asutosh Das 2022-12-05 19:53 ` Asutosh Das 2022-12-05 22:26 ` Dmitry Baryshkov 2022-12-05 22:26 ` Dmitry Baryshkov 2022-12-01 17:43 ` [PATCH v4 14/23] scsi: ufs: ufs-qcom: Remove un-necessary WARN_ON() Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 19:55 ` Asutosh Das 2022-12-05 19:55 ` Asutosh Das 2022-12-01 17:43 ` [PATCH v4 15/23] scsi: ufs: ufs-qcom: Use bitfields where appropriate Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 19:56 ` Asutosh Das 2022-12-05 19:56 ` Asutosh Das 2022-12-01 17:43 ` [PATCH v4 16/23] scsi: ufs: ufs-qcom: Use dev_err_probe() for printing probe error Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 19:57 ` Asutosh Das 2022-12-05 19:57 ` Asutosh Das 2022-12-01 17:43 ` [PATCH v4 17/23] scsi: ufs: ufs-qcom: Fix the Qcom register name for offset 0xD0 Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-05 19:59 ` Asutosh Das 2022-12-05 19:59 ` Asutosh Das 2022-12-01 17:43 ` [PATCH v4 18/23] scsi: ufs: core: Add reinit_notify() callback Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-01 18:05 ` Bart Van Assche 2022-12-01 18:05 ` Bart Van Assche 2022-12-02 7:32 ` Manivannan Sadhasivam 2022-12-02 7:32 ` Manivannan Sadhasivam 2022-12-01 17:43 ` [PATCH v4 19/23] scsi: ufs: core: Add support for reinitializing the UFS device Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-01 17:43 ` [PATCH v4 20/23] scsi: ufs: ufs-qcom: Factor out the logic finding the HS Gear Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-01 17:43 ` [PATCH v4 21/23] scsi: ufs: ufs-qcom: Add support for reinitializing the UFS device Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-01 17:43 ` [PATCH v4 22/23] scsi: ufs: ufs-qcom: Add support for finding max gear on new platforms Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-01 17:43 ` [PATCH v4 23/23] MAINTAINERS: Add myself as the maintainer for Qcom UFS drivers Manivannan Sadhasivam 2022-12-01 17:43 ` Manivannan Sadhasivam 2022-12-01 20:15 ` Bjorn Andersson 2022-12-01 20:15 ` Bjorn Andersson 2022-12-02 20:49 ` [PATCH v4 00/23] ufs: qcom: Add HS-G4 support Andrew Halaney 2022-12-02 20:49 ` Andrew Halaney
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