* [PATCH v2 0/3] arm64: dts: sm6115: Add USB SS qmp phy node and perform some cleanups
@ 2022-12-14 20:31 Bhupesh Sharma
2022-12-14 20:31 ` [PATCH v2 1/3] arm64: dts: qcom: sm6115: Cleanup USB node's label Bhupesh Sharma
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Bhupesh Sharma @ 2022-12-14 20:31 UTC (permalink / raw)
To: linux-arm-msm, devicetree
Cc: agross, bhupesh.sharma, bhupesh.linux, linux-kernel, robh+dt,
krzysztof.kozlowski, konrad.dybcio, andersson
Changes since v1:
-----------------
- v1 can be seen here: https://lore.kernel.org/linux-arm-msm/20221213123823.455731-1-bhupesh.sharma@linaro.org/
- Addressed the review comments from Konrad and Krzysztof regarding the
USB HS and SS Phy usage in sm4250 oneplus board dts ([PATCH 3/3]).
- Collected R-B received from Konrad on v1 patches [1/3] and [2/3].
This series adds USB SS qmp phy node for Qualcomm SM6115 / SM4250 SoC
dtsi and also performs some related cleanups for USB nodes.
Note that this series is rebased on linux-next/master and is also
dependent on the corresponding dt-bindings and driver series sent via [1].
[1]. https://lore.kernel.org/linux-arm-msm/20221213122843.454845-1-bhupesh.sharma@linaro.org/
Bhupesh Sharma (3):
arm64: dts: qcom: sm6115: Cleanup USB node's label
arm64: dts: qcom: sm6115: Move USB node's 'maximum-speed' and
'dr_mode' properties to dts
arm64: dts: qcom: sm6115: Add USB SS qmp phy node
.../boot/dts/qcom/sm4250-oneplus-billie2.dts | 12 ++++-
arch/arm64/boot/dts/qcom/sm6115.dtsi | 46 ++++++++++++++++---
2 files changed, 49 insertions(+), 9 deletions(-)
--
2.38.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 1/3] arm64: dts: qcom: sm6115: Cleanup USB node's label
2022-12-14 20:31 [PATCH v2 0/3] arm64: dts: sm6115: Add USB SS qmp phy node and perform some cleanups Bhupesh Sharma
@ 2022-12-14 20:31 ` Bhupesh Sharma
2022-12-14 20:31 ` [PATCH v2 2/3] arm64: dts: qcom: sm6115: Move USB node's 'maximum-speed' and 'dr_mode' properties to dts Bhupesh Sharma
2022-12-14 20:31 ` [PATCH v2 3/3] arm64: dts: qcom: sm6115: Add USB SS qmp phy node Bhupesh Sharma
2 siblings, 0 replies; 6+ messages in thread
From: Bhupesh Sharma @ 2022-12-14 20:31 UTC (permalink / raw)
To: linux-arm-msm, devicetree
Cc: agross, bhupesh.sharma, bhupesh.linux, linux-kernel, robh+dt,
krzysztof.kozlowski, konrad.dybcio, andersson
There is only one USB controller present on SM6115 / SM4250
Qualcomm SoC, so drop the numbering used with USB node's label
names in the dtsi and the related sm4250-oneplus-billie2.dts.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts | 4 ++--
arch/arm64/boot/dts/qcom/sm6115.dtsi | 8 ++++----
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
index a3f1c7c41fd73..fa57f4bf58256 100644
--- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
+++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
@@ -225,11 +225,11 @@ &ufs_mem_phy {
status = "okay";
};
-&usb_1 {
+&usb {
status = "okay";
};
-&usb_1_hsphy {
+&usb_hsphy {
vdd-supply = <&vreg_l4a>;
vdda-pll-supply = <&vreg_l12a>;
vdda-phy-dpdm-supply = <&vreg_l15a>;
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 572bf04adf906..b5f7480c2e713 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -565,7 +565,7 @@ gcc: clock-controller@1400000 {
#power-domain-cells = <1>;
};
- usb_1_hsphy: phy@1613000 {
+ usb_hsphy: phy@1613000 {
compatible = "qcom,sm6115-qusb2-phy";
reg = <0x01613000 0x180>;
#phy-cells = <0>;
@@ -991,7 +991,7 @@ spi5: spi@4a94000 {
};
};
- usb_1: usb@4ef8800 {
+ usb: usb@4ef8800 {
compatible = "qcom,sm6115-dwc3", "qcom,dwc3";
reg = <0x04ef8800 0x400>;
#address-cells = <1>;
@@ -1019,11 +1019,11 @@ usb_1: usb@4ef8800 {
qcom,select-utmi-as-pipe-clk;
status = "disabled";
- usb_1_dwc3: usb@4e00000 {
+ usb_dwc3: usb@4e00000 {
compatible = "snps,dwc3";
reg = <0x04e00000 0xcd00>;
interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb_1_hsphy>;
+ phys = <&usb_hsphy>;
phy-names = "usb2-phy";
iommus = <&apps_smmu 0x120 0x0>;
snps,dis_u2_susphy_quirk;
--
2.38.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 2/3] arm64: dts: qcom: sm6115: Move USB node's 'maximum-speed' and 'dr_mode' properties to dts
2022-12-14 20:31 [PATCH v2 0/3] arm64: dts: sm6115: Add USB SS qmp phy node and perform some cleanups Bhupesh Sharma
2022-12-14 20:31 ` [PATCH v2 1/3] arm64: dts: qcom: sm6115: Cleanup USB node's label Bhupesh Sharma
@ 2022-12-14 20:31 ` Bhupesh Sharma
2022-12-14 20:31 ` [PATCH v2 3/3] arm64: dts: qcom: sm6115: Add USB SS qmp phy node Bhupesh Sharma
2 siblings, 0 replies; 6+ messages in thread
From: Bhupesh Sharma @ 2022-12-14 20:31 UTC (permalink / raw)
To: linux-arm-msm, devicetree
Cc: agross, bhupesh.sharma, bhupesh.linux, linux-kernel, robh+dt,
krzysztof.kozlowski, konrad.dybcio, andersson
Normally the 'maximum-speed' and 'dr_mode' properties
of a USB controller + port is dependent on the type of
the ports, regulators and mode change interrupt routing
available on the board(s).
So, move the same from the sm6115 dtsi file to respective
board file(s).
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts | 5 +++++
arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 --
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
index fa57f4bf58256..3f39f25e0721e 100644
--- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
+++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
@@ -229,6 +229,11 @@ &usb {
status = "okay";
};
+&usb_dwc3 {
+ maximum-speed = "high-speed";
+ dr_mode = "peripheral";
+};
+
&usb_hsphy {
vdd-supply = <&vreg_l4a>;
vdda-pll-supply = <&vreg_l12a>;
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index b5f7480c2e713..e4ce135264f3d 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -1031,8 +1031,6 @@ usb_dwc3: usb@4e00000 {
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
snps,usb3_lpm_capable;
- maximum-speed = "high-speed";
- dr_mode = "peripheral";
};
};
--
2.38.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 3/3] arm64: dts: qcom: sm6115: Add USB SS qmp phy node
2022-12-14 20:31 [PATCH v2 0/3] arm64: dts: sm6115: Add USB SS qmp phy node and perform some cleanups Bhupesh Sharma
2022-12-14 20:31 ` [PATCH v2 1/3] arm64: dts: qcom: sm6115: Cleanup USB node's label Bhupesh Sharma
2022-12-14 20:31 ` [PATCH v2 2/3] arm64: dts: qcom: sm6115: Move USB node's 'maximum-speed' and 'dr_mode' properties to dts Bhupesh Sharma
@ 2022-12-14 20:31 ` Bhupesh Sharma
2022-12-15 8:19 ` Krzysztof Kozlowski
2 siblings, 1 reply; 6+ messages in thread
From: Bhupesh Sharma @ 2022-12-14 20:31 UTC (permalink / raw)
To: linux-arm-msm, devicetree
Cc: agross, bhupesh.sharma, bhupesh.linux, linux-kernel, robh+dt,
krzysztof.kozlowski, konrad.dybcio, andersson
Add USB superspeed qmp phy node to dtsi.
Make sure that the oneplus board dts (which includes the
sm4250.dtsi) continues to work as intended.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
.../boot/dts/qcom/sm4250-oneplus-billie2.dts | 3 ++
arch/arm64/boot/dts/qcom/sm6115.dtsi | 38 ++++++++++++++++++-
2 files changed, 39 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
index 3f39f25e0721e..4f0d65574448b 100644
--- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
+++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
@@ -232,6 +232,9 @@ &usb {
&usb_dwc3 {
maximum-speed = "high-speed";
dr_mode = "peripheral";
+
+ phys = <&usb_hsphy>;
+ phy-names = "usb2-phy";
};
&usb_hsphy {
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index e4ce135264f3d..15f311dcd289f 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -579,6 +579,40 @@ usb_hsphy: phy@1613000 {
status = "disabled";
};
+ usb_qmpphy: phy@1615000 {
+ compatible = "qcom,sm6115-qmp-usb3-phy";
+ reg = <0x01615000 0x200>;
+ clocks = <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
+ <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
+ <&gcc GCC_AHB2PHY_USB_CLK>;
+ clock-names = "com_aux",
+ "ref",
+ "cfg_ahb";
+ resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>,
+ <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>;
+ reset-names = "phy", "phy_phy";
+ status = "disabled";
+ #clock-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ usb_ssphy: phy@1615200 {
+ reg = <0x01615200 0x200>,
+ <0x01615400 0x200>,
+ <0x01615c00 0x400>,
+ <0x01615600 0x200>,
+ <0x01615800 0x200>,
+ <0x01615a00 0x100>;
+ #phy-cells = <0>;
+ #clock-cells = <1>;
+ clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
+ clock-names = "pipe0";
+ clock-output-names = "usb3_phy_pipe_clk_src";
+ };
+ };
+
+
qfprom@1b40000 {
compatible = "qcom,sm6115-qfprom", "qcom,qfprom";
reg = <0x01b40000 0x7000>;
@@ -1023,8 +1057,8 @@ usb_dwc3: usb@4e00000 {
compatible = "snps,dwc3";
reg = <0x04e00000 0xcd00>;
interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb_hsphy>;
- phy-names = "usb2-phy";
+ phys = <&usb_hsphy>, <&usb_ssphy>;
+ phy-names = "usb2-phy", "usb3-phy";
iommus = <&apps_smmu 0x120 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
--
2.38.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 3/3] arm64: dts: qcom: sm6115: Add USB SS qmp phy node
2022-12-14 20:31 ` [PATCH v2 3/3] arm64: dts: qcom: sm6115: Add USB SS qmp phy node Bhupesh Sharma
@ 2022-12-15 8:19 ` Krzysztof Kozlowski
2022-12-15 9:46 ` Bhupesh Sharma
0 siblings, 1 reply; 6+ messages in thread
From: Krzysztof Kozlowski @ 2022-12-15 8:19 UTC (permalink / raw)
To: Bhupesh Sharma, linux-arm-msm, devicetree
Cc: agross, bhupesh.linux, linux-kernel, robh+dt, konrad.dybcio, andersson
On 14/12/2022 21:31, Bhupesh Sharma wrote:
> Add USB superspeed qmp phy node to dtsi.
> Make sure that the oneplus board dts (which includes the
> sm4250.dtsi) continues to work as intended.
>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
> .../boot/dts/qcom/sm4250-oneplus-billie2.dts | 3 ++
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 38 ++++++++++++++++++-
> 2 files changed, 39 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> index 3f39f25e0721e..4f0d65574448b 100644
> --- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> @@ -232,6 +232,9 @@ &usb {
> &usb_dwc3 {
> maximum-speed = "high-speed";
> dr_mode = "peripheral";
> +
> + phys = <&usb_hsphy>;
> + phy-names = "usb2-phy";
> };
>
> &usb_hsphy {
> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> index e4ce135264f3d..15f311dcd289f 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> @@ -579,6 +579,40 @@ usb_hsphy: phy@1613000 {
> status = "disabled";
> };
>
> + usb_qmpphy: phy@1615000 {
> + compatible = "qcom,sm6115-qmp-usb3-phy";
> + reg = <0x01615000 0x200>;
> + clocks = <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> + <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
> + <&gcc GCC_AHB2PHY_USB_CLK>;
> + clock-names = "com_aux",
> + "ref",
> + "cfg_ahb";
> + resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>,
> + <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>;
> + reset-names = "phy", "phy_phy";
> + status = "disabled";
> + #clock-cells = <1>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + usb_ssphy: phy@1615200 {
> + reg = <0x01615200 0x200>,
> + <0x01615400 0x200>,
> + <0x01615c00 0x400>,
> + <0x01615600 0x200>,
> + <0x01615800 0x200>,
> + <0x01615a00 0x100>;
> + #phy-cells = <0>;
> + #clock-cells = <1>;
> + clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> + clock-names = "pipe0";
> + clock-output-names = "usb3_phy_pipe_clk_src";
> + };
> + };
> +
> +
Still two blank lines.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 3/3] arm64: dts: qcom: sm6115: Add USB SS qmp phy node
2022-12-15 8:19 ` Krzysztof Kozlowski
@ 2022-12-15 9:46 ` Bhupesh Sharma
0 siblings, 0 replies; 6+ messages in thread
From: Bhupesh Sharma @ 2022-12-15 9:46 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: linux-arm-msm, devicetree, agross, bhupesh.linux, linux-kernel,
robh+dt, konrad.dybcio, andersson
On Thu, 15 Dec 2022 at 13:49, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 14/12/2022 21:31, Bhupesh Sharma wrote:
> > Add USB superspeed qmp phy node to dtsi.
> > Make sure that the oneplus board dts (which includes the
> > sm4250.dtsi) continues to work as intended.
> >
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > ---
> > .../boot/dts/qcom/sm4250-oneplus-billie2.dts | 3 ++
> > arch/arm64/boot/dts/qcom/sm6115.dtsi | 38 ++++++++++++++++++-
> > 2 files changed, 39 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> > index 3f39f25e0721e..4f0d65574448b 100644
> > --- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> > +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> > @@ -232,6 +232,9 @@ &usb {
> > &usb_dwc3 {
> > maximum-speed = "high-speed";
> > dr_mode = "peripheral";
> > +
> > + phys = <&usb_hsphy>;
> > + phy-names = "usb2-phy";
> > };
> >
> > &usb_hsphy {
> > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > index e4ce135264f3d..15f311dcd289f 100644
> > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > @@ -579,6 +579,40 @@ usb_hsphy: phy@1613000 {
> > status = "disabled";
> > };
> >
> > + usb_qmpphy: phy@1615000 {
> > + compatible = "qcom,sm6115-qmp-usb3-phy";
> > + reg = <0x01615000 0x200>;
> > + clocks = <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> > + <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
> > + <&gcc GCC_AHB2PHY_USB_CLK>;
> > + clock-names = "com_aux",
> > + "ref",
> > + "cfg_ahb";
> > + resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>,
> > + <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>;
> > + reset-names = "phy", "phy_phy";
> > + status = "disabled";
> > + #clock-cells = <1>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges;
> > +
> > + usb_ssphy: phy@1615200 {
> > + reg = <0x01615200 0x200>,
> > + <0x01615400 0x200>,
> > + <0x01615c00 0x400>,
> > + <0x01615600 0x200>,
> > + <0x01615800 0x200>,
> > + <0x01615a00 0x100>;
> > + #phy-cells = <0>;
> > + #clock-cells = <1>;
> > + clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> > + clock-names = "pipe0";
> > + clock-output-names = "usb3_phy_pipe_clk_src";
> > + };
> > + };
> > +
> > +
>
> Still two blank lines.
Ok, I have sent a fixed v3. Please help review.
Thanks,
Bhupesh
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-12-15 9:48 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-12-14 20:31 [PATCH v2 0/3] arm64: dts: sm6115: Add USB SS qmp phy node and perform some cleanups Bhupesh Sharma
2022-12-14 20:31 ` [PATCH v2 1/3] arm64: dts: qcom: sm6115: Cleanup USB node's label Bhupesh Sharma
2022-12-14 20:31 ` [PATCH v2 2/3] arm64: dts: qcom: sm6115: Move USB node's 'maximum-speed' and 'dr_mode' properties to dts Bhupesh Sharma
2022-12-14 20:31 ` [PATCH v2 3/3] arm64: dts: qcom: sm6115: Add USB SS qmp phy node Bhupesh Sharma
2022-12-15 8:19 ` Krzysztof Kozlowski
2022-12-15 9:46 ` Bhupesh Sharma
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