From: Heiko Stuebner <heiko@sntech.de> To: palmer@dabbelt.com Cc: linux-riscv@lists.infradead.org, samuel@sholland.org, guoren@kernel.org, christoph.muellner@vrull.eu, heiko@sntech.de, conor.dooley@microchip.com, linux-kernel@vger.kernel.org, Heiko Stuebner <heiko.stuebner@vrull.eu> Subject: [PATCH RFC 1/2] RISC-V: define the elements of the VCSR vector CSR Date: Tue, 28 Feb 2023 22:54:34 +0100 [thread overview] Message-ID: <20230228215435.3366914-2-heiko@sntech.de> (raw) In-Reply-To: <20230228215435.3366914-1-heiko@sntech.de> From: Heiko Stuebner <heiko.stuebner@vrull.eu> The VCSR CSR contains two elements VXRM[2:1] and VXSAT[0]. Define constants for those to access the elements in a readable way. Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu> --- arch/riscv/include/asm/csr.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index add51662b7c3..8b06f2472915 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -176,6 +176,11 @@ #define ENVCFG_CBIE_INV _AC(0x3, UL) #define ENVCFG_FIOM _AC(0x1, UL) +/* VCSR flags */ +#define VCSR_VXRM_MASK 3 +#define VCSR_VXRM_SHIFT 1 +#define VCSR_VXSAT_MASK 1 + /* symbolic CSR names: */ #define CSR_CYCLE 0xc00 #define CSR_TIME 0xc01 -- 2.39.0
WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de> To: palmer@dabbelt.com Cc: linux-riscv@lists.infradead.org, samuel@sholland.org, guoren@kernel.org, christoph.muellner@vrull.eu, heiko@sntech.de, conor.dooley@microchip.com, linux-kernel@vger.kernel.org, Heiko Stuebner <heiko.stuebner@vrull.eu> Subject: [PATCH RFC 1/2] RISC-V: define the elements of the VCSR vector CSR Date: Tue, 28 Feb 2023 22:54:34 +0100 [thread overview] Message-ID: <20230228215435.3366914-2-heiko@sntech.de> (raw) In-Reply-To: <20230228215435.3366914-1-heiko@sntech.de> From: Heiko Stuebner <heiko.stuebner@vrull.eu> The VCSR CSR contains two elements VXRM[2:1] and VXSAT[0]. Define constants for those to access the elements in a readable way. Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu> --- arch/riscv/include/asm/csr.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index add51662b7c3..8b06f2472915 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -176,6 +176,11 @@ #define ENVCFG_CBIE_INV _AC(0x3, UL) #define ENVCFG_FIOM _AC(0x1, UL) +/* VCSR flags */ +#define VCSR_VXRM_MASK 3 +#define VCSR_VXRM_SHIFT 1 +#define VCSR_VXSAT_MASK 1 + /* symbolic CSR names: */ #define CSR_CYCLE 0xc00 #define CSR_TIME 0xc01 -- 2.39.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-02-28 21:55 UTC|newest] Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-02-28 21:54 [PATCH RFC 0/2] RISC-V: T-Head vector handling Heiko Stuebner 2023-02-28 21:54 ` Heiko Stuebner 2023-02-28 21:54 ` Heiko Stuebner [this message] 2023-02-28 21:54 ` [PATCH RFC 1/2] RISC-V: define the elements of the VCSR vector CSR Heiko Stuebner 2023-03-01 2:22 ` Guo Ren 2023-03-01 2:22 ` Guo Ren 2023-03-15 18:31 ` Conor Dooley 2023-03-15 18:31 ` Conor Dooley 2023-02-28 21:54 ` [PATCH RFC 2/2] RISC-V: add T-Head vector errata handling Heiko Stuebner 2023-02-28 21:54 ` Heiko Stuebner 2023-03-01 2:12 ` Guo Ren 2023-03-01 2:12 ` Guo Ren 2023-03-15 18:56 ` Conor Dooley 2023-03-15 18:56 ` Conor Dooley 2023-06-13 6:35 ` Stefan O'Rear 2023-06-13 6:35 ` Stefan O'Rear 2023-06-22 17:39 ` Heiko Stübner 2023-06-22 17:39 ` Heiko Stübner 2023-06-22 18:58 ` Stefan O'Rear 2023-06-22 18:58 ` Stefan O'Rear 2023-06-22 20:35 ` Heiko Stübner 2023-06-22 20:35 ` Heiko Stübner 2023-06-23 3:06 ` Stefan O'Rear 2023-06-23 3:06 ` Stefan O'Rear 2023-06-23 10:22 ` Heiko Stübner 2023-06-23 10:22 ` Heiko Stübner 2023-06-23 23:26 ` Heiko Stübner 2023-06-23 23:26 ` Heiko Stübner 2023-06-24 3:23 ` Stefan O'Rear 2023-06-24 3:23 ` Stefan O'Rear 2023-06-23 9:12 ` Emil Renner Berthing 2023-06-23 9:12 ` Emil Renner Berthing 2023-03-01 2:21 ` [PATCH RFC 0/2] RISC-V: T-Head vector handling Guo Ren 2023-03-01 2:21 ` Guo Ren 2023-03-15 5:29 ` Palmer Dabbelt 2023-03-15 5:29 ` Palmer Dabbelt 2023-03-15 6:31 ` Heiko Stuebner 2023-03-15 6:31 ` Heiko Stuebner 2023-06-12 15:29 ` Palmer Dabbelt 2023-06-12 15:29 ` Palmer Dabbelt 2023-06-12 15:44 ` Heiko Stübner 2023-06-12 15:44 ` Heiko Stübner
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