From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> To: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>, Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Stephen Boyd <swboyd@chromium.org>, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>, Bjorn Andersson <andersson@kernel.org>, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v5 20/32] drm/msm/dpu: add dpu_hw_sspp_cfg to dpu_plane_state Date: Fri, 10 Mar 2023 02:56:52 +0200 [thread overview] Message-ID: <20230310005704.1332368-21-dmitry.baryshkov@linaro.org> (raw) In-Reply-To: <20230310005704.1332368-1-dmitry.baryshkov@linaro.org> Now as all accesses to pipe_cfg and pstate have been cleaned, add struct dpu_hw_sspp_cfg to struct dpu_plane_state, so that dpu_plane_atomic_check() and dpu_plane_atomic_update() do not have a chance to disagree about src/dst rectangles (currently dpu_plane_atomic_check() uses unclipped rectangles, while dpu_plane_atomic_update() uses clipped rectangles calculated by drm_atomic_helper_check_plane_state()). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 66 +++++++++++------------ drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 2 + 2 files changed, 32 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 6cd787e85be8..ba850e9feb9b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -951,7 +951,8 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state); const struct drm_crtc_state *crtc_state = NULL; const struct dpu_format *fmt; - struct drm_rect src, dst, fb_rect = { 0 }; + struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg; + struct drm_rect fb_rect = { 0 }; uint32_t min_src_size, max_linewidth; unsigned int rotation; uint32_t supported_rotations; @@ -984,12 +985,15 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, return -EINVAL; } - src.x1 = new_plane_state->src_x >> 16; - src.y1 = new_plane_state->src_y >> 16; - src.x2 = src.x1 + (new_plane_state->src_w >> 16); - src.y2 = src.y1 + (new_plane_state->src_h >> 16); + pipe_cfg->src_rect = new_plane_state->src; - dst = drm_plane_state_dest(new_plane_state); + /* state->src is 16.16, src_rect is not */ + pipe_cfg->src_rect.x1 >>= 16; + pipe_cfg->src_rect.x2 >>= 16; + pipe_cfg->src_rect.y1 >>= 16; + pipe_cfg->src_rect.y2 >>= 16; + + pipe_cfg->dst_rect = new_plane_state->dst; fb_rect.x2 = new_plane_state->fb->width; fb_rect.y2 = new_plane_state->fb->height; @@ -1008,30 +1012,31 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, return -EINVAL; /* check src bounds */ - } else if (!dpu_plane_validate_src(&src, &fb_rect, min_src_size)) { + } else if (!dpu_plane_validate_src(&pipe_cfg->src_rect, &fb_rect, min_src_size)) { DPU_DEBUG_PLANE(pdpu, "invalid source " DRM_RECT_FMT "\n", - DRM_RECT_ARG(&src)); + DRM_RECT_ARG(&pipe_cfg->src_rect)); return -E2BIG; /* valid yuv image */ } else if (DPU_FORMAT_IS_YUV(fmt) && - (src.x1 & 0x1 || src.y1 & 0x1 || - drm_rect_width(&src) & 0x1 || - drm_rect_height(&src) & 0x1)) { + (pipe_cfg->src_rect.x1 & 0x1 || pipe_cfg->src_rect.y1 & 0x1 || + drm_rect_width(&pipe_cfg->src_rect) & 0x1 || + drm_rect_height(&pipe_cfg->src_rect) & 0x1)) { DPU_DEBUG_PLANE(pdpu, "invalid yuv source " DRM_RECT_FMT "\n", - DRM_RECT_ARG(&src)); + DRM_RECT_ARG(&pipe_cfg->src_rect)); return -EINVAL; /* min dst support */ - } else if (drm_rect_width(&dst) < 0x1 || drm_rect_height(&dst) < 0x1) { + } else if (drm_rect_width(&pipe_cfg->dst_rect) < 0x1 || + drm_rect_height(&pipe_cfg->dst_rect) < 0x1) { DPU_DEBUG_PLANE(pdpu, "invalid dest rect " DRM_RECT_FMT "\n", - DRM_RECT_ARG(&dst)); + DRM_RECT_ARG(&pipe_cfg->dst_rect)); return -EINVAL; /* check decimated source width */ - } else if (drm_rect_width(&src) > max_linewidth) { + } else if (drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) { DPU_DEBUG_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u\n", - DRM_RECT_ARG(&src), max_linewidth); + DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth); return -E2BIG; } @@ -1045,7 +1050,7 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, if ((pipe_hw_caps->features & BIT(DPU_SSPP_INLINE_ROTATION)) && (rotation & DRM_MODE_ROTATE_90)) { - ret = dpu_plane_check_inline_rotation(pdpu, sblk, src, fmt); + ret = dpu_plane_check_inline_rotation(pdpu, sblk, pipe_cfg->src_rect, fmt); if (ret) return ret; } @@ -1120,9 +1125,7 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) bool is_rt_pipe; const struct dpu_format *fmt = to_dpu_format(msm_framebuffer_format(fb)); - struct dpu_sw_pipe_cfg pipe_cfg; - - memset(&pipe_cfg, 0, sizeof(struct dpu_sw_pipe_cfg)); + struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg; _dpu_plane_set_scanout(plane, pstate, fb); @@ -1139,16 +1142,6 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) crtc->base.id, DRM_RECT_ARG(&state->dst), (char *)&fmt->base.pixel_format, DPU_FORMAT_IS_UBWC(fmt)); - pipe_cfg.src_rect = state->src; - - /* state->src is 16.16, src_rect is not */ - pipe_cfg.src_rect.x1 >>= 16; - pipe_cfg.src_rect.x2 >>= 16; - pipe_cfg.src_rect.y1 >>= 16; - pipe_cfg.src_rect.y2 >>= 16; - - pipe_cfg.dst_rect = state->dst; - /* override for color fill */ if (pdpu->color_fill & DPU_PLANE_COLOR_FILL_FLAG) { /* skip remaining processing on color fill */ @@ -1157,10 +1150,10 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) if (pipe->sspp->ops.setup_rects) { pipe->sspp->ops.setup_rects(pipe, - &pipe_cfg); + pipe_cfg); } - _dpu_plane_setup_scaler(pipe, fmt, false, &pipe_cfg, pstate->rotation); + _dpu_plane_setup_scaler(pipe, fmt, false, pipe_cfg, pstate->rotation); if (pipe->sspp->ops.setup_multirect) pipe->sspp->ops.setup_multirect( @@ -1201,12 +1194,12 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) } } - _dpu_plane_set_qos_lut(plane, pipe, fmt, &pipe_cfg); + _dpu_plane_set_qos_lut(plane, pipe, fmt, &pstate->pipe_cfg); _dpu_plane_set_danger_lut(plane, pipe, fmt); if (plane->type != DRM_PLANE_TYPE_CURSOR) { _dpu_plane_set_qos_ctrl(plane, pipe, true, DPU_PLANE_QOS_PANIC_CTRL); - _dpu_plane_set_ot_limit(plane, pipe, crtc, &pipe_cfg); + _dpu_plane_set_ot_limit(plane, pipe, crtc, &pstate->pipe_cfg); } if (pstate->needs_qos_remap) { @@ -1214,9 +1207,10 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) _dpu_plane_set_qos_remap(plane, pipe); } - pstate->plane_fetch_bw = _dpu_plane_calc_bw(pdpu->catalog, fmt, &crtc->mode, &pipe_cfg); + pstate->plane_fetch_bw = _dpu_plane_calc_bw(pdpu->catalog, fmt, + &crtc->mode, &pstate->pipe_cfg); - pstate->plane_clk = _dpu_plane_calc_clk(&crtc->mode, &pipe_cfg); + pstate->plane_clk = _dpu_plane_calc_clk(&crtc->mode, &pstate->pipe_cfg); } static void _dpu_plane_atomic_disable(struct drm_plane *plane) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h index a08b0539513b..0ca9002015ff 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h @@ -19,6 +19,7 @@ * @base: base drm plane state object * @aspace: pointer to address space for input/output buffers * @pipe: software pipe description + * @pipe_cfg: software pipe configuration * @stage: assigned by crtc blender * @needs_qos_remap: qos remap settings need to be updated * @multirect_index: index of the rectangle of SSPP @@ -33,6 +34,7 @@ struct dpu_plane_state { struct drm_plane_state base; struct msm_gem_address_space *aspace; struct dpu_sw_pipe pipe; + struct dpu_sw_pipe_cfg pipe_cfg; enum dpu_stage stage; bool needs_qos_remap; bool pending; -- 2.39.2
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> To: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>, Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Bjorn Andersson <andersson@kernel.org>, dri-devel@lists.freedesktop.org, Stephen Boyd <swboyd@chromium.org> Subject: [PATCH v5 20/32] drm/msm/dpu: add dpu_hw_sspp_cfg to dpu_plane_state Date: Fri, 10 Mar 2023 02:56:52 +0200 [thread overview] Message-ID: <20230310005704.1332368-21-dmitry.baryshkov@linaro.org> (raw) In-Reply-To: <20230310005704.1332368-1-dmitry.baryshkov@linaro.org> Now as all accesses to pipe_cfg and pstate have been cleaned, add struct dpu_hw_sspp_cfg to struct dpu_plane_state, so that dpu_plane_atomic_check() and dpu_plane_atomic_update() do not have a chance to disagree about src/dst rectangles (currently dpu_plane_atomic_check() uses unclipped rectangles, while dpu_plane_atomic_update() uses clipped rectangles calculated by drm_atomic_helper_check_plane_state()). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 66 +++++++++++------------ drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 2 + 2 files changed, 32 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 6cd787e85be8..ba850e9feb9b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -951,7 +951,8 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state); const struct drm_crtc_state *crtc_state = NULL; const struct dpu_format *fmt; - struct drm_rect src, dst, fb_rect = { 0 }; + struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg; + struct drm_rect fb_rect = { 0 }; uint32_t min_src_size, max_linewidth; unsigned int rotation; uint32_t supported_rotations; @@ -984,12 +985,15 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, return -EINVAL; } - src.x1 = new_plane_state->src_x >> 16; - src.y1 = new_plane_state->src_y >> 16; - src.x2 = src.x1 + (new_plane_state->src_w >> 16); - src.y2 = src.y1 + (new_plane_state->src_h >> 16); + pipe_cfg->src_rect = new_plane_state->src; - dst = drm_plane_state_dest(new_plane_state); + /* state->src is 16.16, src_rect is not */ + pipe_cfg->src_rect.x1 >>= 16; + pipe_cfg->src_rect.x2 >>= 16; + pipe_cfg->src_rect.y1 >>= 16; + pipe_cfg->src_rect.y2 >>= 16; + + pipe_cfg->dst_rect = new_plane_state->dst; fb_rect.x2 = new_plane_state->fb->width; fb_rect.y2 = new_plane_state->fb->height; @@ -1008,30 +1012,31 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, return -EINVAL; /* check src bounds */ - } else if (!dpu_plane_validate_src(&src, &fb_rect, min_src_size)) { + } else if (!dpu_plane_validate_src(&pipe_cfg->src_rect, &fb_rect, min_src_size)) { DPU_DEBUG_PLANE(pdpu, "invalid source " DRM_RECT_FMT "\n", - DRM_RECT_ARG(&src)); + DRM_RECT_ARG(&pipe_cfg->src_rect)); return -E2BIG; /* valid yuv image */ } else if (DPU_FORMAT_IS_YUV(fmt) && - (src.x1 & 0x1 || src.y1 & 0x1 || - drm_rect_width(&src) & 0x1 || - drm_rect_height(&src) & 0x1)) { + (pipe_cfg->src_rect.x1 & 0x1 || pipe_cfg->src_rect.y1 & 0x1 || + drm_rect_width(&pipe_cfg->src_rect) & 0x1 || + drm_rect_height(&pipe_cfg->src_rect) & 0x1)) { DPU_DEBUG_PLANE(pdpu, "invalid yuv source " DRM_RECT_FMT "\n", - DRM_RECT_ARG(&src)); + DRM_RECT_ARG(&pipe_cfg->src_rect)); return -EINVAL; /* min dst support */ - } else if (drm_rect_width(&dst) < 0x1 || drm_rect_height(&dst) < 0x1) { + } else if (drm_rect_width(&pipe_cfg->dst_rect) < 0x1 || + drm_rect_height(&pipe_cfg->dst_rect) < 0x1) { DPU_DEBUG_PLANE(pdpu, "invalid dest rect " DRM_RECT_FMT "\n", - DRM_RECT_ARG(&dst)); + DRM_RECT_ARG(&pipe_cfg->dst_rect)); return -EINVAL; /* check decimated source width */ - } else if (drm_rect_width(&src) > max_linewidth) { + } else if (drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) { DPU_DEBUG_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u\n", - DRM_RECT_ARG(&src), max_linewidth); + DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth); return -E2BIG; } @@ -1045,7 +1050,7 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, if ((pipe_hw_caps->features & BIT(DPU_SSPP_INLINE_ROTATION)) && (rotation & DRM_MODE_ROTATE_90)) { - ret = dpu_plane_check_inline_rotation(pdpu, sblk, src, fmt); + ret = dpu_plane_check_inline_rotation(pdpu, sblk, pipe_cfg->src_rect, fmt); if (ret) return ret; } @@ -1120,9 +1125,7 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) bool is_rt_pipe; const struct dpu_format *fmt = to_dpu_format(msm_framebuffer_format(fb)); - struct dpu_sw_pipe_cfg pipe_cfg; - - memset(&pipe_cfg, 0, sizeof(struct dpu_sw_pipe_cfg)); + struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg; _dpu_plane_set_scanout(plane, pstate, fb); @@ -1139,16 +1142,6 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) crtc->base.id, DRM_RECT_ARG(&state->dst), (char *)&fmt->base.pixel_format, DPU_FORMAT_IS_UBWC(fmt)); - pipe_cfg.src_rect = state->src; - - /* state->src is 16.16, src_rect is not */ - pipe_cfg.src_rect.x1 >>= 16; - pipe_cfg.src_rect.x2 >>= 16; - pipe_cfg.src_rect.y1 >>= 16; - pipe_cfg.src_rect.y2 >>= 16; - - pipe_cfg.dst_rect = state->dst; - /* override for color fill */ if (pdpu->color_fill & DPU_PLANE_COLOR_FILL_FLAG) { /* skip remaining processing on color fill */ @@ -1157,10 +1150,10 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) if (pipe->sspp->ops.setup_rects) { pipe->sspp->ops.setup_rects(pipe, - &pipe_cfg); + pipe_cfg); } - _dpu_plane_setup_scaler(pipe, fmt, false, &pipe_cfg, pstate->rotation); + _dpu_plane_setup_scaler(pipe, fmt, false, pipe_cfg, pstate->rotation); if (pipe->sspp->ops.setup_multirect) pipe->sspp->ops.setup_multirect( @@ -1201,12 +1194,12 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) } } - _dpu_plane_set_qos_lut(plane, pipe, fmt, &pipe_cfg); + _dpu_plane_set_qos_lut(plane, pipe, fmt, &pstate->pipe_cfg); _dpu_plane_set_danger_lut(plane, pipe, fmt); if (plane->type != DRM_PLANE_TYPE_CURSOR) { _dpu_plane_set_qos_ctrl(plane, pipe, true, DPU_PLANE_QOS_PANIC_CTRL); - _dpu_plane_set_ot_limit(plane, pipe, crtc, &pipe_cfg); + _dpu_plane_set_ot_limit(plane, pipe, crtc, &pstate->pipe_cfg); } if (pstate->needs_qos_remap) { @@ -1214,9 +1207,10 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) _dpu_plane_set_qos_remap(plane, pipe); } - pstate->plane_fetch_bw = _dpu_plane_calc_bw(pdpu->catalog, fmt, &crtc->mode, &pipe_cfg); + pstate->plane_fetch_bw = _dpu_plane_calc_bw(pdpu->catalog, fmt, + &crtc->mode, &pstate->pipe_cfg); - pstate->plane_clk = _dpu_plane_calc_clk(&crtc->mode, &pipe_cfg); + pstate->plane_clk = _dpu_plane_calc_clk(&crtc->mode, &pstate->pipe_cfg); } static void _dpu_plane_atomic_disable(struct drm_plane *plane) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h index a08b0539513b..0ca9002015ff 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h @@ -19,6 +19,7 @@ * @base: base drm plane state object * @aspace: pointer to address space for input/output buffers * @pipe: software pipe description + * @pipe_cfg: software pipe configuration * @stage: assigned by crtc blender * @needs_qos_remap: qos remap settings need to be updated * @multirect_index: index of the rectangle of SSPP @@ -33,6 +34,7 @@ struct dpu_plane_state { struct drm_plane_state base; struct msm_gem_address_space *aspace; struct dpu_sw_pipe pipe; + struct dpu_sw_pipe_cfg pipe_cfg; enum dpu_stage stage; bool needs_qos_remap; bool pending; -- 2.39.2
next prev parent reply other threads:[~2023-03-10 0:57 UTC|newest] Thread overview: 108+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-03-10 0:56 [PATCH v5 00/32] drm/msm/dpu: wide planes support Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 01/32] drm/msm/dpu: rename struct dpu_hw_pipe(_cfg) to dpu_hw_sspp(_cfg) Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 02/32] drm/msm/dpu: move SSPP allocation to the RM Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 03/32] drm/msm/dpu: move SSPP debugfs creation to dpu_kms.c Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 04/32] drm/msm/dpu: drop EAGAIN check from dpu_format_populate_layout Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 05/32] drm/msm/dpu: move pipe_hw to dpu_plane_state Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 06/32] drm/msm/dpu: drop dpu_plane_pipe function Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 07/32] drm/msm/dpu: introduce struct dpu_sw_pipe Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 08/32] drm/msm/dpu: use dpu_sw_pipe for dpu_hw_sspp callbacks Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 09/32] drm/msm/dpu: pass dpu_format to _dpu_hw_sspp_setup_scaler3() Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 10/32] drm/msm/dpu: clean up SRC addresses when setting up SSPP for solid fill Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 11/32] drm/msm/dpu: move stride programming to dpu_hw_sspp_setup_sourceaddress Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 12/32] drm/msm/dpu: remove dpu_hw_fmt_layout from struct dpu_hw_sspp_cfg Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 13/32] drm/msm/dpu: rename dpu_hw_sspp_cfg to dpu_sw_pipe_cfg Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-14 3:38 ` Abhinav Kumar 2023-03-14 3:38 ` Abhinav Kumar 2023-03-10 0:56 ` [PATCH v5 14/32] drm/msm/dpu: drop src_split and multirect check from dpu_crtc_atomic_check Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 15/32] drm/msm/dpu: don't use unsupported blend stages Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 16/32] drm/msm/dpu: move the rest of plane checks to dpu_plane_atomic_check() Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-14 4:02 ` Abhinav Kumar 2023-03-14 4:02 ` Abhinav Kumar 2023-03-14 4:14 ` Dmitry Baryshkov 2023-03-14 4:14 ` Dmitry Baryshkov 2023-03-14 4:42 ` Abhinav Kumar 2023-03-14 4:42 ` Abhinav Kumar 2023-03-10 0:56 ` [PATCH v5 17/32] drm/msm/dpu: drop redundant plane dst check from dpu_crtc_atomic_check() Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 18/32] drm/msm/dpu: rewrite plane's QoS-related functions to take dpu_sw_pipe and dpu_format Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 19/32] drm/msm/dpu: make _dpu_plane_calc_clk accept mode directly Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov [this message] 2023-03-10 0:56 ` [PATCH v5 20/32] drm/msm/dpu: add dpu_hw_sspp_cfg to dpu_plane_state Dmitry Baryshkov 2023-03-14 4:11 ` Abhinav Kumar 2023-03-14 4:11 ` Abhinav Kumar 2023-03-10 0:56 ` [PATCH v5 21/32] drm/msm/dpu: simplify dpu_plane_validate_src() Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-14 4:16 ` Abhinav Kumar 2023-03-14 4:16 ` Abhinav Kumar 2023-03-10 0:56 ` [PATCH v5 22/32] drm/msm/dpu: rework dpu_plane_sspp_atomic_update() Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-14 4:21 ` Abhinav Kumar 2023-03-14 4:21 ` Abhinav Kumar 2023-03-10 0:56 ` [PATCH v5 23/32] drm/msm/dpu: rework dpu_plane_atomic_check() Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-14 4:24 ` Abhinav Kumar 2023-03-14 4:24 ` Abhinav Kumar 2023-03-10 0:56 ` [PATCH v5 24/32] drm/msm/dpu: rework plane CSC setting Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-10 0:56 ` [PATCH v5 25/32] drm/msm/dpu: rework static color fill code Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-14 4:28 ` Abhinav Kumar 2023-03-14 4:28 ` Abhinav Kumar 2023-03-10 0:56 ` [PATCH v5 26/32] drm/msm/dpu: split pipe handling from _dpu_crtc_blend_setup_mixer Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-14 4:30 ` Abhinav Kumar 2023-03-14 4:30 ` Abhinav Kumar 2023-03-10 0:56 ` [PATCH v5 27/32] drm/msm/dpu: add support for wide planes Dmitry Baryshkov 2023-03-10 0:56 ` Dmitry Baryshkov 2023-03-14 4:40 ` Abhinav Kumar 2023-03-14 4:40 ` Abhinav Kumar 2023-03-10 0:57 ` [PATCH v5 28/32] drm/msm/dpu: populate SmartDMA features in hw catalog Dmitry Baryshkov 2023-03-10 0:57 ` Dmitry Baryshkov 2023-03-14 4:49 ` Abhinav Kumar 2023-03-14 4:49 ` Abhinav Kumar 2023-03-10 0:57 ` [PATCH v5 29/32] drm/msm/dpu: enable SmartDMA for the rest of the platforms Dmitry Baryshkov 2023-03-10 0:57 ` Dmitry Baryshkov 2023-03-14 5:08 ` Abhinav Kumar 2023-03-14 5:08 ` Abhinav Kumar 2023-03-14 10:58 ` Dmitry Baryshkov 2023-03-14 10:58 ` Dmitry Baryshkov 2023-03-14 16:35 ` Abhinav Kumar 2023-03-14 16:35 ` Abhinav Kumar 2023-03-14 16:43 ` Dmitry Baryshkov 2023-03-14 16:43 ` Dmitry Baryshkov 2023-03-14 16:47 ` Abhinav Kumar 2023-03-14 16:47 ` Abhinav Kumar 2023-03-14 17:23 ` Dmitry Baryshkov 2023-03-14 17:23 ` Dmitry Baryshkov 2023-03-10 0:57 ` [PATCH v5 30/32] drm/msm/dpu: drop smart_dma_rev from dpu_caps Dmitry Baryshkov 2023-03-10 0:57 ` Dmitry Baryshkov 2023-03-14 5:12 ` Abhinav Kumar 2023-03-14 5:12 ` Abhinav Kumar 2023-03-10 0:57 ` [PATCH v5 31/32] drm/msm/dpu: log the multirect_index in _dpu_crtc_blend_setup_pipe Dmitry Baryshkov 2023-03-10 0:57 ` Dmitry Baryshkov 2023-03-14 4:44 ` Abhinav Kumar 2023-03-14 4:44 ` Abhinav Kumar 2023-03-10 0:57 ` [PATCH v5 32/32] drm/msm/dpu: remove unused dpu_plane_validate_multirect_v2 function Dmitry Baryshkov 2023-03-10 0:57 ` Dmitry Baryshkov 2023-03-14 4:44 ` Abhinav Kumar 2023-03-14 4:44 ` Abhinav Kumar
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