[Patch 2/6] cpufreq: CPPC: make workaround apply code generic

From: Sumit Gupta <sumitg@nvidia.com>
To: <viresh.kumar@linaro.org>, <rafael@kernel.org>,
	<ionela.voinescu@arm.com>, <mark.rutland@arm.com>,
	<sudeep.holla@arm.com>, <lpieralisi@kernel.org>,
	<catalin.marinas@arm.com>, <will@kernel.org>
Cc: <linux-pm@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<treding@nvidia.com>, <jonathanh@nvidia.com>, <vsethi@nvidia.com>,
	<sdonthineni@nvidia.com>, <sanjayc@nvidia.com>,
	<ksitaraman@nvidia.com>, <bbasu@nvidia.com>, <sumitg@nvidia.com>
Subject: [Patch 2/6] cpufreq: CPPC: make workaround apply code generic
Date: Tue, 18 Apr 2023 17:04:55 +0530	[thread overview]
Message-ID: <20230418113459.12860-3-sumitg@nvidia.com> (raw)
In-Reply-To: <20230418113459.12860-1-sumitg@nvidia.com>

Expand the code which applies SoC workarounds to make it generic
and easy to reuse.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
---
 drivers/cpufreq/cppc_cpufreq.c | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c
index 022e3555407c..15c2cbb7a50e 100644
--- a/drivers/cpufreq/cppc_cpufreq.c
+++ b/drivers/cpufreq/cppc_cpufreq.c
@@ -43,10 +43,13 @@ static LIST_HEAD(cpu_data_list);
 
 static bool boost_supported;
 
+static void cppc_check_hisi_workaround(void);
+
 struct cppc_workaround_oem_info {
 	char oem_id[ACPI_OEM_ID_SIZE + 1];
 	char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
 	u32 oem_revision;
+	void (*apply_wa_func)(void);
 };
 
 static struct cppc_workaround_oem_info wa_info[] = {
@@ -54,10 +57,12 @@ static struct cppc_workaround_oem_info wa_info[] = {
 		.oem_id		= "HISI  ",
 		.oem_table_id	= "HIP07   ",
 		.oem_revision	= 0,
+		.apply_wa_func	= cppc_check_hisi_workaround,
 	}, {
 		.oem_id		= "HISI  ",
 		.oem_table_id	= "HIP08   ",
 		.oem_revision	= 0,
+		.apply_wa_func	= cppc_check_hisi_workaround,
 	}
 };
 
@@ -938,6 +943,13 @@ static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu)
 }
 
 static void cppc_check_hisi_workaround(void)
+{
+	/* Overwrite the get() callback */
+	cppc_cpufreq_driver.get = hisi_cppc_cpufreq_get_rate;
+	fie_disabled = FIE_DISABLED;
+}
+
+static void cppc_apply_workarounds(void)
 {
 	struct acpi_table_header *tbl;
 	acpi_status status = AE_OK;
@@ -951,9 +963,8 @@ static void cppc_check_hisi_workaround(void)
 		if (!memcmp(wa_info[i].oem_id, tbl->oem_id, ACPI_OEM_ID_SIZE) &&
 		    !memcmp(wa_info[i].oem_table_id, tbl->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) &&
 		    wa_info[i].oem_revision == tbl->oem_revision) {
-			/* Overwrite the get() callback */
-			cppc_cpufreq_driver.get = hisi_cppc_cpufreq_get_rate;
-			fie_disabled = FIE_DISABLED;
+			/* call work around function which matched from the table */
+			wa_info[i].apply_wa_func();
 			break;
 		}
 	}
@@ -968,7 +979,7 @@ static int __init cppc_cpufreq_init(void)
 	if (!acpi_cpc_valid())
 		return -ENODEV;
 
-	cppc_check_hisi_workaround();
+	cppc_apply_workarounds();
 	cppc_freq_invariance_init();
 	populate_efficiency_class();
 
-- 
2.17.1

