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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: laurent@vivier.eu, qemu-devel@nongnu.org
Subject: [PATCH 21/21] mac_via: extend timer calibration hack to work with A/UX
Date: Sun,  2 Jul 2023 16:48:38 +0100	[thread overview]
Message-ID: <20230702154838.722809-22-mark.cave-ayland@ilande.co.uk> (raw)
In-Reply-To: <20230702154838.722809-1-mark.cave-ayland@ilande.co.uk>

The A/UX timer calibration loop runs continuously until 2 consecutive iterations
differ by at least 0x492 timer ticks. Modern hosts execute the timer calibration
loop so fast that this situation never occurs causing a hang on boot.

Use a similar method to Shoebill which is to randomly add 0x500 to the T2
counter value during calibration to enable it to eventually succeed.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
 hw/misc/mac_via.c | 41 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c
index 94b4f5cebc..ea9d8b3aa9 100644
--- a/hw/misc/mac_via.c
+++ b/hw/misc/mac_via.c
@@ -983,6 +983,30 @@ static void via1_timer_calibration_hack(MOS6522Q800VIA1State *v1s, int addr,
             /* Looks like there has been a reset? */
             v1s->timer_hack_state = 1;
         }
+
+        if (addr == VIA_REG_T2CL && val == 0xf03c && size == 2) {
+            /* VIA_REG_T2CH: high byte of counter (A/UX) */
+            v1s->timer_hack_state = 5;
+        }
+        break;
+    case 5:
+        if ((addr == VIA_REG_IER && val == 0x20) || addr == VIA_REG_T2CH) {
+            /* End of A/UX timer calibration routine, or another write */
+            v1s->timer_hack_state = 6;
+        } else {
+            v1s->timer_hack_state = 0;
+        }
+        break;
+    case 6:
+        /*
+         * This is the normal post-calibration timer state once both the
+         * MacOS toolbox and A/UX have been calibrated, until we see a write
+         * to VIA_REG_PCR to suggest a reset
+         */
+        if (addr == VIA_REG_PCR && val == 0x22) {
+            /* Looks like there has been a reset? */
+            v1s->timer_hack_state = 1;
+        }
         break;
     default:
         g_assert_not_reached();
@@ -1013,6 +1037,23 @@ static uint64_t mos6522_q800_via1_read(void *opaque, hwaddr addr, unsigned size)
             /* Quadra 800 Id */
             ret = (ret & ~VIA1A_CPUID_MASK) | VIA1A_CPUID_Q800;
             break;
+        case VIA_REG_T2CH:
+            if (v1s->timer_hack_state == 5) {
+                /*
+                 * The A/UX timer calibration loop runs continuously until 2
+                 * consecutive iterations differ by at least 0x492 timer ticks.
+                 * Modern hosts execute the timer calibration loop so fast that
+                 * this situation never occurs causing a hang on boot. Use a
+                 * similar method to Shoebill which is to randomly add 0x500 to
+                 * the T2 counter value during calibration to enable it to
+                 * eventually succeed.
+                 */
+                now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
+                if (now & 1) {
+                    ret += 0x5;
+                }
+            }
+            break;
         }
         val |= ret << ((size - i - 1) << 3);
     }
-- 
2.30.2



      parent reply	other threads:[~2023-07-02 15:51 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-02 15:48 [PATCH 00/21] q800: add support for booting MacOS Classic - part 2 Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 01/21] q800-glue.c: convert to Resettable interface Mark Cave-Ayland
2023-07-03  7:48   ` Philippe Mathieu-Daudé
2023-07-02 15:48 ` [PATCH 02/21] q800: add djMEMC memory controller Mark Cave-Ayland
2023-07-07  8:17   ` Philippe Mathieu-Daudé
2023-07-02 15:48 ` [PATCH 03/21] q800: add machine id register Mark Cave-Ayland
2023-07-03  7:50   ` Philippe Mathieu-Daudé
2023-07-02 15:48 ` [PATCH 04/21] q800: implement additional machine id bits on VIA1 port A Mark Cave-Ayland
2023-07-07  8:19   ` Philippe Mathieu-Daudé
2023-07-02 15:48 ` [PATCH 05/21] q800: add IOSB subsystem Mark Cave-Ayland
2023-07-07  8:25   ` Philippe Mathieu-Daudé
2023-09-08  6:50     ` Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 06/21] q800: allow accesses to RAM area even if less memory is available Mark Cave-Ayland
2023-07-03  7:58   ` Philippe Mathieu-Daudé
2023-07-05  7:55   ` Laurent Vivier
2023-07-02 15:48 ` [PATCH 07/21] audio: add Apple Sound Chip (ASC) emulation Mark Cave-Ayland
2023-07-06 19:58   ` Volker Rümelin
2023-07-02 15:48 ` [PATCH 08/21] asc: generate silence if FIFO empty but engine still running Mark Cave-Ayland
2023-07-07  6:24   ` Volker Rümelin
2023-07-10  6:50     ` Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 09/21] q800: add Apple Sound Chip (ASC) audio to machine Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 10/21] q800: add easc bool machine class property to switch between ASC and EASC Mark Cave-Ayland
2023-07-07  8:29   ` Philippe Mathieu-Daudé
2023-09-08  6:54     ` Mark Cave-Ayland
2023-09-08  9:42       ` Philippe Mathieu-Daudé
2023-09-08 16:03         ` Mark Cave-Ayland
2023-09-08 16:06           ` Philippe Mathieu-Daudé
2023-09-11  5:15         ` Markus Armbruster
2023-09-20 15:41           ` Mark Cave-Ayland
2023-09-20 18:38             ` Markus Armbruster
2023-07-02 15:48 ` [PATCH 11/21] swim: add trace events for IWM and ISM registers Mark Cave-Ayland
2023-07-03  8:26   ` Philippe Mathieu-Daudé
2023-07-05 19:40     ` Mark Cave-Ayland
2023-07-06 10:05       ` Philippe Mathieu-Daudé
2023-07-02 15:48 ` [PATCH 12/21] swim: split into separate IWM and ISM register blocks Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 13/21] swim: update IWM/ISM register block decoding Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 14/21] mac_via: work around underflow in TimeDBRA timing loop in SETUPTIMEK Mark Cave-Ayland
2023-07-03  8:30   ` Philippe Mathieu-Daudé
2023-07-05 19:49     ` Mark Cave-Ayland
2023-07-06 10:10       ` Philippe Mathieu-Daudé
2023-07-06 10:34         ` Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 15/21] mac_via: workaround NetBSD ADB bus enumeration issue Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 16/21] mac_via: implement ADB_STATE_IDLE state if shift register in input mode Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 17/21] mac_via: always clear ADB interrupt when switching to A/UX mode Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 18/21] q800: add ESCC alias at 0xc000 Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 19/21] q800: add alias for MacOS toolbox ROM at 0x40000000 Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 20/21] mac_via: allow unaligned access to VIA1 registers Mark Cave-Ayland
2023-07-02 15:48 ` Mark Cave-Ayland [this message]

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