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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
	laurent@vivier.eu, qemu-devel@nongnu.org
Subject: Re: [PATCH 11/21] swim: add trace events for IWM and ISM registers
Date: Mon, 3 Jul 2023 10:26:59 +0200	[thread overview]
Message-ID: <575796cd-6460-b9ea-bfcf-8f27fadf0920@linaro.org> (raw)
In-Reply-To: <20230702154838.722809-12-mark.cave-ayland@ilande.co.uk>

On 2/7/23 17:48, Mark Cave-Ayland wrote:
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
>   hw/block/swim.c       | 14 ++++++++++++++
>   hw/block/trace-events |  7 +++++++
>   2 files changed, 21 insertions(+)


> @@ -267,6 +275,7 @@ static void iwmctrl_write(void *opaque, hwaddr reg, uint64_t value,
>       reg >>= REG_SHIFT;
>   
>       swimctrl->regs[reg >> 1] = reg & 1;
> +    trace_swim_iwmctrl_write((reg >> 1), size, (reg & 1));
>   
>       if (swimctrl->regs[IWM_Q6] &&
>           swimctrl->regs[IWM_Q7]) {
> @@ -297,6 +306,7 @@ static void iwmctrl_write(void *opaque, hwaddr reg, uint64_t value,
>                   if (value == 0x57) {
>                       swimctrl->mode = SWIM_MODE_SWIM;
>                       swimctrl->iwm_switch = 0;
> +                    trace_swim_iwm_switch();
>                   }
>                   break;
>               }
> @@ -312,6 +322,7 @@ static uint64_t iwmctrl_read(void *opaque, hwaddr reg, unsigned size)
>   
>       swimctrl->regs[reg >> 1] = reg & 1;
>   
> +    trace_swim_iwmctrl_read((reg >> 1), size, (reg & 1));
>       return 0;
>   }


> +swim_swimctrl_read(int reg, const char *name, unsigned size, uint64_t value) "reg=%d [%s] size=%u value=0x%"PRIx64
> +swim_swimctrl_write(int reg, const char *name, unsigned size, uint64_t value) "reg=%d [%s] size=%u value=0x%"PRIx64
> +swim_iwmctrl_read(int reg, unsigned size, uint64_t value) "reg=%d size=%u value=0x%"PRIx64
> +swim_iwmctrl_write(int reg, unsigned size, uint64_t value) "reg=%d size=%u value=0x%"PRIx64

For these 2 functions, 'value' is 1 bit so could be 'unsigned' ;)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



  reply	other threads:[~2023-07-03  8:27 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-02 15:48 [PATCH 00/21] q800: add support for booting MacOS Classic - part 2 Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 01/21] q800-glue.c: convert to Resettable interface Mark Cave-Ayland
2023-07-03  7:48   ` Philippe Mathieu-Daudé
2023-07-02 15:48 ` [PATCH 02/21] q800: add djMEMC memory controller Mark Cave-Ayland
2023-07-07  8:17   ` Philippe Mathieu-Daudé
2023-07-02 15:48 ` [PATCH 03/21] q800: add machine id register Mark Cave-Ayland
2023-07-03  7:50   ` Philippe Mathieu-Daudé
2023-07-02 15:48 ` [PATCH 04/21] q800: implement additional machine id bits on VIA1 port A Mark Cave-Ayland
2023-07-07  8:19   ` Philippe Mathieu-Daudé
2023-07-02 15:48 ` [PATCH 05/21] q800: add IOSB subsystem Mark Cave-Ayland
2023-07-07  8:25   ` Philippe Mathieu-Daudé
2023-09-08  6:50     ` Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 06/21] q800: allow accesses to RAM area even if less memory is available Mark Cave-Ayland
2023-07-03  7:58   ` Philippe Mathieu-Daudé
2023-07-05  7:55   ` Laurent Vivier
2023-07-02 15:48 ` [PATCH 07/21] audio: add Apple Sound Chip (ASC) emulation Mark Cave-Ayland
2023-07-06 19:58   ` Volker Rümelin
2023-07-02 15:48 ` [PATCH 08/21] asc: generate silence if FIFO empty but engine still running Mark Cave-Ayland
2023-07-07  6:24   ` Volker Rümelin
2023-07-10  6:50     ` Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 09/21] q800: add Apple Sound Chip (ASC) audio to machine Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 10/21] q800: add easc bool machine class property to switch between ASC and EASC Mark Cave-Ayland
2023-07-07  8:29   ` Philippe Mathieu-Daudé
2023-09-08  6:54     ` Mark Cave-Ayland
2023-09-08  9:42       ` Philippe Mathieu-Daudé
2023-09-08 16:03         ` Mark Cave-Ayland
2023-09-08 16:06           ` Philippe Mathieu-Daudé
2023-09-11  5:15         ` Markus Armbruster
2023-09-20 15:41           ` Mark Cave-Ayland
2023-09-20 18:38             ` Markus Armbruster
2023-07-02 15:48 ` [PATCH 11/21] swim: add trace events for IWM and ISM registers Mark Cave-Ayland
2023-07-03  8:26   ` Philippe Mathieu-Daudé [this message]
2023-07-05 19:40     ` Mark Cave-Ayland
2023-07-06 10:05       ` Philippe Mathieu-Daudé
2023-07-02 15:48 ` [PATCH 12/21] swim: split into separate IWM and ISM register blocks Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 13/21] swim: update IWM/ISM register block decoding Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 14/21] mac_via: work around underflow in TimeDBRA timing loop in SETUPTIMEK Mark Cave-Ayland
2023-07-03  8:30   ` Philippe Mathieu-Daudé
2023-07-05 19:49     ` Mark Cave-Ayland
2023-07-06 10:10       ` Philippe Mathieu-Daudé
2023-07-06 10:34         ` Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 15/21] mac_via: workaround NetBSD ADB bus enumeration issue Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 16/21] mac_via: implement ADB_STATE_IDLE state if shift register in input mode Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 17/21] mac_via: always clear ADB interrupt when switching to A/UX mode Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 18/21] q800: add ESCC alias at 0xc000 Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 19/21] q800: add alias for MacOS toolbox ROM at 0x40000000 Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 20/21] mac_via: allow unaligned access to VIA1 registers Mark Cave-Ayland
2023-07-02 15:48 ` [PATCH 21/21] mac_via: extend timer calibration hack to work with A/UX Mark Cave-Ayland

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