From: Vasant Hegde <vasant.hegde@amd.com>
To: <iommu@lists.linux.dev>, <joro@8bytes.org>
Cc: <suravee.suthikulpanit@amd.com>, <wei.huang2@amd.com>,
<jsnitsel@redhat.com>, <jgg@ziepe.ca>,
Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v5 00/14] iommu/amd: SVA Support (Part 1) - cleanup/refactoring
Date: Mon, 21 Aug 2023 10:42:13 +0000 [thread overview]
Message-ID: <20230821104227.706997-1-vasant.hegde@amd.com> (raw)
This is part 1 of the 4-part series to introduce Share Virtual Address
(SVA) support, which focuses on cleaning up and refactoring the existing
code in preparation for subsequent series.
It contains the following enhancements:
* Patch 1 - 7:
Clean up, refactoring and miscellaneous improvements.
* Patch 8 - 9:
Use global functions to check iommu features
* Patch 10 - 14:
Modify logic to independently enable PCI capabilities (ATS/PASID/PRI)
for devices. This allows more flexibility in preparation for SVA and
IOPF supports.
This patch series is based on top of iommu/next branch.
Base commit : 8d3740021d5d
This is also available at github :
https://github.com/AMDESE/linux/tree/iommu_sva_part1_v5_v6.5_rc1
Thanks Jason, Jerry for reviewing previous versions and providing valuable
feedbacks.
Changes from v4 -> v5:
- Changed dev_data.ppr from bool to bit field
- Reverted sysfs_emit that was changing existing behaviour
v4 : https://lore.kernel.org/linux-iommu/20230815102202.565012-1-vasant.hegde@amd.com/T/#t
Changes from v3 -> v4:
- Dropped patches that were touching iommu_v2.c as we will be deprecating
iommu_v2 module.
- Dropped Review-by tags for the patches which got modified (mostly the
patches that were touching iommu_v2.c code).
- Introduced new patch to use global EFR/EFR2 to check the iommu features
- Pass enum to set_dte_entry() instead of bool
- Used DIV_ROUND_UP instead of loop to calculate gcr3 levels
v3 : https://lore.kernel.org/linux-iommu/20230804064216.835544-1-vasant.hegde@amd.com/T/#t
Changes from v2 -> v3:
- Removed fallthrough from switch-case
- Added lockdep_assert_held() instead of comment on top of the function
- Moved macro defination (PPR_HANDLER_IOPF) to the patch where its
actually used
- Use helper function to allocate memory instead of get_zeroed_page()
- Converted boolean to bit fields
v2 : https://lore.kernel.org/linux-iommu/20230728053609.165183-1-vasant.hegde@amd.com/T/#t
Changes from v1 -> v2:
- Dropped GCR3 related changes from Part1. We are reworking
GCR3 management based on Jason's comment. We will post them
as separate part.
- Addressed review comment from Jason
- Added iommu_dev_data.ppr to track PPR status
v1 : https://lore.kernel.org/linux-iommu/20230712141516.154144-1-vasant.hegde@amd.com/
Thank you,
Vasant / Suravee
Suravee Suthikulpanit (8):
iommu/amd: Remove unused amd_io_pgtable.pt_root variable
iommu/amd: Consolidate timeout pre-define to amd_iommu_type.h
iommu/amd: Consolidate logic to allocate protection domain
iommu/amd: Introduce helper functions for managing GCR3 table
iommu/amd: Miscellaneous clean up when free domain
iommu/amd: Consolidate feature detection and reporting logic
iommu/amd: Modify logic for checking GT and PPR features
iommu/amd: Introduce iommu_dev_data.ppr
Vasant Hegde (6):
iommu/amd: Refactor protection domain allocation code
iommu/amd: Do not set amd_iommu_pgtable in pass-through mode
iommu/amd: Rename ats related variables
iommu/amd: Introduce iommu_dev_data.flags to track device capabilities
iommu/amd: Enable device ATS/PASID/PRI capabilities independently
iommu/amd: Initialize iommu_device->max_pasids
drivers/iommu/amd/amd_iommu.h | 28 +-
drivers/iommu/amd/amd_iommu_types.h | 31 +-
drivers/iommu/amd/init.c | 116 +++-----
drivers/iommu/amd/io_pgtable_v2.c | 8 +-
drivers/iommu/amd/iommu.c | 442 +++++++++++++++-------------
5 files changed, 322 insertions(+), 303 deletions(-)
--
2.31.1
next reply other threads:[~2023-08-21 10:42 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-21 10:42 Vasant Hegde [this message]
2023-08-21 10:42 ` [PATCH v5 01/14] iommu/amd: Remove unused amd_io_pgtable.pt_root variable Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 02/14] iommu/amd: Consolidate timeout pre-define to amd_iommu_type.h Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 03/14] iommu/amd: Consolidate logic to allocate protection domain Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 04/14] iommu/amd: Refactor protection domain allocation code Vasant Hegde
2023-08-22 8:06 ` Robin Murphy
2023-08-23 10:48 ` Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 05/14] iommu/amd: Introduce helper functions for managing GCR3 table Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 06/14] iommu/amd: Do not set amd_iommu_pgtable in pass-through mode Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 07/14] iommu/amd: Miscellaneous clean up when free domain Vasant Hegde
2023-08-23 21:58 ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 08/14] iommu/amd: Consolidate feature detection and reporting logic Vasant Hegde
2023-08-21 13:29 ` Jason Gunthorpe
2023-08-23 22:30 ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 09/14] iommu/amd: Modify logic for checking GT and PPR features Vasant Hegde
2023-08-23 22:35 ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 10/14] iommu/amd: Rename ats related variables Vasant Hegde
2023-08-23 22:54 ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 11/14] iommu/amd: Introduce iommu_dev_data.ppr Vasant Hegde
2023-08-24 0:33 ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 12/14] iommu/amd: Introduce iommu_dev_data.flags to track device capabilities Vasant Hegde
2023-08-21 13:32 ` Jason Gunthorpe
2023-08-24 2:10 ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 13/14] iommu/amd: Enable device ATS/PASID/PRI capabilities independently Vasant Hegde
2023-08-24 2:19 ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 14/14] iommu/amd: Initialize iommu_device->max_pasids Vasant Hegde
2023-08-24 2:24 ` Jerry Snitselaar
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