* [PATCH v2 0/4] dma: sf-pdma: various sf-pdma updates for the mpfs platform
@ 2023-10-03 4:22 ` shravan chippa
0 siblings, 0 replies; 32+ messages in thread
From: shravan chippa @ 2023-10-03 4:22 UTC (permalink / raw)
To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar, shravan.chippa
From: Shravan Chippa <shravan.chippa@microchip.com>
Changes from V1 -> V2:
Removed internal review tags
Commit massages modified.
Added devicetree patch with new compatible name for mpfs platform
Added of_dma_controller_free() clenup call in sf_pdma_remove() function
V1:
This series does the following
1. Adds a PolarFire SoC specific compatible and code to support for
out-of-order dma transfers
2. Adds generic device tree bindings support by using
of_dma_controller_register()
Shravan Chippa (4):
dmaengine: sf-pdma: Support of_dma_controller_register()
dt-bindings: dma: sf-pdma: add new compatible name
dmaengine: sf-pdma: add mpfs-pdma compatible name
riscv: dts: microchip: add specific compatible for mpfs' pdma
.../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++--
arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +-
drivers/dma/sf-pdma/sf-pdma.c | 71 ++++++++++++++++++-
drivers/dma/sf-pdma/sf-pdma.h | 6 ++
4 files changed, 83 insertions(+), 8 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH v2 0/4] dma: sf-pdma: various sf-pdma updates for the mpfs platform
@ 2023-10-03 4:22 ` shravan chippa
0 siblings, 0 replies; 32+ messages in thread
From: shravan chippa @ 2023-10-03 4:22 UTC (permalink / raw)
To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar, shravan.chippa
From: Shravan Chippa <shravan.chippa@microchip.com>
Changes from V1 -> V2:
Removed internal review tags
Commit massages modified.
Added devicetree patch with new compatible name for mpfs platform
Added of_dma_controller_free() clenup call in sf_pdma_remove() function
V1:
This series does the following
1. Adds a PolarFire SoC specific compatible and code to support for
out-of-order dma transfers
2. Adds generic device tree bindings support by using
of_dma_controller_register()
Shravan Chippa (4):
dmaengine: sf-pdma: Support of_dma_controller_register()
dt-bindings: dma: sf-pdma: add new compatible name
dmaengine: sf-pdma: add mpfs-pdma compatible name
riscv: dts: microchip: add specific compatible for mpfs' pdma
.../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++--
arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +-
drivers/dma/sf-pdma/sf-pdma.c | 71 ++++++++++++++++++-
drivers/dma/sf-pdma/sf-pdma.h | 6 ++
4 files changed, 83 insertions(+), 8 deletions(-)
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH v2 1/4] dmaengine: sf-pdma: Support of_dma_controller_register()
2023-10-03 4:22 ` shravan chippa
@ 2023-10-03 4:22 ` shravan chippa
-1 siblings, 0 replies; 32+ messages in thread
From: shravan chippa @ 2023-10-03 4:22 UTC (permalink / raw)
To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar, shravan.chippa
From: Shravan Chippa <shravan.chippa@microchip.com>
Update sf-pdma driver to adopt generic DMA device tree bindings.
It calls of_dma_controller_register() with sf-pdma specific
of_dma_xlate to get the generic DMA device tree helper support
and the DMA clients can look up the sf-pdma controller using
standard APIs.
Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
---
drivers/dma/sf-pdma/sf-pdma.c | 44 +++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
index d1c6956af452..06a0912a12a1 100644
--- a/drivers/dma/sf-pdma/sf-pdma.c
+++ b/drivers/dma/sf-pdma/sf-pdma.c
@@ -20,6 +20,7 @@
#include <linux/mod_devicetable.h>
#include <linux/dma-mapping.h>
#include <linux/of.h>
+#include <linux/of_dma.h>
#include <linux/slab.h>
#include "sf-pdma.h"
@@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma)
}
}
+static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
+ struct of_dma *ofdma)
+{
+ struct sf_pdma *pdma = ofdma->of_dma_data;
+ struct device *dev = pdma->dma_dev.dev;
+ struct sf_pdma_chan *chan;
+ struct dma_chan *c;
+ u32 channel_id;
+
+ if (dma_spec->args_count != 1) {
+ dev_err(dev, "Bad number of cells\n");
+ return NULL;
+ }
+
+ channel_id = dma_spec->args[0];
+
+ chan = &pdma->chans[channel_id];
+
+ c = dma_get_slave_channel(&chan->vchan.chan);
+ if (!c) {
+ dev_err(dev, "No more channels available\n");
+ return NULL;
+ }
+
+ return c;
+}
+
static int sf_pdma_probe(struct platform_device *pdev)
{
struct sf_pdma *pdma;
@@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device *pdev)
return ret;
}
+ ret = of_dma_controller_register(pdev->dev.of_node,
+ sf_pdma_of_xlate, pdma);
+ if (ret < 0) {
+ dev_err(&pdev->dev,
+ "Can't register SiFive Platform OF_DMA. (%d)\n", ret);
+ goto err_unregister;
+ }
+
return 0;
+
+err_unregister:
+ dma_async_device_unregister(&pdma->dma_dev);
+
+ return ret;
}
static int sf_pdma_remove(struct platform_device *pdev)
@@ -583,6 +624,9 @@ static int sf_pdma_remove(struct platform_device *pdev)
tasklet_kill(&ch->err_tasklet);
}
+ if (pdev->dev.of_node)
+ of_dma_controller_free(pdev->dev.of_node);
+
dma_async_device_unregister(&pdma->dma_dev);
return 0;
--
2.34.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v2 1/4] dmaengine: sf-pdma: Support of_dma_controller_register()
@ 2023-10-03 4:22 ` shravan chippa
0 siblings, 0 replies; 32+ messages in thread
From: shravan chippa @ 2023-10-03 4:22 UTC (permalink / raw)
To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar, shravan.chippa
From: Shravan Chippa <shravan.chippa@microchip.com>
Update sf-pdma driver to adopt generic DMA device tree bindings.
It calls of_dma_controller_register() with sf-pdma specific
of_dma_xlate to get the generic DMA device tree helper support
and the DMA clients can look up the sf-pdma controller using
standard APIs.
Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
---
drivers/dma/sf-pdma/sf-pdma.c | 44 +++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
index d1c6956af452..06a0912a12a1 100644
--- a/drivers/dma/sf-pdma/sf-pdma.c
+++ b/drivers/dma/sf-pdma/sf-pdma.c
@@ -20,6 +20,7 @@
#include <linux/mod_devicetable.h>
#include <linux/dma-mapping.h>
#include <linux/of.h>
+#include <linux/of_dma.h>
#include <linux/slab.h>
#include "sf-pdma.h"
@@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma)
}
}
+static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
+ struct of_dma *ofdma)
+{
+ struct sf_pdma *pdma = ofdma->of_dma_data;
+ struct device *dev = pdma->dma_dev.dev;
+ struct sf_pdma_chan *chan;
+ struct dma_chan *c;
+ u32 channel_id;
+
+ if (dma_spec->args_count != 1) {
+ dev_err(dev, "Bad number of cells\n");
+ return NULL;
+ }
+
+ channel_id = dma_spec->args[0];
+
+ chan = &pdma->chans[channel_id];
+
+ c = dma_get_slave_channel(&chan->vchan.chan);
+ if (!c) {
+ dev_err(dev, "No more channels available\n");
+ return NULL;
+ }
+
+ return c;
+}
+
static int sf_pdma_probe(struct platform_device *pdev)
{
struct sf_pdma *pdma;
@@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device *pdev)
return ret;
}
+ ret = of_dma_controller_register(pdev->dev.of_node,
+ sf_pdma_of_xlate, pdma);
+ if (ret < 0) {
+ dev_err(&pdev->dev,
+ "Can't register SiFive Platform OF_DMA. (%d)\n", ret);
+ goto err_unregister;
+ }
+
return 0;
+
+err_unregister:
+ dma_async_device_unregister(&pdma->dma_dev);
+
+ return ret;
}
static int sf_pdma_remove(struct platform_device *pdev)
@@ -583,6 +624,9 @@ static int sf_pdma_remove(struct platform_device *pdev)
tasklet_kill(&ch->err_tasklet);
}
+ if (pdev->dev.of_node)
+ of_dma_controller_free(pdev->dev.of_node);
+
dma_async_device_unregister(&pdma->dma_dev);
return 0;
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name
2023-10-03 4:22 ` shravan chippa
@ 2023-10-03 4:22 ` shravan chippa
-1 siblings, 0 replies; 32+ messages in thread
From: shravan chippa @ 2023-10-03 4:22 UTC (permalink / raw)
To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar, shravan.chippa, Conor Dooley
From: Shravan Chippa <shravan.chippa@microchip.com>
Add new compatible name microchip,mpfs-pdma to support
out of order dma transfers
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
---
.../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
index a1af0b906365..974467c4bacb 100644
--- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
+++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
@@ -27,10 +27,14 @@ allOf:
properties:
compatible:
- items:
- - enum:
- - sifive,fu540-c000-pdma
- - const: sifive,pdma0
+ oneOf:
+ - items:
+ - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
+ - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer
+ - items:
+ - enum:
+ - sifive,fu540-c000-pdma
+ - const: sifive,pdma0
description:
Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
Supported compatible strings are -
--
2.34.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name
@ 2023-10-03 4:22 ` shravan chippa
0 siblings, 0 replies; 32+ messages in thread
From: shravan chippa @ 2023-10-03 4:22 UTC (permalink / raw)
To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar, shravan.chippa, Conor Dooley
From: Shravan Chippa <shravan.chippa@microchip.com>
Add new compatible name microchip,mpfs-pdma to support
out of order dma transfers
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
---
.../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
index a1af0b906365..974467c4bacb 100644
--- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
+++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
@@ -27,10 +27,14 @@ allOf:
properties:
compatible:
- items:
- - enum:
- - sifive,fu540-c000-pdma
- - const: sifive,pdma0
+ oneOf:
+ - items:
+ - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
+ - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer
+ - items:
+ - enum:
+ - sifive,fu540-c000-pdma
+ - const: sifive,pdma0
description:
Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
Supported compatible strings are -
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name
2023-10-03 4:22 ` shravan chippa
@ 2023-10-03 4:22 ` shravan chippa
-1 siblings, 0 replies; 32+ messages in thread
From: shravan chippa @ 2023-10-03 4:22 UTC (permalink / raw)
To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar, shravan.chippa
From: Shravan Chippa <shravan.chippa@microchip.com>
Sifive platform dma does not allow out-of-order transfers,
Add a PolarFire SoC specific compatible and code to support
for out-of-order dma transfers
Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
---
drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++
2 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
index 06a0912a12a1..a9ff319d4ca3 100644
--- a/drivers/dma/sf-pdma/sf-pdma.c
+++ b/drivers/dma/sf-pdma/sf-pdma.c
@@ -21,6 +21,7 @@
#include <linux/dma-mapping.h>
#include <linux/of.h>
#include <linux/of_dma.h>
+#include <linux/of_device.h>
#include <linux/slab.h>
#include "sf-pdma.h"
@@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
u64 dst, u64 src, u64 size)
{
- desc->xfer_type = PDMA_FULL_SPEED;
+ desc->xfer_type = desc->chan->pdma->transfer_type;
desc->xfer_size = size;
desc->dst_addr = dst;
desc->src_addr = src;
@@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
static int sf_pdma_probe(struct platform_device *pdev)
{
+ const struct sf_pdma_driver_platdata *ddata;
struct sf_pdma *pdma;
int ret, n_chans;
const enum dma_slave_buswidth widths =
@@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
pdma->n_chans = n_chans;
+ pdma->transfer_type = PDMA_FULL_SPEED;
+
+ ddata = of_device_get_match_data(&pdev->dev);
+ if (ddata) {
+ if (ddata->quirks & NO_STRICT_ORDERING)
+ pdma->transfer_type &= ~(NO_STRICT_ORDERING);
+ }
+
pdma->membase = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(pdma->membase))
return PTR_ERR(pdma->membase);
@@ -632,11 +642,22 @@ static int sf_pdma_remove(struct platform_device *pdev)
return 0;
}
+static const struct sf_pdma_driver_platdata mpfs_pdma = {
+ .quirks = NO_STRICT_ORDERING,
+};
+
static const struct of_device_id sf_pdma_dt_ids[] = {
- { .compatible = "sifive,fu540-c000-pdma" },
- { .compatible = "sifive,pdma0" },
+ {
+ .compatible = "sifive,fu540-c000-pdma",
+ }, {
+ .compatible = "sifive,pdma0",
+ }, {
+ .compatible = "microchip,mpfs-pdma",
+ .data = &mpfs_pdma,
+ },
{},
};
+
MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
static struct platform_driver sf_pdma_driver = {
diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
index 5c398a83b491..3b16db4daa0b 100644
--- a/drivers/dma/sf-pdma/sf-pdma.h
+++ b/drivers/dma/sf-pdma/sf-pdma.h
@@ -49,6 +49,7 @@
/* Transfer Type */
#define PDMA_FULL_SPEED 0xFF000008
+#define NO_STRICT_ORDERING BIT(3)
/* Error Recovery */
#define MAX_RETRY 1
@@ -112,8 +113,13 @@ struct sf_pdma {
struct dma_device dma_dev;
void __iomem *membase;
void __iomem *mappedbase;
+ u32 transfer_type;
u32 n_chans;
struct sf_pdma_chan chans[];
};
+struct sf_pdma_driver_platdata {
+ u32 quirks;
+};
+
#endif /* _SF_PDMA_H */
--
2.34.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name
@ 2023-10-03 4:22 ` shravan chippa
0 siblings, 0 replies; 32+ messages in thread
From: shravan chippa @ 2023-10-03 4:22 UTC (permalink / raw)
To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar, shravan.chippa
From: Shravan Chippa <shravan.chippa@microchip.com>
Sifive platform dma does not allow out-of-order transfers,
Add a PolarFire SoC specific compatible and code to support
for out-of-order dma transfers
Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
---
drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++
2 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
index 06a0912a12a1..a9ff319d4ca3 100644
--- a/drivers/dma/sf-pdma/sf-pdma.c
+++ b/drivers/dma/sf-pdma/sf-pdma.c
@@ -21,6 +21,7 @@
#include <linux/dma-mapping.h>
#include <linux/of.h>
#include <linux/of_dma.h>
+#include <linux/of_device.h>
#include <linux/slab.h>
#include "sf-pdma.h"
@@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
u64 dst, u64 src, u64 size)
{
- desc->xfer_type = PDMA_FULL_SPEED;
+ desc->xfer_type = desc->chan->pdma->transfer_type;
desc->xfer_size = size;
desc->dst_addr = dst;
desc->src_addr = src;
@@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
static int sf_pdma_probe(struct platform_device *pdev)
{
+ const struct sf_pdma_driver_platdata *ddata;
struct sf_pdma *pdma;
int ret, n_chans;
const enum dma_slave_buswidth widths =
@@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
pdma->n_chans = n_chans;
+ pdma->transfer_type = PDMA_FULL_SPEED;
+
+ ddata = of_device_get_match_data(&pdev->dev);
+ if (ddata) {
+ if (ddata->quirks & NO_STRICT_ORDERING)
+ pdma->transfer_type &= ~(NO_STRICT_ORDERING);
+ }
+
pdma->membase = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(pdma->membase))
return PTR_ERR(pdma->membase);
@@ -632,11 +642,22 @@ static int sf_pdma_remove(struct platform_device *pdev)
return 0;
}
+static const struct sf_pdma_driver_platdata mpfs_pdma = {
+ .quirks = NO_STRICT_ORDERING,
+};
+
static const struct of_device_id sf_pdma_dt_ids[] = {
- { .compatible = "sifive,fu540-c000-pdma" },
- { .compatible = "sifive,pdma0" },
+ {
+ .compatible = "sifive,fu540-c000-pdma",
+ }, {
+ .compatible = "sifive,pdma0",
+ }, {
+ .compatible = "microchip,mpfs-pdma",
+ .data = &mpfs_pdma,
+ },
{},
};
+
MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
static struct platform_driver sf_pdma_driver = {
diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
index 5c398a83b491..3b16db4daa0b 100644
--- a/drivers/dma/sf-pdma/sf-pdma.h
+++ b/drivers/dma/sf-pdma/sf-pdma.h
@@ -49,6 +49,7 @@
/* Transfer Type */
#define PDMA_FULL_SPEED 0xFF000008
+#define NO_STRICT_ORDERING BIT(3)
/* Error Recovery */
#define MAX_RETRY 1
@@ -112,8 +113,13 @@ struct sf_pdma {
struct dma_device dma_dev;
void __iomem *membase;
void __iomem *mappedbase;
+ u32 transfer_type;
u32 n_chans;
struct sf_pdma_chan chans[];
};
+struct sf_pdma_driver_platdata {
+ u32 quirks;
+};
+
#endif /* _SF_PDMA_H */
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v2 4/4] riscv: dts: microchip: add specific compatible for mpfs' pdma
2023-10-03 4:22 ` shravan chippa
@ 2023-10-03 4:22 ` shravan chippa
-1 siblings, 0 replies; 32+ messages in thread
From: shravan chippa @ 2023-10-03 4:22 UTC (permalink / raw)
To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar, shravan.chippa
From: Shravan Chippa <shravan.chippa@microchip.com>
Add specific compatible for PolarFire SoC for The SiFive PDMA driver
Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
---
arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi
index 104504352e99..05525d5c2c82 100644
--- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
@@ -221,7 +221,7 @@ plic: interrupt-controller@c000000 {
};
pdma: dma-controller@3000000 {
- compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
+ compatible = "microchip,mpfs-pdma", "sifive,fu540-c000-pdma";
reg = <0x0 0x3000000 0x0 0x8000>;
interrupt-parent = <&plic>;
interrupts = <5 6>, <7 8>, <9 10>, <11 12>;
--
2.34.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v2 4/4] riscv: dts: microchip: add specific compatible for mpfs' pdma
@ 2023-10-03 4:22 ` shravan chippa
0 siblings, 0 replies; 32+ messages in thread
From: shravan chippa @ 2023-10-03 4:22 UTC (permalink / raw)
To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar, shravan.chippa
From: Shravan Chippa <shravan.chippa@microchip.com>
Add specific compatible for PolarFire SoC for The SiFive PDMA driver
Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
---
arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi
index 104504352e99..05525d5c2c82 100644
--- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
@@ -221,7 +221,7 @@ plic: interrupt-controller@c000000 {
};
pdma: dma-controller@3000000 {
- compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
+ compatible = "microchip,mpfs-pdma", "sifive,fu540-c000-pdma";
reg = <0x0 0x3000000 0x0 0x8000>;
interrupt-parent = <&plic>;
interrupts = <5 6>, <7 8>, <9 10>, <11 12>;
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 32+ messages in thread
* Re: [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name
2023-10-03 4:22 ` shravan chippa
@ 2023-10-03 7:35 ` Emil Renner Berthing
-1 siblings, 0 replies; 32+ messages in thread
From: Emil Renner Berthing @ 2023-10-03 7:35 UTC (permalink / raw)
To: shravan chippa, green.wan, vkoul, robh+dt,
krzysztof.kozlowski+dt, palmer, paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar
shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
>
> Sifive platform dma does not allow out-of-order transfers,
> Add a PolarFire SoC specific compatible and code to support
> for out-of-order dma transfers
>
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> ---
> drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++
> 2 files changed, 30 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index 06a0912a12a1..a9ff319d4ca3 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -21,6 +21,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/of.h>
> #include <linux/of_dma.h>
> +#include <linux/of_device.h>
> #include <linux/slab.h>
>
> #include "sf-pdma.h"
> @@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
> static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> u64 dst, u64 src, u64 size)
> {
> - desc->xfer_type = PDMA_FULL_SPEED;
> + desc->xfer_type = desc->chan->pdma->transfer_type;
Two spaces.
> desc->xfer_size = size;
> desc->dst_addr = dst;
> desc->src_addr = src;
> @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
>
> static int sf_pdma_probe(struct platform_device *pdev)
> {
> + const struct sf_pdma_driver_platdata *ddata;
> struct sf_pdma *pdma;
> int ret, n_chans;
> const enum dma_slave_buswidth widths =
> @@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
>
> pdma->n_chans = n_chans;
>
> + pdma->transfer_type = PDMA_FULL_SPEED;
> +
> + ddata = of_device_get_match_data(&pdev->dev);
> + if (ddata) {
> + if (ddata->quirks & NO_STRICT_ORDERING)
> + pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> + }
> +
The commit message says "Sifive platform dma does not allow out-of-order
transfers" so you want strict ordering by default and then allow
out-of-order transfers if the match data allows it, right?
But here bit 3 is set by default and cleared if the quirk is set, so it looks
like bit 3 actually means "strict ordering" and not "no strict ordering" as
you've named it.
The confusion here probably stems using the same define for the quirk and the
xfer_type. Unless I'm mistaken above I'd find something like this a lot easier
to read:
sf_pdma.h:
#define PDMA_FULL_SPEED 0xFF000000
#define PDMA_STRICT_ORDERING BIT(3)
sf_pdma.c:
#define PDMA_QUIRK_NO_STRICT_ORDERING BIT(0)
dma->transfer_type = PDMA_FULL_SPEED | PDMA_STRICT_ORDERING;
...
if (ddata->quirks & PDMA_QUIRK_NO_STRICT_ORDERING)
pdma->transfer_type &= ~PDMA_STRICT_ORDERING;
> pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> if (IS_ERR(pdma->membase))
> return PTR_ERR(pdma->membase);
> @@ -632,11 +642,22 @@ static int sf_pdma_remove(struct platform_device *pdev)
> return 0;
> }
>
> +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> + .quirks = NO_STRICT_ORDERING,
> +};
> +
> static const struct of_device_id sf_pdma_dt_ids[] = {
> - { .compatible = "sifive,fu540-c000-pdma" },
> - { .compatible = "sifive,pdma0" },
> + {
> + .compatible = "sifive,fu540-c000-pdma",
> + }, {
> + .compatible = "sifive,pdma0",
> + }, {
> + .compatible = "microchip,mpfs-pdma",
> + .data = &mpfs_pdma,
> + },
> {},
> };
> +
> MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
>
> static struct platform_driver sf_pdma_driver = {
> diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index 5c398a83b491..3b16db4daa0b 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.h
> +++ b/drivers/dma/sf-pdma/sf-pdma.h
> @@ -49,6 +49,7 @@
>
> /* Transfer Type */
> #define PDMA_FULL_SPEED 0xFF000008
> +#define NO_STRICT_ORDERING BIT(3)
>
> /* Error Recovery */
> #define MAX_RETRY 1
> @@ -112,8 +113,13 @@ struct sf_pdma {
> struct dma_device dma_dev;
> void __iomem *membase;
> void __iomem *mappedbase;
> + u32 transfer_type;
> u32 n_chans;
> struct sf_pdma_chan chans[];
> };
>
> +struct sf_pdma_driver_platdata {
> + u32 quirks;
> +};
> +
> #endif /* _SF_PDMA_H */
> --
> 2.34.1
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name
@ 2023-10-03 7:35 ` Emil Renner Berthing
0 siblings, 0 replies; 32+ messages in thread
From: Emil Renner Berthing @ 2023-10-03 7:35 UTC (permalink / raw)
To: shravan chippa, green.wan, vkoul, robh+dt,
krzysztof.kozlowski+dt, palmer, paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar
shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
>
> Sifive platform dma does not allow out-of-order transfers,
> Add a PolarFire SoC specific compatible and code to support
> for out-of-order dma transfers
>
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> ---
> drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++
> 2 files changed, 30 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index 06a0912a12a1..a9ff319d4ca3 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -21,6 +21,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/of.h>
> #include <linux/of_dma.h>
> +#include <linux/of_device.h>
> #include <linux/slab.h>
>
> #include "sf-pdma.h"
> @@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
> static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> u64 dst, u64 src, u64 size)
> {
> - desc->xfer_type = PDMA_FULL_SPEED;
> + desc->xfer_type = desc->chan->pdma->transfer_type;
Two spaces.
> desc->xfer_size = size;
> desc->dst_addr = dst;
> desc->src_addr = src;
> @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
>
> static int sf_pdma_probe(struct platform_device *pdev)
> {
> + const struct sf_pdma_driver_platdata *ddata;
> struct sf_pdma *pdma;
> int ret, n_chans;
> const enum dma_slave_buswidth widths =
> @@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
>
> pdma->n_chans = n_chans;
>
> + pdma->transfer_type = PDMA_FULL_SPEED;
> +
> + ddata = of_device_get_match_data(&pdev->dev);
> + if (ddata) {
> + if (ddata->quirks & NO_STRICT_ORDERING)
> + pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> + }
> +
The commit message says "Sifive platform dma does not allow out-of-order
transfers" so you want strict ordering by default and then allow
out-of-order transfers if the match data allows it, right?
But here bit 3 is set by default and cleared if the quirk is set, so it looks
like bit 3 actually means "strict ordering" and not "no strict ordering" as
you've named it.
The confusion here probably stems using the same define for the quirk and the
xfer_type. Unless I'm mistaken above I'd find something like this a lot easier
to read:
sf_pdma.h:
#define PDMA_FULL_SPEED 0xFF000000
#define PDMA_STRICT_ORDERING BIT(3)
sf_pdma.c:
#define PDMA_QUIRK_NO_STRICT_ORDERING BIT(0)
dma->transfer_type = PDMA_FULL_SPEED | PDMA_STRICT_ORDERING;
...
if (ddata->quirks & PDMA_QUIRK_NO_STRICT_ORDERING)
pdma->transfer_type &= ~PDMA_STRICT_ORDERING;
> pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> if (IS_ERR(pdma->membase))
> return PTR_ERR(pdma->membase);
> @@ -632,11 +642,22 @@ static int sf_pdma_remove(struct platform_device *pdev)
> return 0;
> }
>
> +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> + .quirks = NO_STRICT_ORDERING,
> +};
> +
> static const struct of_device_id sf_pdma_dt_ids[] = {
> - { .compatible = "sifive,fu540-c000-pdma" },
> - { .compatible = "sifive,pdma0" },
> + {
> + .compatible = "sifive,fu540-c000-pdma",
> + }, {
> + .compatible = "sifive,pdma0",
> + }, {
> + .compatible = "microchip,mpfs-pdma",
> + .data = &mpfs_pdma,
> + },
> {},
> };
> +
> MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
>
> static struct platform_driver sf_pdma_driver = {
> diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index 5c398a83b491..3b16db4daa0b 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.h
> +++ b/drivers/dma/sf-pdma/sf-pdma.h
> @@ -49,6 +49,7 @@
>
> /* Transfer Type */
> #define PDMA_FULL_SPEED 0xFF000008
> +#define NO_STRICT_ORDERING BIT(3)
>
> /* Error Recovery */
> #define MAX_RETRY 1
> @@ -112,8 +113,13 @@ struct sf_pdma {
> struct dma_device dma_dev;
> void __iomem *membase;
> void __iomem *mappedbase;
> + u32 transfer_type;
> u32 n_chans;
> struct sf_pdma_chan chans[];
> };
>
> +struct sf_pdma_driver_platdata {
> + u32 quirks;
> +};
> +
> #endif /* _SF_PDMA_H */
> --
> 2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 1/4] dmaengine: sf-pdma: Support of_dma_controller_register()
2023-10-03 4:22 ` shravan chippa
@ 2023-10-03 7:36 ` Emil Renner Berthing
-1 siblings, 0 replies; 32+ messages in thread
From: Emil Renner Berthing @ 2023-10-03 7:36 UTC (permalink / raw)
To: shravan chippa, green.wan, vkoul, robh+dt,
krzysztof.kozlowski+dt, palmer, paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar
shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
>
> Update sf-pdma driver to adopt generic DMA device tree bindings.
> It calls of_dma_controller_register() with sf-pdma specific
> of_dma_xlate to get the generic DMA device tree helper support
> and the DMA clients can look up the sf-pdma controller using
> standard APIs.
>
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> ---
> drivers/dma/sf-pdma/sf-pdma.c | 44 +++++++++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index d1c6956af452..06a0912a12a1 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -20,6 +20,7 @@
> #include <linux/mod_devicetable.h>
> #include <linux/dma-mapping.h>
> #include <linux/of.h>
> +#include <linux/of_dma.h>
> #include <linux/slab.h>
>
> #include "sf-pdma.h"
> @@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma)
> }
> }
>
> +static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
> + struct of_dma *ofdma)
> +{
> + struct sf_pdma *pdma = ofdma->of_dma_data;
> + struct device *dev = pdma->dma_dev.dev;
> + struct sf_pdma_chan *chan;
If you're respinning this series anyway, you have two spaces here.
> + struct dma_chan *c;
> + u32 channel_id;
> +
> + if (dma_spec->args_count != 1) {
> + dev_err(dev, "Bad number of cells\n");
> + return NULL;
> + }
> +
> + channel_id = dma_spec->args[0];
> +
> + chan = &pdma->chans[channel_id];
> +
> + c = dma_get_slave_channel(&chan->vchan.chan);
> + if (!c) {
> + dev_err(dev, "No more channels available\n");
> + return NULL;
> + }
> +
> + return c;
> +}
> +
> static int sf_pdma_probe(struct platform_device *pdev)
> {
> struct sf_pdma *pdma;
> @@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device *pdev)
> return ret;
> }
>
> + ret = of_dma_controller_register(pdev->dev.of_node,
> + sf_pdma_of_xlate, pdma);
> + if (ret < 0) {
> + dev_err(&pdev->dev,
> + "Can't register SiFive Platform OF_DMA. (%d)\n", ret);
> + goto err_unregister;
> + }
> +
> return 0;
> +
> +err_unregister:
> + dma_async_device_unregister(&pdma->dma_dev);
> +
> + return ret;
> }
>
> static int sf_pdma_remove(struct platform_device *pdev)
> @@ -583,6 +624,9 @@ static int sf_pdma_remove(struct platform_device *pdev)
> tasklet_kill(&ch->err_tasklet);
> }
>
> + if (pdev->dev.of_node)
> + of_dma_controller_free(pdev->dev.of_node);
> +
> dma_async_device_unregister(&pdma->dma_dev);
>
> return 0;
> --
> 2.34.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 1/4] dmaengine: sf-pdma: Support of_dma_controller_register()
@ 2023-10-03 7:36 ` Emil Renner Berthing
0 siblings, 0 replies; 32+ messages in thread
From: Emil Renner Berthing @ 2023-10-03 7:36 UTC (permalink / raw)
To: shravan chippa, green.wan, vkoul, robh+dt,
krzysztof.kozlowski+dt, palmer, paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar
shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
>
> Update sf-pdma driver to adopt generic DMA device tree bindings.
> It calls of_dma_controller_register() with sf-pdma specific
> of_dma_xlate to get the generic DMA device tree helper support
> and the DMA clients can look up the sf-pdma controller using
> standard APIs.
>
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> ---
> drivers/dma/sf-pdma/sf-pdma.c | 44 +++++++++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index d1c6956af452..06a0912a12a1 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -20,6 +20,7 @@
> #include <linux/mod_devicetable.h>
> #include <linux/dma-mapping.h>
> #include <linux/of.h>
> +#include <linux/of_dma.h>
> #include <linux/slab.h>
>
> #include "sf-pdma.h"
> @@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma)
> }
> }
>
> +static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
> + struct of_dma *ofdma)
> +{
> + struct sf_pdma *pdma = ofdma->of_dma_data;
> + struct device *dev = pdma->dma_dev.dev;
> + struct sf_pdma_chan *chan;
If you're respinning this series anyway, you have two spaces here.
> + struct dma_chan *c;
> + u32 channel_id;
> +
> + if (dma_spec->args_count != 1) {
> + dev_err(dev, "Bad number of cells\n");
> + return NULL;
> + }
> +
> + channel_id = dma_spec->args[0];
> +
> + chan = &pdma->chans[channel_id];
> +
> + c = dma_get_slave_channel(&chan->vchan.chan);
> + if (!c) {
> + dev_err(dev, "No more channels available\n");
> + return NULL;
> + }
> +
> + return c;
> +}
> +
> static int sf_pdma_probe(struct platform_device *pdev)
> {
> struct sf_pdma *pdma;
> @@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device *pdev)
> return ret;
> }
>
> + ret = of_dma_controller_register(pdev->dev.of_node,
> + sf_pdma_of_xlate, pdma);
> + if (ret < 0) {
> + dev_err(&pdev->dev,
> + "Can't register SiFive Platform OF_DMA. (%d)\n", ret);
> + goto err_unregister;
> + }
> +
> return 0;
> +
> +err_unregister:
> + dma_async_device_unregister(&pdma->dma_dev);
> +
> + return ret;
> }
>
> static int sf_pdma_remove(struct platform_device *pdev)
> @@ -583,6 +624,9 @@ static int sf_pdma_remove(struct platform_device *pdev)
> tasklet_kill(&ch->err_tasklet);
> }
>
> + if (pdev->dev.of_node)
> + of_dma_controller_free(pdev->dev.of_node);
> +
> dma_async_device_unregister(&pdma->dma_dev);
>
> return 0;
> --
> 2.34.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 32+ messages in thread
* RE: [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name
2023-10-03 7:35 ` Emil Renner Berthing
@ 2023-10-04 3:47 ` Shravan.Chippa
-1 siblings, 0 replies; 32+ messages in thread
From: Shravan.Chippa @ 2023-10-04 3:47 UTC (permalink / raw)
To: emil.renner.berthing, green.wan, vkoul, robh+dt,
krzysztof.kozlowski+dt, palmer, paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
Nagasuresh.Relli, Praveen.Kumar
Hi Emil Renner,
> -----Original Message-----
> From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> Sent: Tuesday, October 3, 2023 1:05 PM
> To: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>;
> green.wan@sifive.com; vkoul@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; palmer@dabbelt.com;
> paul.walmsley@sifive.com; conor+dt@kernel.org
> Cc: dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli - I67208
> <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>
> Subject: Re: [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible
> name
>
> [You don't often get email from emil.renner.berthing@canonical.com. Learn why
> this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > Sifive platform dma does not allow out-of-order transfers, Add a
> > PolarFire SoC specific compatible and code to support for out-of-order
> > dma transfers
> >
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > ---
> > drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> > drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++
> > 2 files changed, 30 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.c
> > b/drivers/dma/sf-pdma/sf-pdma.c index 06a0912a12a1..a9ff319d4ca3
> > 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.c
> > +++ b/drivers/dma/sf-pdma/sf-pdma.c
> > @@ -21,6 +21,7 @@
> > #include <linux/dma-mapping.h>
> > #include <linux/of.h>
> > #include <linux/of_dma.h>
> > +#include <linux/of_device.h>
> > #include <linux/slab.h>
> >
> > #include "sf-pdma.h"
> > @@ -66,7 +67,7 @@ static struct sf_pdma_desc
> > *sf_pdma_alloc_desc(struct sf_pdma_chan *chan) static void
> sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> > u64 dst, u64 src, u64 size) {
> > - desc->xfer_type = PDMA_FULL_SPEED;
> > + desc->xfer_type = desc->chan->pdma->transfer_type;
>
> Two spaces.
>
> > desc->xfer_size = size;
> > desc->dst_addr = dst;
> > desc->src_addr = src;
> > @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct
> of_phandle_args *dma_spec,
> >
> > static int sf_pdma_probe(struct platform_device *pdev)
> > {
> > + const struct sf_pdma_driver_platdata *ddata;
> > struct sf_pdma *pdma;
> > int ret, n_chans;
> > const enum dma_slave_buswidth widths =
> > @@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device
> *pdev)
> >
> > pdma->n_chans = n_chans;
> >
> > + pdma->transfer_type = PDMA_FULL_SPEED;
> > +
> > + ddata = of_device_get_match_data(&pdev->dev);
> > + if (ddata) {
> > + if (ddata->quirks & NO_STRICT_ORDERING)
> > + pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> > + }
> > +
>
> The commit message says "Sifive platform dma does not allow out-of-order
> transfers" so you want strict ordering by default and then allow
> out-of-order transfers if the match data allows it, right?
>
> But here bit 3 is set by default and cleared if the quirk is set, so it looks
> like bit 3 actually means "strict ordering" and not "no strict ordering" as
> you've named it.
>
> The confusion here probably stems using the same define for the quirk and the
> xfer_type. Unless I'm mistaken above I'd find something like this a lot easier
> to read:
>
> sf_pdma.h:
> #define PDMA_FULL_SPEED 0xFF000000
> #define PDMA_STRICT_ORDERING BIT(3)
>
> sf_pdma.c:
> #define PDMA_QUIRK_NO_STRICT_ORDERING BIT(0)
>
> dma->transfer_type = PDMA_FULL_SPEED | PDMA_STRICT_ORDERING;
> ...
> if (ddata->quirks & PDMA_QUIRK_NO_STRICT_ORDERING)
> pdma->transfer_type &= ~PDMA_STRICT_ORDERING;
>
Thanks for the input. To avoid confusion on the naming of the macro and new macro for quirk
I will try to modify it as you mentioned.
Thanks,
Shravan
> > pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> > if (IS_ERR(pdma->membase))
> > return PTR_ERR(pdma->membase);
> > @@ -632,11 +642,22 @@ static int sf_pdma_remove(struct platform_device
> *pdev)
> > return 0;
> > }
> >
> > +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> > + .quirks = NO_STRICT_ORDERING,
> > +};
> > +
> > static const struct of_device_id sf_pdma_dt_ids[] = {
> > - { .compatible = "sifive,fu540-c000-pdma" },
> > - { .compatible = "sifive,pdma0" },
> > + {
> > + .compatible = "sifive,fu540-c000-pdma",
> > + }, {
> > + .compatible = "sifive,pdma0",
> > + }, {
> > + .compatible = "microchip,mpfs-pdma",
> > + .data = &mpfs_pdma,
> > + },
> > {},
> > };
> > +
> > MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
> >
> > static struct platform_driver sf_pdma_driver = {
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> > index 5c398a83b491..3b16db4daa0b 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.h
> > +++ b/drivers/dma/sf-pdma/sf-pdma.h
> > @@ -49,6 +49,7 @@
> >
> > /* Transfer Type */
> > #define PDMA_FULL_SPEED 0xFF000008
> > +#define NO_STRICT_ORDERING BIT(3)
> >
> > /* Error Recovery */
> > #define MAX_RETRY 1
> > @@ -112,8 +113,13 @@ struct sf_pdma {
> > struct dma_device dma_dev;
> > void __iomem *membase;
> > void __iomem *mappedbase;
> > + u32 transfer_type;
> > u32 n_chans;
> > struct sf_pdma_chan chans[];
> > };
> >
> > +struct sf_pdma_driver_platdata {
> > + u32 quirks;
> > +};
> > +
> > #endif /* _SF_PDMA_H */
> > --
> > 2.34.1
^ permalink raw reply [flat|nested] 32+ messages in thread
* RE: [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name
@ 2023-10-04 3:47 ` Shravan.Chippa
0 siblings, 0 replies; 32+ messages in thread
From: Shravan.Chippa @ 2023-10-04 3:47 UTC (permalink / raw)
To: emil.renner.berthing, green.wan, vkoul, robh+dt,
krzysztof.kozlowski+dt, palmer, paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
Nagasuresh.Relli, Praveen.Kumar
Hi Emil Renner,
> -----Original Message-----
> From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> Sent: Tuesday, October 3, 2023 1:05 PM
> To: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>;
> green.wan@sifive.com; vkoul@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; palmer@dabbelt.com;
> paul.walmsley@sifive.com; conor+dt@kernel.org
> Cc: dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli - I67208
> <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>
> Subject: Re: [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible
> name
>
> [You don't often get email from emil.renner.berthing@canonical.com. Learn why
> this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > Sifive platform dma does not allow out-of-order transfers, Add a
> > PolarFire SoC specific compatible and code to support for out-of-order
> > dma transfers
> >
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > ---
> > drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> > drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++
> > 2 files changed, 30 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.c
> > b/drivers/dma/sf-pdma/sf-pdma.c index 06a0912a12a1..a9ff319d4ca3
> > 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.c
> > +++ b/drivers/dma/sf-pdma/sf-pdma.c
> > @@ -21,6 +21,7 @@
> > #include <linux/dma-mapping.h>
> > #include <linux/of.h>
> > #include <linux/of_dma.h>
> > +#include <linux/of_device.h>
> > #include <linux/slab.h>
> >
> > #include "sf-pdma.h"
> > @@ -66,7 +67,7 @@ static struct sf_pdma_desc
> > *sf_pdma_alloc_desc(struct sf_pdma_chan *chan) static void
> sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> > u64 dst, u64 src, u64 size) {
> > - desc->xfer_type = PDMA_FULL_SPEED;
> > + desc->xfer_type = desc->chan->pdma->transfer_type;
>
> Two spaces.
>
> > desc->xfer_size = size;
> > desc->dst_addr = dst;
> > desc->src_addr = src;
> > @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct
> of_phandle_args *dma_spec,
> >
> > static int sf_pdma_probe(struct platform_device *pdev)
> > {
> > + const struct sf_pdma_driver_platdata *ddata;
> > struct sf_pdma *pdma;
> > int ret, n_chans;
> > const enum dma_slave_buswidth widths =
> > @@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device
> *pdev)
> >
> > pdma->n_chans = n_chans;
> >
> > + pdma->transfer_type = PDMA_FULL_SPEED;
> > +
> > + ddata = of_device_get_match_data(&pdev->dev);
> > + if (ddata) {
> > + if (ddata->quirks & NO_STRICT_ORDERING)
> > + pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> > + }
> > +
>
> The commit message says "Sifive platform dma does not allow out-of-order
> transfers" so you want strict ordering by default and then allow
> out-of-order transfers if the match data allows it, right?
>
> But here bit 3 is set by default and cleared if the quirk is set, so it looks
> like bit 3 actually means "strict ordering" and not "no strict ordering" as
> you've named it.
>
> The confusion here probably stems using the same define for the quirk and the
> xfer_type. Unless I'm mistaken above I'd find something like this a lot easier
> to read:
>
> sf_pdma.h:
> #define PDMA_FULL_SPEED 0xFF000000
> #define PDMA_STRICT_ORDERING BIT(3)
>
> sf_pdma.c:
> #define PDMA_QUIRK_NO_STRICT_ORDERING BIT(0)
>
> dma->transfer_type = PDMA_FULL_SPEED | PDMA_STRICT_ORDERING;
> ...
> if (ddata->quirks & PDMA_QUIRK_NO_STRICT_ORDERING)
> pdma->transfer_type &= ~PDMA_STRICT_ORDERING;
>
Thanks for the input. To avoid confusion on the naming of the macro and new macro for quirk
I will try to modify it as you mentioned.
Thanks,
Shravan
> > pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> > if (IS_ERR(pdma->membase))
> > return PTR_ERR(pdma->membase);
> > @@ -632,11 +642,22 @@ static int sf_pdma_remove(struct platform_device
> *pdev)
> > return 0;
> > }
> >
> > +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> > + .quirks = NO_STRICT_ORDERING,
> > +};
> > +
> > static const struct of_device_id sf_pdma_dt_ids[] = {
> > - { .compatible = "sifive,fu540-c000-pdma" },
> > - { .compatible = "sifive,pdma0" },
> > + {
> > + .compatible = "sifive,fu540-c000-pdma",
> > + }, {
> > + .compatible = "sifive,pdma0",
> > + }, {
> > + .compatible = "microchip,mpfs-pdma",
> > + .data = &mpfs_pdma,
> > + },
> > {},
> > };
> > +
> > MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
> >
> > static struct platform_driver sf_pdma_driver = {
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> > index 5c398a83b491..3b16db4daa0b 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.h
> > +++ b/drivers/dma/sf-pdma/sf-pdma.h
> > @@ -49,6 +49,7 @@
> >
> > /* Transfer Type */
> > #define PDMA_FULL_SPEED 0xFF000008
> > +#define NO_STRICT_ORDERING BIT(3)
> >
> > /* Error Recovery */
> > #define MAX_RETRY 1
> > @@ -112,8 +113,13 @@ struct sf_pdma {
> > struct dma_device dma_dev;
> > void __iomem *membase;
> > void __iomem *mappedbase;
> > + u32 transfer_type;
> > u32 n_chans;
> > struct sf_pdma_chan chans[];
> > };
> >
> > +struct sf_pdma_driver_platdata {
> > + u32 quirks;
> > +};
> > +
> > #endif /* _SF_PDMA_H */
> > --
> > 2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name
2023-10-03 4:22 ` shravan chippa
@ 2023-10-04 13:22 ` Rob Herring
-1 siblings, 0 replies; 32+ messages in thread
From: Rob Herring @ 2023-10-04 13:22 UTC (permalink / raw)
To: shravan chippa
Cc: green.wan, vkoul, krzysztof.kozlowski+dt, palmer, paul.walmsley,
conor+dt, dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar
On Tue, Oct 03, 2023 at 09:52:14AM +0530, shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
>
> Sifive platform dma does not allow out-of-order transfers,
> Add a PolarFire SoC specific compatible and code to support
> for out-of-order dma transfers
>
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> ---
> drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++
> 2 files changed, 30 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index 06a0912a12a1..a9ff319d4ca3 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -21,6 +21,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/of.h>
> #include <linux/of_dma.h>
> +#include <linux/of_device.h>
Wrong header.
> #include <linux/slab.h>
>
> #include "sf-pdma.h"
> @@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
> static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> u64 dst, u64 src, u64 size)
> {
> - desc->xfer_type = PDMA_FULL_SPEED;
> + desc->xfer_type = desc->chan->pdma->transfer_type;
> desc->xfer_size = size;
> desc->dst_addr = dst;
> desc->src_addr = src;
> @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
>
> static int sf_pdma_probe(struct platform_device *pdev)
> {
> + const struct sf_pdma_driver_platdata *ddata;
> struct sf_pdma *pdma;
> int ret, n_chans;
> const enum dma_slave_buswidth widths =
> @@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
>
> pdma->n_chans = n_chans;
>
> + pdma->transfer_type = PDMA_FULL_SPEED;
> +
> + ddata = of_device_get_match_data(&pdev->dev);
Use device_get_match_data() instead
> + if (ddata) {
> + if (ddata->quirks & NO_STRICT_ORDERING)
> + pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> + }
> +
> pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> if (IS_ERR(pdma->membase))
> return PTR_ERR(pdma->membase);
> @@ -632,11 +642,22 @@ static int sf_pdma_remove(struct platform_device *pdev)
> return 0;
> }
>
> +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> + .quirks = NO_STRICT_ORDERING,
> +};
> +
> static const struct of_device_id sf_pdma_dt_ids[] = {
> - { .compatible = "sifive,fu540-c000-pdma" },
> - { .compatible = "sifive,pdma0" },
> + {
> + .compatible = "sifive,fu540-c000-pdma",
> + }, {
> + .compatible = "sifive,pdma0",
> + }, {
> + .compatible = "microchip,mpfs-pdma",
> + .data = &mpfs_pdma,
> + },
> {},
> };
> +
> MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
>
> static struct platform_driver sf_pdma_driver = {
> diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index 5c398a83b491..3b16db4daa0b 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.h
> +++ b/drivers/dma/sf-pdma/sf-pdma.h
> @@ -49,6 +49,7 @@
>
> /* Transfer Type */
> #define PDMA_FULL_SPEED 0xFF000008
> +#define NO_STRICT_ORDERING BIT(3)
>
> /* Error Recovery */
> #define MAX_RETRY 1
> @@ -112,8 +113,13 @@ struct sf_pdma {
> struct dma_device dma_dev;
> void __iomem *membase;
> void __iomem *mappedbase;
> + u32 transfer_type;
> u32 n_chans;
> struct sf_pdma_chan chans[];
> };
>
> +struct sf_pdma_driver_platdata {
> + u32 quirks;
> +};
> +
> #endif /* _SF_PDMA_H */
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible name
@ 2023-10-04 13:22 ` Rob Herring
0 siblings, 0 replies; 32+ messages in thread
From: Rob Herring @ 2023-10-04 13:22 UTC (permalink / raw)
To: shravan chippa
Cc: green.wan, vkoul, krzysztof.kozlowski+dt, palmer, paul.walmsley,
conor+dt, dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar
On Tue, Oct 03, 2023 at 09:52:14AM +0530, shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
>
> Sifive platform dma does not allow out-of-order transfers,
> Add a PolarFire SoC specific compatible and code to support
> for out-of-order dma transfers
>
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> ---
> drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++
> 2 files changed, 30 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index 06a0912a12a1..a9ff319d4ca3 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -21,6 +21,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/of.h>
> #include <linux/of_dma.h>
> +#include <linux/of_device.h>
Wrong header.
> #include <linux/slab.h>
>
> #include "sf-pdma.h"
> @@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
> static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> u64 dst, u64 src, u64 size)
> {
> - desc->xfer_type = PDMA_FULL_SPEED;
> + desc->xfer_type = desc->chan->pdma->transfer_type;
> desc->xfer_size = size;
> desc->dst_addr = dst;
> desc->src_addr = src;
> @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
>
> static int sf_pdma_probe(struct platform_device *pdev)
> {
> + const struct sf_pdma_driver_platdata *ddata;
> struct sf_pdma *pdma;
> int ret, n_chans;
> const enum dma_slave_buswidth widths =
> @@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
>
> pdma->n_chans = n_chans;
>
> + pdma->transfer_type = PDMA_FULL_SPEED;
> +
> + ddata = of_device_get_match_data(&pdev->dev);
Use device_get_match_data() instead
> + if (ddata) {
> + if (ddata->quirks & NO_STRICT_ORDERING)
> + pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> + }
> +
> pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> if (IS_ERR(pdma->membase))
> return PTR_ERR(pdma->membase);
> @@ -632,11 +642,22 @@ static int sf_pdma_remove(struct platform_device *pdev)
> return 0;
> }
>
> +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> + .quirks = NO_STRICT_ORDERING,
> +};
> +
> static const struct of_device_id sf_pdma_dt_ids[] = {
> - { .compatible = "sifive,fu540-c000-pdma" },
> - { .compatible = "sifive,pdma0" },
> + {
> + .compatible = "sifive,fu540-c000-pdma",
> + }, {
> + .compatible = "sifive,pdma0",
> + }, {
> + .compatible = "microchip,mpfs-pdma",
> + .data = &mpfs_pdma,
> + },
> {},
> };
> +
> MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
>
> static struct platform_driver sf_pdma_driver = {
> diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index 5c398a83b491..3b16db4daa0b 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.h
> +++ b/drivers/dma/sf-pdma/sf-pdma.h
> @@ -49,6 +49,7 @@
>
> /* Transfer Type */
> #define PDMA_FULL_SPEED 0xFF000008
> +#define NO_STRICT_ORDERING BIT(3)
>
> /* Error Recovery */
> #define MAX_RETRY 1
> @@ -112,8 +113,13 @@ struct sf_pdma {
> struct dma_device dma_dev;
> void __iomem *membase;
> void __iomem *mappedbase;
> + u32 transfer_type;
> u32 n_chans;
> struct sf_pdma_chan chans[];
> };
>
> +struct sf_pdma_driver_platdata {
> + u32 quirks;
> +};
> +
> #endif /* _SF_PDMA_H */
> --
> 2.34.1
>
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^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name
2023-10-03 4:22 ` shravan chippa
@ 2023-10-04 13:30 ` Rob Herring
-1 siblings, 0 replies; 32+ messages in thread
From: Rob Herring @ 2023-10-04 13:30 UTC (permalink / raw)
To: shravan chippa
Cc: green.wan, vkoul, krzysztof.kozlowski+dt, palmer, paul.walmsley,
conor+dt, dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar, Conor Dooley
On Tue, Oct 03, 2023 at 09:52:13AM +0530, shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
>
> Add new compatible name microchip,mpfs-pdma to support
> out of order dma transfers
>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> ---
> .../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++++++++----
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> index a1af0b906365..974467c4bacb 100644
> --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> @@ -27,10 +27,14 @@ allOf:
>
> properties:
> compatible:
> - items:
> - - enum:
> - - sifive,fu540-c000-pdma
> - - const: sifive,pdma0
> + oneOf:
> + - items:
> + - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
> + - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer
This doesn't really make sense. microchip,mpfs-pdma is compatible with
sifive,fu540-c000-pdma and sifive,fu540-c000-pdma is compatible with
sifive,pdma0, but microchip,mpfs-pdma is not compatible with
sifive,pdma0? (Or replace "compatible with" with "a superset of")
Any fallback is only useful if an OS only understanding the fallback
will work with the h/w. Does this h/w work without the driver changes?
Rob
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name
@ 2023-10-04 13:30 ` Rob Herring
0 siblings, 0 replies; 32+ messages in thread
From: Rob Herring @ 2023-10-04 13:30 UTC (permalink / raw)
To: shravan chippa
Cc: green.wan, vkoul, krzysztof.kozlowski+dt, palmer, paul.walmsley,
conor+dt, dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar, Conor Dooley
On Tue, Oct 03, 2023 at 09:52:13AM +0530, shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
>
> Add new compatible name microchip,mpfs-pdma to support
> out of order dma transfers
>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> ---
> .../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++++++++----
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> index a1af0b906365..974467c4bacb 100644
> --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> @@ -27,10 +27,14 @@ allOf:
>
> properties:
> compatible:
> - items:
> - - enum:
> - - sifive,fu540-c000-pdma
> - - const: sifive,pdma0
> + oneOf:
> + - items:
> + - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
> + - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer
This doesn't really make sense. microchip,mpfs-pdma is compatible with
sifive,fu540-c000-pdma and sifive,fu540-c000-pdma is compatible with
sifive,pdma0, but microchip,mpfs-pdma is not compatible with
sifive,pdma0? (Or replace "compatible with" with "a superset of")
Any fallback is only useful if an OS only understanding the fallback
will work with the h/w. Does this h/w work without the driver changes?
Rob
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name
2023-10-04 13:30 ` Rob Herring
@ 2023-10-05 10:54 ` Conor Dooley
-1 siblings, 0 replies; 32+ messages in thread
From: Conor Dooley @ 2023-10-05 10:54 UTC (permalink / raw)
To: Rob Herring
Cc: shravan chippa, green.wan, vkoul, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt, dmaengine, devicetree, linux-riscv,
linux-kernel, nagasuresh.relli, praveen.kumar, Conor Dooley
[-- Attachment #1: Type: text/plain, Size: 2411 bytes --]
On Wed, Oct 04, 2023 at 08:30:21AM -0500, Rob Herring wrote:
> On Tue, Oct 03, 2023 at 09:52:13AM +0530, shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > Add new compatible name microchip,mpfs-pdma to support
> > out of order dma transfers
> >
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > ---
> > .../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++++++++----
> > 1 file changed, 8 insertions(+), 4 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > index a1af0b906365..974467c4bacb 100644
> > --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > @@ -27,10 +27,14 @@ allOf:
> >
> > properties:
> > compatible:
> > - items:
> > - - enum:
> > - - sifive,fu540-c000-pdma
> > - - const: sifive,pdma0
> > + oneOf:
> > + - items:
> > + - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
> > + - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer
IIRC I asked for the comments here to be removed on the previous
version, and my r-b was conditional on that.
The device specific compatible has merit outside of the ordering, which
may just be a software policy decision.
> This doesn't really make sense. microchip,mpfs-pdma is compatible with
> sifive,fu540-c000-pdma and sifive,fu540-c000-pdma is compatible with
> sifive,pdma0, but microchip,mpfs-pdma is not compatible with
> sifive,pdma0? (Or replace "compatible with" with "a superset of")
TBH, I am not sure why it was done this way. Probably because the driver
contains both sifive,pdma0 and sifive,fu540-c000-pdma. Doing
compatible = "microchip,mpfs-pdma", "sifive,fu540-c000-pdma", "sifive,pdma0";
thing would be fine.
> Any fallback is only useful if an OS only understanding the fallback
> will work with the h/w. Does this h/w work without the driver changes?
Yes.
I've been hoping that someone from SiFive would come along, and in
response to this patchset, tell us _why_ the driver does not make use of
out-of-order transfers to begin with.
Thanks,
Conor.
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^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name
@ 2023-10-05 10:54 ` Conor Dooley
0 siblings, 0 replies; 32+ messages in thread
From: Conor Dooley @ 2023-10-05 10:54 UTC (permalink / raw)
To: Rob Herring
Cc: shravan chippa, green.wan, vkoul, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt, dmaengine, devicetree, linux-riscv,
linux-kernel, nagasuresh.relli, praveen.kumar, Conor Dooley
[-- Attachment #1.1: Type: text/plain, Size: 2411 bytes --]
On Wed, Oct 04, 2023 at 08:30:21AM -0500, Rob Herring wrote:
> On Tue, Oct 03, 2023 at 09:52:13AM +0530, shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > Add new compatible name microchip,mpfs-pdma to support
> > out of order dma transfers
> >
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > ---
> > .../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++++++++----
> > 1 file changed, 8 insertions(+), 4 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > index a1af0b906365..974467c4bacb 100644
> > --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > @@ -27,10 +27,14 @@ allOf:
> >
> > properties:
> > compatible:
> > - items:
> > - - enum:
> > - - sifive,fu540-c000-pdma
> > - - const: sifive,pdma0
> > + oneOf:
> > + - items:
> > + - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
> > + - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer
IIRC I asked for the comments here to be removed on the previous
version, and my r-b was conditional on that.
The device specific compatible has merit outside of the ordering, which
may just be a software policy decision.
> This doesn't really make sense. microchip,mpfs-pdma is compatible with
> sifive,fu540-c000-pdma and sifive,fu540-c000-pdma is compatible with
> sifive,pdma0, but microchip,mpfs-pdma is not compatible with
> sifive,pdma0? (Or replace "compatible with" with "a superset of")
TBH, I am not sure why it was done this way. Probably because the driver
contains both sifive,pdma0 and sifive,fu540-c000-pdma. Doing
compatible = "microchip,mpfs-pdma", "sifive,fu540-c000-pdma", "sifive,pdma0";
thing would be fine.
> Any fallback is only useful if an OS only understanding the fallback
> will work with the h/w. Does this h/w work without the driver changes?
Yes.
I've been hoping that someone from SiFive would come along, and in
response to this patchset, tell us _why_ the driver does not make use of
out-of-order transfers to begin with.
Thanks,
Conor.
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 161 bytes --]
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 32+ messages in thread
* RE: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name
2023-10-05 10:54 ` Conor Dooley
@ 2023-10-12 9:22 ` Shravan.Chippa
-1 siblings, 0 replies; 32+ messages in thread
From: Shravan.Chippa @ 2023-10-12 9:22 UTC (permalink / raw)
To: conor, robh
Cc: green.wan, vkoul, krzysztof.kozlowski+dt, palmer, paul.walmsley,
conor+dt, dmaengine, devicetree, linux-riscv, linux-kernel,
Nagasuresh.Relli, Praveen.Kumar, Conor.Dooley
Hi,
> -----Original Message-----
> From: Conor Dooley <conor@kernel.org>
> Sent: Thursday, October 5, 2023 4:24 PM
> To: Rob Herring <robh@kernel.org>
> Cc: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>;
> green.wan@sifive.com; vkoul@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> palmer@dabbelt.com; paul.walmsley@sifive.com; conor+dt@kernel.org;
> dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli - I67208
> <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>; Conor Dooley - M52691
> <Conor.Dooley@microchip.com>
> Subject: Re: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible
> name
>
> On Wed, Oct 04, 2023 at 08:30:21AM -0500, Rob Herring wrote:
> > On Tue, Oct 03, 2023 at 09:52:13AM +0530, shravan chippa wrote:
> > > From: Shravan Chippa <shravan.chippa@microchip.com>
> > >
> > > Add new compatible name microchip,mpfs-pdma to support out of order
> > > dma transfers
> > >
> > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > > ---
> > > .../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++++++++----
> > > 1 file changed, 8 insertions(+), 4 deletions(-)
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > > b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > > index a1af0b906365..974467c4bacb 100644
> > > ---
> > > a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > > +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.y
> > > +++ aml
> > > @@ -27,10 +27,14 @@ allOf:
> > >
> > > properties:
> > > compatible:
> > > - items:
> > > - - enum:
> > > - - sifive,fu540-c000-pdma
> > > - - const: sifive,pdma0
> > > + oneOf:
> > > + - items:
> > > + - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
> > > + - const: sifive,fu540-c000-pdma # Sifive in-order DMA
> > > + transfer
>
> IIRC I asked for the comments here to be removed on the previous version, and
> my r-b was conditional on that.
> The device specific compatible has merit outside of the ordering, which may just
> be a software policy decision.
>
> > This doesn't really make sense. microchip,mpfs-pdma is compatible with
> > sifive,fu540-c000-pdma and sifive,fu540-c000-pdma is compatible with
> > sifive,pdma0, but microchip,mpfs-pdma is not compatible with
> > sifive,pdma0? (Or replace "compatible with" with "a superset of")
>
> TBH, I am not sure why it was done this way. Probably because the driver
> contains both sifive,pdma0 and sifive,fu540-c000-pdma. Doing compatible =
> "microchip,mpfs-pdma", "sifive,fu540-c000-pdma", "sifive,pdma0"; thing would
> be fine.
>
> > Any fallback is only useful if an OS only understanding the fallback
> > will work with the h/w. Does this h/w work without the driver changes?
>
> Yes.
> I've been hoping that someone from SiFive would come along, and in response to
> this patchset, tell us _why_ the driver does not make use of out-of-order transfers
> to begin with.
>
I am also expecting a replay someone from SiFive
The out-of-order should work with other RISC-V platforms also.
I will try to send V3 with the below changes (just adding a new compatible name)
****************************
--- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
+++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
@@ -29,6 +29,7 @@ properties:
compatible:
items:
- enum:
+ - microchip,mpfs-pdma
- sifive,fu540-c000-pdma
- const: sifive,pdma0
description:
***************************
Device tree patch
*****************************
--- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
@@ -221,7 +221,7 @@ plic: interrupt-controller@c000000 {
};
pdma: dma-controller@3000000 {
- compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
+ compatible = "microchip,mpfs-pdma", "sifive,fu540-c000-pdma", "sifive,pdma0";
reg = <0x0 0x3000000 0x0 0x8000>;
interrupt-parent = <&plic>;
interrupts = <5 6>, <7 8>, <9 10>, <11 12>;
***************************
Thanks,
Shravan
> Thanks,
> Conor.
^ permalink raw reply [flat|nested] 32+ messages in thread
* RE: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name
@ 2023-10-12 9:22 ` Shravan.Chippa
0 siblings, 0 replies; 32+ messages in thread
From: Shravan.Chippa @ 2023-10-12 9:22 UTC (permalink / raw)
To: conor, robh
Cc: green.wan, vkoul, krzysztof.kozlowski+dt, palmer, paul.walmsley,
conor+dt, dmaengine, devicetree, linux-riscv, linux-kernel,
Nagasuresh.Relli, Praveen.Kumar, Conor.Dooley
Hi,
> -----Original Message-----
> From: Conor Dooley <conor@kernel.org>
> Sent: Thursday, October 5, 2023 4:24 PM
> To: Rob Herring <robh@kernel.org>
> Cc: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>;
> green.wan@sifive.com; vkoul@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> palmer@dabbelt.com; paul.walmsley@sifive.com; conor+dt@kernel.org;
> dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli - I67208
> <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>; Conor Dooley - M52691
> <Conor.Dooley@microchip.com>
> Subject: Re: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible
> name
>
> On Wed, Oct 04, 2023 at 08:30:21AM -0500, Rob Herring wrote:
> > On Tue, Oct 03, 2023 at 09:52:13AM +0530, shravan chippa wrote:
> > > From: Shravan Chippa <shravan.chippa@microchip.com>
> > >
> > > Add new compatible name microchip,mpfs-pdma to support out of order
> > > dma transfers
> > >
> > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > > ---
> > > .../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++++++++----
> > > 1 file changed, 8 insertions(+), 4 deletions(-)
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > > b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > > index a1af0b906365..974467c4bacb 100644
> > > ---
> > > a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > > +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.y
> > > +++ aml
> > > @@ -27,10 +27,14 @@ allOf:
> > >
> > > properties:
> > > compatible:
> > > - items:
> > > - - enum:
> > > - - sifive,fu540-c000-pdma
> > > - - const: sifive,pdma0
> > > + oneOf:
> > > + - items:
> > > + - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
> > > + - const: sifive,fu540-c000-pdma # Sifive in-order DMA
> > > + transfer
>
> IIRC I asked for the comments here to be removed on the previous version, and
> my r-b was conditional on that.
> The device specific compatible has merit outside of the ordering, which may just
> be a software policy decision.
>
> > This doesn't really make sense. microchip,mpfs-pdma is compatible with
> > sifive,fu540-c000-pdma and sifive,fu540-c000-pdma is compatible with
> > sifive,pdma0, but microchip,mpfs-pdma is not compatible with
> > sifive,pdma0? (Or replace "compatible with" with "a superset of")
>
> TBH, I am not sure why it was done this way. Probably because the driver
> contains both sifive,pdma0 and sifive,fu540-c000-pdma. Doing compatible =
> "microchip,mpfs-pdma", "sifive,fu540-c000-pdma", "sifive,pdma0"; thing would
> be fine.
>
> > Any fallback is only useful if an OS only understanding the fallback
> > will work with the h/w. Does this h/w work without the driver changes?
>
> Yes.
> I've been hoping that someone from SiFive would come along, and in response to
> this patchset, tell us _why_ the driver does not make use of out-of-order transfers
> to begin with.
>
I am also expecting a replay someone from SiFive
The out-of-order should work with other RISC-V platforms also.
I will try to send V3 with the below changes (just adding a new compatible name)
****************************
--- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
+++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
@@ -29,6 +29,7 @@ properties:
compatible:
items:
- enum:
+ - microchip,mpfs-pdma
- sifive,fu540-c000-pdma
- const: sifive,pdma0
description:
***************************
Device tree patch
*****************************
--- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
@@ -221,7 +221,7 @@ plic: interrupt-controller@c000000 {
};
pdma: dma-controller@3000000 {
- compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
+ compatible = "microchip,mpfs-pdma", "sifive,fu540-c000-pdma", "sifive,pdma0";
reg = <0x0 0x3000000 0x0 0x8000>;
interrupt-parent = <&plic>;
interrupts = <5 6>, <7 8>, <9 10>, <11 12>;
***************************
Thanks,
Shravan
> Thanks,
> Conor.
_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name
2023-10-12 9:22 ` Shravan.Chippa
@ 2023-10-12 9:35 ` Conor Dooley
-1 siblings, 0 replies; 32+ messages in thread
From: Conor Dooley @ 2023-10-12 9:35 UTC (permalink / raw)
To: Shravan.Chippa
Cc: robh, green.wan, vkoul, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt, dmaengine, devicetree, linux-riscv,
linux-kernel, Nagasuresh.Relli, Praveen.Kumar, Conor.Dooley
[-- Attachment #1: Type: text/plain, Size: 5007 bytes --]
On Thu, Oct 12, 2023 at 09:22:17AM +0000, Shravan.Chippa@microchip.com wrote:
> Hi,
>
> > -----Original Message-----
> > From: Conor Dooley <conor@kernel.org>
> > Sent: Thursday, October 5, 2023 4:24 PM
> > To: Rob Herring <robh@kernel.org>
> > Cc: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>;
> > green.wan@sifive.com; vkoul@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> > palmer@dabbelt.com; paul.walmsley@sifive.com; conor+dt@kernel.org;
> > dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> > riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli - I67208
> > <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> > <Praveen.Kumar@microchip.com>; Conor Dooley - M52691
> > <Conor.Dooley@microchip.com>
> > Subject: Re: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible
> > name
> >
> > On Wed, Oct 04, 2023 at 08:30:21AM -0500, Rob Herring wrote:
> > > On Tue, Oct 03, 2023 at 09:52:13AM +0530, shravan chippa wrote:
> > > > From: Shravan Chippa <shravan.chippa@microchip.com>
> > > >
> > > > Add new compatible name microchip,mpfs-pdma to support out of order
> > > > dma transfers
> > > >
> > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > > > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > > > ---
> > > > .../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++++++++----
> > > > 1 file changed, 8 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git
> > > > a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > > > b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > > > index a1af0b906365..974467c4bacb 100644
> > > > ---
> > > > a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > > > +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.y
> > > > +++ aml
> > > > @@ -27,10 +27,14 @@ allOf:
> > > >
> > > > properties:
> > > > compatible:
> > > > - items:
> > > > - - enum:
> > > > - - sifive,fu540-c000-pdma
> > > > - - const: sifive,pdma0
> > > > + oneOf:
> > > > + - items:
> > > > + - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
> > > > + - const: sifive,fu540-c000-pdma # Sifive in-order DMA
> > > > + transfer
> >
> > IIRC I asked for the comments here to be removed on the previous version, and
> > my r-b was conditional on that.
> > The device specific compatible has merit outside of the ordering, which may just
> > be a software policy decision.
> >
> > > This doesn't really make sense. microchip,mpfs-pdma is compatible with
> > > sifive,fu540-c000-pdma and sifive,fu540-c000-pdma is compatible with
> > > sifive,pdma0, but microchip,mpfs-pdma is not compatible with
> > > sifive,pdma0? (Or replace "compatible with" with "a superset of")
> >
> > TBH, I am not sure why it was done this way. Probably because the driver
> > contains both sifive,pdma0 and sifive,fu540-c000-pdma. Doing compatible =
> > "microchip,mpfs-pdma", "sifive,fu540-c000-pdma", "sifive,pdma0"; thing would
> > be fine.
> >
> > > Any fallback is only useful if an OS only understanding the fallback
> > > will work with the h/w. Does this h/w work without the driver changes?
> >
> > Yes.
> > I've been hoping that someone from SiFive would come along, and in response to
> > this patchset, tell us _why_ the driver does not make use of out-of-order transfers
> > to begin with.
> >
>
> I am also expecting a replay someone from SiFive
> The out-of-order should work with other RISC-V platforms also.
>
> I will try to send V3 with the below changes (just adding a new compatible name)
>
> ****************************
> --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> @@ -29,6 +29,7 @@ properties:
> compatible:
> items:
> - enum:
> + - microchip,mpfs-pdma
> - sifive,fu540-c000-pdma
> - const: sifive,pdma0
> description:
> ***************************
>
> Device tree patch
> *****************************
> --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
> @@ -221,7 +221,7 @@ plic: interrupt-controller@c000000 {
> };
> pdma: dma-controller@3000000 {
> - compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
> + compatible = "microchip,mpfs-pdma", "sifive,fu540-c000-pdma", "sifive,pdma0";
This is gonna produce dtbs_check complaints. Your binding change only
permits `compatible = "microchip,mpfs-pdma", "sifive,pdma0";`
Cheers,
Conor.
> reg = <0x0 0x3000000 0x0 0x8000>;
> interrupt-parent = <&plic>;
> interrupts = <5 6>, <7 8>, <9 10>, <11 12>;
> ***************************
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^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name
@ 2023-10-12 9:35 ` Conor Dooley
0 siblings, 0 replies; 32+ messages in thread
From: Conor Dooley @ 2023-10-12 9:35 UTC (permalink / raw)
To: Shravan.Chippa
Cc: robh, green.wan, vkoul, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt, dmaengine, devicetree, linux-riscv,
linux-kernel, Nagasuresh.Relli, Praveen.Kumar, Conor.Dooley
[-- Attachment #1.1: Type: text/plain, Size: 5007 bytes --]
On Thu, Oct 12, 2023 at 09:22:17AM +0000, Shravan.Chippa@microchip.com wrote:
> Hi,
>
> > -----Original Message-----
> > From: Conor Dooley <conor@kernel.org>
> > Sent: Thursday, October 5, 2023 4:24 PM
> > To: Rob Herring <robh@kernel.org>
> > Cc: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>;
> > green.wan@sifive.com; vkoul@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> > palmer@dabbelt.com; paul.walmsley@sifive.com; conor+dt@kernel.org;
> > dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> > riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli - I67208
> > <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> > <Praveen.Kumar@microchip.com>; Conor Dooley - M52691
> > <Conor.Dooley@microchip.com>
> > Subject: Re: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible
> > name
> >
> > On Wed, Oct 04, 2023 at 08:30:21AM -0500, Rob Herring wrote:
> > > On Tue, Oct 03, 2023 at 09:52:13AM +0530, shravan chippa wrote:
> > > > From: Shravan Chippa <shravan.chippa@microchip.com>
> > > >
> > > > Add new compatible name microchip,mpfs-pdma to support out of order
> > > > dma transfers
> > > >
> > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > > > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > > > ---
> > > > .../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++++++++----
> > > > 1 file changed, 8 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git
> > > > a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > > > b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > > > index a1af0b906365..974467c4bacb 100644
> > > > ---
> > > > a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > > > +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.y
> > > > +++ aml
> > > > @@ -27,10 +27,14 @@ allOf:
> > > >
> > > > properties:
> > > > compatible:
> > > > - items:
> > > > - - enum:
> > > > - - sifive,fu540-c000-pdma
> > > > - - const: sifive,pdma0
> > > > + oneOf:
> > > > + - items:
> > > > + - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
> > > > + - const: sifive,fu540-c000-pdma # Sifive in-order DMA
> > > > + transfer
> >
> > IIRC I asked for the comments here to be removed on the previous version, and
> > my r-b was conditional on that.
> > The device specific compatible has merit outside of the ordering, which may just
> > be a software policy decision.
> >
> > > This doesn't really make sense. microchip,mpfs-pdma is compatible with
> > > sifive,fu540-c000-pdma and sifive,fu540-c000-pdma is compatible with
> > > sifive,pdma0, but microchip,mpfs-pdma is not compatible with
> > > sifive,pdma0? (Or replace "compatible with" with "a superset of")
> >
> > TBH, I am not sure why it was done this way. Probably because the driver
> > contains both sifive,pdma0 and sifive,fu540-c000-pdma. Doing compatible =
> > "microchip,mpfs-pdma", "sifive,fu540-c000-pdma", "sifive,pdma0"; thing would
> > be fine.
> >
> > > Any fallback is only useful if an OS only understanding the fallback
> > > will work with the h/w. Does this h/w work without the driver changes?
> >
> > Yes.
> > I've been hoping that someone from SiFive would come along, and in response to
> > this patchset, tell us _why_ the driver does not make use of out-of-order transfers
> > to begin with.
> >
>
> I am also expecting a replay someone from SiFive
> The out-of-order should work with other RISC-V platforms also.
>
> I will try to send V3 with the below changes (just adding a new compatible name)
>
> ****************************
> --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> @@ -29,6 +29,7 @@ properties:
> compatible:
> items:
> - enum:
> + - microchip,mpfs-pdma
> - sifive,fu540-c000-pdma
> - const: sifive,pdma0
> description:
> ***************************
>
> Device tree patch
> *****************************
> --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
> @@ -221,7 +221,7 @@ plic: interrupt-controller@c000000 {
> };
> pdma: dma-controller@3000000 {
> - compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
> + compatible = "microchip,mpfs-pdma", "sifive,fu540-c000-pdma", "sifive,pdma0";
This is gonna produce dtbs_check complaints. Your binding change only
permits `compatible = "microchip,mpfs-pdma", "sifive,pdma0";`
Cheers,
Conor.
> reg = <0x0 0x3000000 0x0 0x8000>;
> interrupt-parent = <&plic>;
> interrupts = <5 6>, <7 8>, <9 10>, <11 12>;
> ***************************
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 161 bytes --]
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name
2023-10-05 10:54 ` Conor Dooley
@ 2023-10-17 17:42 ` Samuel Holland
-1 siblings, 0 replies; 32+ messages in thread
From: Samuel Holland @ 2023-10-17 17:42 UTC (permalink / raw)
To: Conor Dooley, Rob Herring
Cc: shravan chippa, green.wan, vkoul, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt, dmaengine, devicetree, linux-riscv,
linux-kernel, nagasuresh.relli, praveen.kumar, Conor Dooley
Hi Conor,
On 2023-10-05 5:54 AM, Conor Dooley wrote:
> On Wed, Oct 04, 2023 at 08:30:21AM -0500, Rob Herring wrote:
>> Any fallback is only useful if an OS only understanding the fallback
>> will work with the h/w. Does this h/w work without the driver changes?
>
> Yes.
> I've been hoping that someone from SiFive would come along, and in
> response to this patchset, tell us _why_ the driver does not make use of
> out-of-order transfers to begin with.
I have raised this question internally. So far I have not seen anything to
suggest we need strictly-ordered transfers either, but I still need to confirm this.
Regards,
Samuel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name
@ 2023-10-17 17:42 ` Samuel Holland
0 siblings, 0 replies; 32+ messages in thread
From: Samuel Holland @ 2023-10-17 17:42 UTC (permalink / raw)
To: Conor Dooley, Rob Herring
Cc: shravan chippa, green.wan, vkoul, krzysztof.kozlowski+dt, palmer,
paul.walmsley, conor+dt, dmaengine, devicetree, linux-riscv,
linux-kernel, nagasuresh.relli, praveen.kumar, Conor Dooley
Hi Conor,
On 2023-10-05 5:54 AM, Conor Dooley wrote:
> On Wed, Oct 04, 2023 at 08:30:21AM -0500, Rob Herring wrote:
>> Any fallback is only useful if an OS only understanding the fallback
>> will work with the h/w. Does this h/w work without the driver changes?
>
> Yes.
> I've been hoping that someone from SiFive would come along, and in
> response to this patchset, tell us _why_ the driver does not make use of
> out-of-order transfers to begin with.
I have raised this question internally. So far I have not seen anything to
suggest we need strictly-ordered transfers either, but I still need to confirm this.
Regards,
Samuel
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 1/4] dmaengine: sf-pdma: Support of_dma_controller_register()
2023-10-03 4:22 ` shravan chippa
@ 2023-10-17 18:33 ` Samuel Holland
-1 siblings, 0 replies; 32+ messages in thread
From: Samuel Holland @ 2023-10-17 18:33 UTC (permalink / raw)
To: shravan chippa, green.wan, vkoul, robh+dt,
krzysztof.kozlowski+dt, palmer, paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar
Hi,
On 2023-10-02 11:22 PM, shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
>
> Update sf-pdma driver to adopt generic DMA device tree bindings.
> It calls of_dma_controller_register() with sf-pdma specific
> of_dma_xlate to get the generic DMA device tree helper support
> and the DMA clients can look up the sf-pdma controller using
> standard APIs.
>
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> ---
> drivers/dma/sf-pdma/sf-pdma.c | 44 +++++++++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index d1c6956af452..06a0912a12a1 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -20,6 +20,7 @@
> #include <linux/mod_devicetable.h>
> #include <linux/dma-mapping.h>
> #include <linux/of.h>
> +#include <linux/of_dma.h>
> #include <linux/slab.h>
>
> #include "sf-pdma.h"
> @@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma)
> }
> }
>
> +static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
> + struct of_dma *ofdma)
> +{
> + struct sf_pdma *pdma = ofdma->of_dma_data;
> + struct device *dev = pdma->dma_dev.dev;
> + struct sf_pdma_chan *chan;
> + struct dma_chan *c;
> + u32 channel_id;
> +
> + if (dma_spec->args_count != 1) {
> + dev_err(dev, "Bad number of cells\n");
> + return NULL;
> + }
> +
> + channel_id = dma_spec->args[0];
> +
> + chan = &pdma->chans[channel_id];
> +
> + c = dma_get_slave_channel(&chan->vchan.chan);
This does not look right to me. All of the channels in the controller are
identical and support arbitrary addresses, so there is no need to use a specific
physical channel. And unless Microchip has added something on top, the only way
to trigger a transfer is through the MMIO interface, so there is no request ID
to differentiate virtual channels either.
So it seems to me that #dma-cells should really be 0, and this function should
just call dma_get_any_slave_channel().
Regards,
Samuel
> + if (!c) {
> + dev_err(dev, "No more channels available\n");
> + return NULL;
> + }
> +
> + return c;
> +}
> +
> static int sf_pdma_probe(struct platform_device *pdev)
> {
> struct sf_pdma *pdma;
> @@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device *pdev)
> return ret;
> }
>
> + ret = of_dma_controller_register(pdev->dev.of_node,
> + sf_pdma_of_xlate, pdma);
> + if (ret < 0) {
> + dev_err(&pdev->dev,
> + "Can't register SiFive Platform OF_DMA. (%d)\n", ret);
> + goto err_unregister;
> + }
> +
> return 0;
> +
> +err_unregister:
> + dma_async_device_unregister(&pdma->dma_dev);
> +
> + return ret;
> }
>
> static int sf_pdma_remove(struct platform_device *pdev)
> @@ -583,6 +624,9 @@ static int sf_pdma_remove(struct platform_device *pdev)
> tasklet_kill(&ch->err_tasklet);
> }
>
> + if (pdev->dev.of_node)
> + of_dma_controller_free(pdev->dev.of_node);
> +
> dma_async_device_unregister(&pdma->dma_dev);
>
> return 0;
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 1/4] dmaengine: sf-pdma: Support of_dma_controller_register()
@ 2023-10-17 18:33 ` Samuel Holland
0 siblings, 0 replies; 32+ messages in thread
From: Samuel Holland @ 2023-10-17 18:33 UTC (permalink / raw)
To: shravan chippa, green.wan, vkoul, robh+dt,
krzysztof.kozlowski+dt, palmer, paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
nagasuresh.relli, praveen.kumar
Hi,
On 2023-10-02 11:22 PM, shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
>
> Update sf-pdma driver to adopt generic DMA device tree bindings.
> It calls of_dma_controller_register() with sf-pdma specific
> of_dma_xlate to get the generic DMA device tree helper support
> and the DMA clients can look up the sf-pdma controller using
> standard APIs.
>
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> ---
> drivers/dma/sf-pdma/sf-pdma.c | 44 +++++++++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index d1c6956af452..06a0912a12a1 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -20,6 +20,7 @@
> #include <linux/mod_devicetable.h>
> #include <linux/dma-mapping.h>
> #include <linux/of.h>
> +#include <linux/of_dma.h>
> #include <linux/slab.h>
>
> #include "sf-pdma.h"
> @@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma)
> }
> }
>
> +static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
> + struct of_dma *ofdma)
> +{
> + struct sf_pdma *pdma = ofdma->of_dma_data;
> + struct device *dev = pdma->dma_dev.dev;
> + struct sf_pdma_chan *chan;
> + struct dma_chan *c;
> + u32 channel_id;
> +
> + if (dma_spec->args_count != 1) {
> + dev_err(dev, "Bad number of cells\n");
> + return NULL;
> + }
> +
> + channel_id = dma_spec->args[0];
> +
> + chan = &pdma->chans[channel_id];
> +
> + c = dma_get_slave_channel(&chan->vchan.chan);
This does not look right to me. All of the channels in the controller are
identical and support arbitrary addresses, so there is no need to use a specific
physical channel. And unless Microchip has added something on top, the only way
to trigger a transfer is through the MMIO interface, so there is no request ID
to differentiate virtual channels either.
So it seems to me that #dma-cells should really be 0, and this function should
just call dma_get_any_slave_channel().
Regards,
Samuel
> + if (!c) {
> + dev_err(dev, "No more channels available\n");
> + return NULL;
> + }
> +
> + return c;
> +}
> +
> static int sf_pdma_probe(struct platform_device *pdev)
> {
> struct sf_pdma *pdma;
> @@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device *pdev)
> return ret;
> }
>
> + ret = of_dma_controller_register(pdev->dev.of_node,
> + sf_pdma_of_xlate, pdma);
> + if (ret < 0) {
> + dev_err(&pdev->dev,
> + "Can't register SiFive Platform OF_DMA. (%d)\n", ret);
> + goto err_unregister;
> + }
> +
> return 0;
> +
> +err_unregister:
> + dma_async_device_unregister(&pdma->dma_dev);
> +
> + return ret;
> }
>
> static int sf_pdma_remove(struct platform_device *pdev)
> @@ -583,6 +624,9 @@ static int sf_pdma_remove(struct platform_device *pdev)
> tasklet_kill(&ch->err_tasklet);
> }
>
> + if (pdev->dev.of_node)
> + of_dma_controller_free(pdev->dev.of_node);
> +
> dma_async_device_unregister(&pdma->dma_dev);
>
> return 0;
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 32+ messages in thread
* RE: [PATCH v2 1/4] dmaengine: sf-pdma: Support of_dma_controller_register()
2023-10-17 18:33 ` Samuel Holland
@ 2023-10-18 9:16 ` Shravan.Chippa
-1 siblings, 0 replies; 32+ messages in thread
From: Shravan.Chippa @ 2023-10-18 9:16 UTC (permalink / raw)
To: samuel.holland, green.wan, vkoul, robh+dt,
krzysztof.kozlowski+dt, palmer, paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
Nagasuresh.Relli, Praveen.Kumar
Hi,
> -----Original Message-----
> From: Samuel Holland <samuel.holland@sifive.com>
> Sent: Wednesday, October 18, 2023 12:03 AM
> To: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>;
> green.wan@sifive.com; vkoul@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; palmer@dabbelt.com;
> paul.walmsley@sifive.com; conor+dt@kernel.org
> Cc: dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli -
> I67208 <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>
> Subject: Re: [PATCH v2 1/4] dmaengine: sf-pdma: Support
> of_dma_controller_register()
>
> [You don't often get email from samuel.holland@sifive.com. Learn why this is
> important at https://aka.ms/LearnAboutSenderIdentification ]
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> Hi,
>
> On 2023-10-02 11:22 PM, shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > Update sf-pdma driver to adopt generic DMA device tree bindings.
> > It calls of_dma_controller_register() with sf-pdma specific
> > of_dma_xlate to get the generic DMA device tree helper support and the
> > DMA clients can look up the sf-pdma controller using standard APIs.
> >
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > ---
> > drivers/dma/sf-pdma/sf-pdma.c | 44
> > +++++++++++++++++++++++++++++++++++
> > 1 file changed, 44 insertions(+)
> >
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.c
> > b/drivers/dma/sf-pdma/sf-pdma.c index d1c6956af452..06a0912a12a1
> > 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.c
> > +++ b/drivers/dma/sf-pdma/sf-pdma.c
> > @@ -20,6 +20,7 @@
> > #include <linux/mod_devicetable.h>
> > #include <linux/dma-mapping.h>
> > #include <linux/of.h>
> > +#include <linux/of_dma.h>
> > #include <linux/slab.h>
> >
> > #include "sf-pdma.h"
> > @@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma
> *pdma)
> > }
> > }
> >
> > +static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args
> *dma_spec,
> > + struct of_dma *ofdma) {
> > + struct sf_pdma *pdma = ofdma->of_dma_data;
> > + struct device *dev = pdma->dma_dev.dev;
> > + struct sf_pdma_chan *chan;
> > + struct dma_chan *c;
> > + u32 channel_id;
> > +
> > + if (dma_spec->args_count != 1) {
> > + dev_err(dev, "Bad number of cells\n");
> > + return NULL;
> > + }
> > +
> > + channel_id = dma_spec->args[0];
> > +
> > + chan = &pdma->chans[channel_id];
> > +
> > + c = dma_get_slave_channel(&chan->vchan.chan);
>
> This does not look right to me. All of the channels in the controller are identical
> and support arbitrary addresses, so there is no need to use a specific physical
> channel. And unless Microchip has added something on top, the only way to
> trigger a transfer is through the MMIO interface, so there is no request ID to
> differentiate virtual channels either.
>
> So it seems to me that #dma-cells should really be 0, and this function should
> just call dma_get_any_slave_channel().
>
Thanks for your comment, yes all the channels are identical.
I have tested with dma_get_any_slave_channel()
it is not working.
dma_get_any_slave_channel() function searching for the DMA channel which has "DMA_SLAVE" capabilities.
But sf-pdma has only "DMA_MEMCPY" capabilities.
*****************************
struct dma_chan *dma_get_any_slave_channel(struct dma_device *device)
{
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
chan = find_candidate(device, &mask, NULL, NULL);
}
******************************
So "dma_request_chan()" function throws an error like "sf-pdma 3000000.dma-controller: No more channels available"
Thanks,
Shravan.
> Regards,
> Samuel
>
> > + if (!c) {
> > + dev_err(dev, "No more channels available\n");
> > + return NULL;
> > + }
> > +
> > + return c;
> > +}
> > +
> > static int sf_pdma_probe(struct platform_device *pdev) {
> > struct sf_pdma *pdma;
> > @@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device
> *pdev)
> > return ret;
> > }
> >
> > + ret = of_dma_controller_register(pdev->dev.of_node,
> > + sf_pdma_of_xlate, pdma);
> > + if (ret < 0) {
> > + dev_err(&pdev->dev,
> > + "Can't register SiFive Platform OF_DMA. (%d)\n", ret);
> > + goto err_unregister;
> > + }
> > +
> > return 0;
> > +
> > +err_unregister:
> > + dma_async_device_unregister(&pdma->dma_dev);
> > +
> > + return ret;
> > }
> >
> > static int sf_pdma_remove(struct platform_device *pdev) @@ -583,6
> > +624,9 @@ static int sf_pdma_remove(struct platform_device *pdev)
> > tasklet_kill(&ch->err_tasklet);
> > }
> >
> > + if (pdev->dev.of_node)
> > + of_dma_controller_free(pdev->dev.of_node);
> > +
> > dma_async_device_unregister(&pdma->dma_dev);
> >
> > return 0;
^ permalink raw reply [flat|nested] 32+ messages in thread
* RE: [PATCH v2 1/4] dmaengine: sf-pdma: Support of_dma_controller_register()
@ 2023-10-18 9:16 ` Shravan.Chippa
0 siblings, 0 replies; 32+ messages in thread
From: Shravan.Chippa @ 2023-10-18 9:16 UTC (permalink / raw)
To: samuel.holland, green.wan, vkoul, robh+dt,
krzysztof.kozlowski+dt, palmer, paul.walmsley, conor+dt
Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
Nagasuresh.Relli, Praveen.Kumar
Hi,
> -----Original Message-----
> From: Samuel Holland <samuel.holland@sifive.com>
> Sent: Wednesday, October 18, 2023 12:03 AM
> To: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>;
> green.wan@sifive.com; vkoul@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; palmer@dabbelt.com;
> paul.walmsley@sifive.com; conor+dt@kernel.org
> Cc: dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli -
> I67208 <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>
> Subject: Re: [PATCH v2 1/4] dmaengine: sf-pdma: Support
> of_dma_controller_register()
>
> [You don't often get email from samuel.holland@sifive.com. Learn why this is
> important at https://aka.ms/LearnAboutSenderIdentification ]
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> Hi,
>
> On 2023-10-02 11:22 PM, shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > Update sf-pdma driver to adopt generic DMA device tree bindings.
> > It calls of_dma_controller_register() with sf-pdma specific
> > of_dma_xlate to get the generic DMA device tree helper support and the
> > DMA clients can look up the sf-pdma controller using standard APIs.
> >
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > ---
> > drivers/dma/sf-pdma/sf-pdma.c | 44
> > +++++++++++++++++++++++++++++++++++
> > 1 file changed, 44 insertions(+)
> >
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.c
> > b/drivers/dma/sf-pdma/sf-pdma.c index d1c6956af452..06a0912a12a1
> > 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.c
> > +++ b/drivers/dma/sf-pdma/sf-pdma.c
> > @@ -20,6 +20,7 @@
> > #include <linux/mod_devicetable.h>
> > #include <linux/dma-mapping.h>
> > #include <linux/of.h>
> > +#include <linux/of_dma.h>
> > #include <linux/slab.h>
> >
> > #include "sf-pdma.h"
> > @@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma
> *pdma)
> > }
> > }
> >
> > +static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args
> *dma_spec,
> > + struct of_dma *ofdma) {
> > + struct sf_pdma *pdma = ofdma->of_dma_data;
> > + struct device *dev = pdma->dma_dev.dev;
> > + struct sf_pdma_chan *chan;
> > + struct dma_chan *c;
> > + u32 channel_id;
> > +
> > + if (dma_spec->args_count != 1) {
> > + dev_err(dev, "Bad number of cells\n");
> > + return NULL;
> > + }
> > +
> > + channel_id = dma_spec->args[0];
> > +
> > + chan = &pdma->chans[channel_id];
> > +
> > + c = dma_get_slave_channel(&chan->vchan.chan);
>
> This does not look right to me. All of the channels in the controller are identical
> and support arbitrary addresses, so there is no need to use a specific physical
> channel. And unless Microchip has added something on top, the only way to
> trigger a transfer is through the MMIO interface, so there is no request ID to
> differentiate virtual channels either.
>
> So it seems to me that #dma-cells should really be 0, and this function should
> just call dma_get_any_slave_channel().
>
Thanks for your comment, yes all the channels are identical.
I have tested with dma_get_any_slave_channel()
it is not working.
dma_get_any_slave_channel() function searching for the DMA channel which has "DMA_SLAVE" capabilities.
But sf-pdma has only "DMA_MEMCPY" capabilities.
*****************************
struct dma_chan *dma_get_any_slave_channel(struct dma_device *device)
{
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
chan = find_candidate(device, &mask, NULL, NULL);
}
******************************
So "dma_request_chan()" function throws an error like "sf-pdma 3000000.dma-controller: No more channels available"
Thanks,
Shravan.
> Regards,
> Samuel
>
> > + if (!c) {
> > + dev_err(dev, "No more channels available\n");
> > + return NULL;
> > + }
> > +
> > + return c;
> > +}
> > +
> > static int sf_pdma_probe(struct platform_device *pdev) {
> > struct sf_pdma *pdma;
> > @@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device
> *pdev)
> > return ret;
> > }
> >
> > + ret = of_dma_controller_register(pdev->dev.of_node,
> > + sf_pdma_of_xlate, pdma);
> > + if (ret < 0) {
> > + dev_err(&pdev->dev,
> > + "Can't register SiFive Platform OF_DMA. (%d)\n", ret);
> > + goto err_unregister;
> > + }
> > +
> > return 0;
> > +
> > +err_unregister:
> > + dma_async_device_unregister(&pdma->dma_dev);
> > +
> > + return ret;
> > }
> >
> > static int sf_pdma_remove(struct platform_device *pdev) @@ -583,6
> > +624,9 @@ static int sf_pdma_remove(struct platform_device *pdev)
> > tasklet_kill(&ch->err_tasklet);
> > }
> >
> > + if (pdev->dev.of_node)
> > + of_dma_controller_free(pdev->dev.of_node);
> > +
> > dma_async_device_unregister(&pdma->dma_dev);
> >
> > return 0;
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 32+ messages in thread
end of thread, other threads:[~2023-10-18 9:16 UTC | newest]
Thread overview: 32+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-10-03 4:22 [PATCH v2 0/4] dma: sf-pdma: various sf-pdma updates for the mpfs platform shravan chippa
2023-10-03 4:22 ` shravan chippa
2023-10-03 4:22 ` [PATCH v2 1/4] dmaengine: sf-pdma: Support of_dma_controller_register() shravan chippa
2023-10-03 4:22 ` shravan chippa
2023-10-03 7:36 ` Emil Renner Berthing
2023-10-03 7:36 ` Emil Renner Berthing
2023-10-17 18:33 ` Samuel Holland
2023-10-17 18:33 ` Samuel Holland
2023-10-18 9:16 ` Shravan.Chippa
2023-10-18 9:16 ` Shravan.Chippa
2023-10-03 4:22 ` [PATCH v2 2/4] dt-bindings: dma: sf-pdma: add new compatible name shravan chippa
2023-10-03 4:22 ` shravan chippa
2023-10-04 13:30 ` Rob Herring
2023-10-04 13:30 ` Rob Herring
2023-10-05 10:54 ` Conor Dooley
2023-10-05 10:54 ` Conor Dooley
2023-10-12 9:22 ` Shravan.Chippa
2023-10-12 9:22 ` Shravan.Chippa
2023-10-12 9:35 ` Conor Dooley
2023-10-12 9:35 ` Conor Dooley
2023-10-17 17:42 ` Samuel Holland
2023-10-17 17:42 ` Samuel Holland
2023-10-03 4:22 ` [PATCH v2 3/4] dmaengine: sf-pdma: add mpfs-pdma " shravan chippa
2023-10-03 4:22 ` shravan chippa
2023-10-03 7:35 ` Emil Renner Berthing
2023-10-03 7:35 ` Emil Renner Berthing
2023-10-04 3:47 ` Shravan.Chippa
2023-10-04 3:47 ` Shravan.Chippa
2023-10-04 13:22 ` Rob Herring
2023-10-04 13:22 ` Rob Herring
2023-10-03 4:22 ` [PATCH v2 4/4] riscv: dts: microchip: add specific compatible for mpfs' pdma shravan chippa
2023-10-03 4:22 ` shravan chippa
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