[PULL 0/1] target-arm queue

[PULL 0/1] target-arm queue

[Peter Maydell]

Just one fix for rc3. Technically this isn't a regression since
8.1, but it is a small change that avoids the user being able
to select an oddball combination of CPU features that currently
QEMU will assert on.

thanks
-- PMM

The following changes since commit 29b5d70cb70574b499517ec9e9f80dea496a3cc0:

  Merge tag 'pull-ppc-for-8.2-20231130' of https://gitlab.com/npiggin/qemu into staging (2023-12-01 07:29:52 -0500)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20231204-1

for you to fetch changes up to f7767ca301796334f74b9b642b395a4bd3e3dbac:

  target/arm: Disable SME if SVE is disabled (2023-12-04 13:34:16 +0000)

----------------------------------------------------------------
target-arm queue:
 * Turn off SME if SVE is turned off (this combination doesn't
   currently work and QEMU will assert if you try it)

----------------------------------------------------------------
Peter Maydell (1):
      target/arm: Disable SME if SVE is disabled

 target/arm/cpu.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

[PULL 1/1] target/arm: Disable SME if SVE is disabled

[Peter Maydell]

There is no architectural requirement that SME implies SVE, but
our implementation currently assumes it. (FEAT_SME_FA64 does
imply SVE.) So if you try to run a CPU with eg "-cpu max,sve=off"
you quickly run into an assert when the guest tries to write to
SMCR_EL1:

#6  0x00007ffff4b38e96 in __GI___assert_fail
    (assertion=0x5555566e69cb "sm", file=0x5555566e5b24 "../../target/arm/helper.c", line=6865, function=0x5555566e82f0 <__PRETTY_FUNCTION__.31> "sve_vqm1_for_el_sm") at ./assert/assert.c:101
#7  0x0000555555ee33aa in sve_vqm1_for_el_sm (env=0x555557d291f0, el=2, sm=false) at ../../target/arm/helper.c:6865
#8  0x0000555555ee3407 in sve_vqm1_for_el (env=0x555557d291f0, el=2) at ../../target/arm/helper.c:6871
#9  0x0000555555ee3724 in smcr_write (env=0x555557d291f0, ri=0x555557da23b0, value=2147483663) at ../../target/arm/helper.c:6995
#10 0x0000555555fd1dba in helper_set_cp_reg64 (env=0x555557d291f0, rip=0x555557da23b0, value=2147483663) at ../../target/arm/tcg/op_helper.c:839
#11 0x00007fff60056781 in code_gen_buffer ()

Avoid this unsupported and slightly odd combination by
disabling SME when SVE is not present.

Cc: qemu-stable@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2005
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20231127173318.674758-1-peter.maydell@linaro.org
---
 target/arm/cpu.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 25e9d2ae7b8..efb22a87f9e 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1743,6 +1743,16 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp)
             return;
         }
 
+        /*
+         * FEAT_SME is not architecturally dependent on FEAT_SVE (unless
+         * FEAT_SME_FA64 is present). However our implementation currently
+         * assumes it, so if the user asked for sve=off then turn off SME also.
+         * (KVM doesn't currently support SME at all.)
+         */
+        if (cpu_isar_feature(aa64_sme, cpu) && !cpu_isar_feature(aa64_sve, cpu)) {
+            object_property_set_bool(OBJECT(cpu), "sme", false, &error_abort);
+        }
+
         arm_cpu_sme_finalize(cpu, &local_err);
         if (local_err != NULL) {
             error_propagate(errp, local_err);
-- 
2.34.1

Re: [PULL 0/1] target-arm queue

[Stefan Hajnoczi]

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Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any user-visible changes.

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[PULL 0/1] target-arm queue

[Peter Maydell]

The following changes since commit e3debd5e7d0ce031356024878a0a18b9d109354a:

  Merge tag 'pull-request-2023-03-24' of https://gitlab.com/thuth/qemu into staging (2023-03-24 16:08:46 +0000)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230328

for you to fetch changes up to 46e3b237c52e0c48bfd81bce020b51fbe300b23a:

  target/arm/gdbstub: Only advertise M-profile features if TCG available (2023-03-28 10:53:40 +0100)

----------------------------------------------------------------
target-arm queue:
 * fix part of the "TCG-disabled builds are broken" issue

----------------------------------------------------------------
Philippe Mathieu-Daudé (1):
      target/arm/gdbstub: Only advertise M-profile features if TCG available

 target/arm/gdbstub.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Re: [PULL 0/1] target-arm queue

[Peter Maydell]

On Tue, 28 Mar 2023 at 13:26, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> The following changes since commit e3debd5e7d0ce031356024878a0a18b9d109354a:
>
>   Merge tag 'pull-request-2023-03-24' of https://gitlab.com/thuth/qemu into staging (2023-03-24 16:08:46 +0000)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230328
>
> for you to fetch changes up to 46e3b237c52e0c48bfd81bce020b51fbe300b23a:
>
>   target/arm/gdbstub: Only advertise M-profile features if TCG available (2023-03-28 10:53:40 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * fix part of the "TCG-disabled builds are broken" issue
>
> ----------------------------------------------------------------


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/8.0
for any user-visible changes.

-- PMM

[PULL 0/1] target-arm queue

[Peter Maydell]

Just one bugfix patch for this rc:

The following changes since commit ca5f3d4df1b47d7f66a109cdb504e83dfd7ec433:

  Merge tag 'pull-la-20220808' of https://gitlab.com/rth7680/qemu into staging (2022-08-08 19:51:12 -0700)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220809

for you to fetch changes up to c7f26ded6d5065e4116f630f6a490b55f6c5f58e:

  icount: Take iothread lock when running QEMU timers (2022-08-09 10:55:14 +0100)

----------------------------------------------------------------
target-arm queue:
 * icount: Take iothread lock when running QEMU timers

----------------------------------------------------------------
Peter Maydell (1):
      icount: Take iothread lock when running QEMU timers

 accel/tcg/tcg-accel-ops-icount.c | 6 ++++++
 1 file changed, 6 insertions(+)

Re: [PULL 0/1] target-arm queue

[Richard Henderson]

On 8/9/22 05:13, Peter Maydell wrote:
> Just one bugfix patch for this rc:
> 
> The following changes since commit ca5f3d4df1b47d7f66a109cdb504e83dfd7ec433:
> 
>    Merge tag 'pull-la-20220808' of https://gitlab.com/rth7680/qemu into staging (2022-08-08 19:51:12 -0700)
> 
> are available in the Git repository at:
> 
>    https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220809
> 
> for you to fetch changes up to c7f26ded6d5065e4116f630f6a490b55f6c5f58e:
> 
>    icount: Take iothread lock when running QEMU timers (2022-08-09 10:55:14 +0100)
> 
> ----------------------------------------------------------------
> target-arm queue:
>   * icount: Take iothread lock when running QEMU timers

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/7.1 as appropriate.


r~


> 
> ----------------------------------------------------------------
> Peter Maydell (1):
>        icount: Take iothread lock when running QEMU timers
> 
>   accel/tcg/tcg-accel-ops-icount.c | 6 ++++++
>   1 file changed, 6 insertions(+)
> 

[PULL 0/1] target-arm queue

[Peter Maydell]

Apologies for sending two pullreqs today; Eric's patch came in a
few hours after I sent the first one but it's definitely a
release-critical fix.

-- PMM

The following changes since commit 89d2f9e4c63799f7f03e9180c63b7dc45fc2a04a:

  Merge tag 'pull-target-arm-20211122' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2021-11-22 16:35:54 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20211122-1

for you to fetch changes up to 33a0c404fb90a3fa8eea6ebf5c535fc7bc0b9912:

  hw/intc/arm_gicv3_its: Revert version increments in vmstate_its (2021-11-22 18:17:19 +0000)

----------------------------------------------------------------
target-arm queue:
 * drop spurious bump of ITS vmstate version fields

----------------------------------------------------------------
Eric Auger (1):
      hw/intc/arm_gicv3_its: Revert version increments in vmstate_its

 hw/intc/arm_gicv3_its_common.c | 2 --
 1 file changed, 2 deletions(-)

Re: [PULL 0/1] target-arm queue

[Richard Henderson]

On 11/22/21 7:44 PM, Peter Maydell wrote:
> Apologies for sending two pullreqs today; Eric's patch came in a
> few hours after I sent the first one but it's definitely a
> release-critical fix.
> 
> -- PMM
> 
> The following changes since commit 89d2f9e4c63799f7f03e9180c63b7dc45fc2a04a:
> 
>    Merge tag 'pull-target-arm-20211122' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2021-11-22 16:35:54 +0100)
> 
> are available in the Git repository at:
> 
>    https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20211122-1
> 
> for you to fetch changes up to 33a0c404fb90a3fa8eea6ebf5c535fc7bc0b9912:
> 
>    hw/intc/arm_gicv3_its: Revert version increments in vmstate_its (2021-11-22 18:17:19 +0000)
> 
> ----------------------------------------------------------------
> target-arm queue:
>   * drop spurious bump of ITS vmstate version fields
> 
> ----------------------------------------------------------------
> Eric Auger (1):
>        hw/intc/arm_gicv3_its: Revert version increments in vmstate_its
> 
>   hw/intc/arm_gicv3_its_common.c | 2 --
>   1 file changed, 2 deletions(-)

Applied, thanks.

r~

[PULL 0/1] target-arm queue

[Peter Maydell]

Just one patch for rc2, a revert.

-- PMM

The following changes since commit 49aaac3548bc5a4632a14de939d5312b28dc1ba2:

  Merge tag 'linux-user-for-6.2-pull-request' of git://github.com/vivier/qemu into staging (2021-11-22 10:33:13 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20211122

for you to fetch changes up to 4825eaae4fdd56fba0febdfbdd7bf9684ae3ee0d:

  Revert "arm: tcg: Adhere to SMCCC 1.3 section 5.2" (2021-11-22 13:41:48 +0000)

----------------------------------------------------------------
target-arm queue:
 * revert SMCCC/PSCI change, as it regresses some usecases for some boards

----------------------------------------------------------------
Peter Maydell (1):
      Revert "arm: tcg: Adhere to SMCCC 1.3 section 5.2"

 target/arm/psci.c | 35 +++++++++++++++++++++++++++++------
 1 file changed, 29 insertions(+), 6 deletions(-)

Re: [PULL 0/1] target-arm queue

[Peter Maydell]

On Mon, 22 Nov 2021 at 13:43, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> Just one patch for rc2, a revert.
>
> -- PMM
>
> The following changes since commit 49aaac3548bc5a4632a14de939d5312b28dc1ba2:
>
>   Merge tag 'linux-user-for-6.2-pull-request' of git://github.com/vivier/qemu into staging (2021-11-22 10:33:13 +0100)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20211122
>
> for you to fetch changes up to 4825eaae4fdd56fba0febdfbdd7bf9684ae3ee0d:
>
>   Revert "arm: tcg: Adhere to SMCCC 1.3 section 5.2" (2021-11-22 13:41:48 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * revert SMCCC/PSCI change, as it regresses some usecases for some boards

Since this hasn't been applied yet I'll reroll it to add Eric's
"don't bump the ITS version fields" patch. (But if you get here
first that's fine too.)

-- PMM

Re: [PULL 0/1] target-arm queue

[Richard Henderson]

On 11/22/21 7:06 PM, Peter Maydell wrote:
> On Mon, 22 Nov 2021 at 13:43, Peter Maydell <peter.maydell@linaro.org> wrote:
>>
>> Just one patch for rc2, a revert.
>>
>> -- PMM
>>
>> The following changes since commit 49aaac3548bc5a4632a14de939d5312b28dc1ba2:
>>
>>    Merge tag 'linux-user-for-6.2-pull-request' of git://github.com/vivier/qemu into staging (2021-11-22 10:33:13 +0100)
>>
>> are available in the Git repository at:
>>
>>    https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20211122
>>
>> for you to fetch changes up to 4825eaae4fdd56fba0febdfbdd7bf9684ae3ee0d:
>>
>>    Revert "arm: tcg: Adhere to SMCCC 1.3 section 5.2" (2021-11-22 13:41:48 +0000)
>>
>> ----------------------------------------------------------------
>> target-arm queue:
>>   * revert SMCCC/PSCI change, as it regresses some usecases for some boards
> 
> Since this hasn't been applied yet I'll reroll it to add Eric's
> "don't bump the ITS version fields" patch. (But if you get here
> first that's fine too.)

Gitlab has been dreadfully slow this evening, but it's applied now.


r~