Re: [PATCH v6 5/6] arm64: dts: qcom: sm8450: Add opp table support to PCIe

From: Manivannan Sadhasivam <mani@kernel.org>
To: Viresh Kumar <viresh.kumar@linaro.org>
Cc: "Manivannan Sadhasivam" <mani@kernel.org>,
	"Krishna chaitanya chundru" <quic_krichai@quicinc.com>,
	"Bjorn Andersson" <andersson@kernel.org>,
	"Konrad Dybcio" <konrad.dybcio@linaro.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Johan Hovold" <johan+linaro@kernel.org>,
	"Brian Masney" <bmasney@redhat.com>,
	"Georgi Djakov" <djakov@kernel.org>,
	linux-arm-msm@vger.kernel.org, vireshk@kernel.org,
	quic_vbadigan@quicinc.com, quic_skananth@quicinc.com,
	quic_nitegupt@quicinc.com, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 5/6] arm64: dts: qcom: sm8450: Add opp table support to PCIe
Date: Tue, 30 Jan 2024 12:44:49 +0530	[thread overview]
Message-ID: <20240130071449.GG32821@thinkpad> (raw)
In-Reply-To: <20240130061111.eeo2fzaltpbh35sj@vireshk-i7>

On Tue, Jan 30, 2024 at 11:41:11AM +0530, Viresh Kumar wrote:
> On 29-01-24, 21:34, Manivannan Sadhasivam wrote:
> > On Fri, Jan 12, 2024 at 07:52:04PM +0530, Krishna chaitanya chundru wrote:
> > > PCIe needs to choose the appropriate performance state of RPMH power
> > > domain and interconnect bandwidth based up on the PCIe gen speed.
> > > 
> > > Add the OPP table support to specify RPMH performance states and
> > > interconnect peak bandwidth.
> > > 
> > > Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> > > ---
> > >  arch/arm64/boot/dts/qcom/sm8450.dtsi | 74 ++++++++++++++++++++++++++++++++++++
> > >  1 file changed, 74 insertions(+)
> > > 
> > > diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> > > index 6b1d2e0d9d14..eab85ecaeff0 100644
> > > --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> > > @@ -1827,7 +1827,32 @@ pcie0: pcie@1c00000 {
> > >  			pinctrl-names = "default";
> > >  			pinctrl-0 = <&pcie0_default_state>;
> > >  
> > > +			operating-points-v2 = <&pcie0_opp_table>;
> > > +
> > >  			status = "disabled";
> > > +
> > > +			pcie0_opp_table: opp-table {
> > > +				compatible = "operating-points-v2";
> > > +
> > > +				opp-2500000 {
> > > +					opp-hz = /bits/ 64 <2500000>;
> > > +					required-opps = <&rpmhpd_opp_low_svs>;
> > > +					opp-peak-kBps = <250000 250000>;
> > 
> > This is a question for Viresh: We already have macros in the driver to derive
> > the bandwidth based on link speed. So if OPP core exposes a callback to allow
> > the consumers to set the bw on its own, we can get rid of this entry.
> > 
> > Similar to config_clks()/config_regulators(). Is that feasible?
> 
> I don't have any issues with a new callback for bw. But, AFAIU, the DT
> is required to represent the hardware irrespective of what any OS
> would do with it. So DT should ideally have these values here, right ?
> 

Not necessarily. Because, right now the bandwidth values of the all peripherals
are encoded within the drivers. Only OPP has the requirement to define the
values in DT.

> Also, the driver has already moved away from using those macros now
> and depend on the OPP core to do the right thing. It only uses the
> macro for the cases where the DT OPP table isn't available. And as
> said by few others as well already, the driver really should try to
> add OPPs dynamically in that case to avoid multiple code paths and
> stick to a single OPP based solution.
> 

Still I prefer to use OPP for bandwidth control because both the voltage and
bandwidth values need to be updated at the same time. My only point here is, if
OPP exposes a callback for bw, then we can keep the DT behavior consistent.

- Mani

> -- 
> viresh

-- 
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