Re: [PATCH] drm: bridge: synopsys/dw-hdmi: Provide default configuration function for HDMI 2.0 PHY

From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Jose Abreu <Jose.Abreu@synopsys.com>
Cc: Mark Yao <mark.yao@rock-chips.com>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>,
	Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>,
	Archit Taneja <architt@codeaurora.org>,
	Andrzej Hajda <a.hajda@samsung.com>,
	Carlos Palminha <CARLOS.PALMINHA@synopsys.com>
Subject: Re: [PATCH] drm: bridge: synopsys/dw-hdmi: Provide default configuration function for HDMI 2.0 PHY
Date: Thu, 22 Jun 2017 17:28:21 +0300	[thread overview]
Message-ID: <2032791.zG0HDMl4PB@avalon> (raw)
In-Reply-To: <1941ce39-1a8e-5e16-bdc2-71d988ee00d6@synopsys.com>

Hi Jose,

On Tuesday 13 Jun 2017 15:11:27 Jose Abreu wrote:
> Hi Laurent,
> 
> Sorry for the late reply!

No worries.

> On 10-06-2017 09:50, Laurent Pinchart wrote:
> > On Friday 09 Jun 2017 13:53:12 Jose Abreu wrote:
> >> On 09-06-2017 12:04, Jose Abreu wrote:
> >>> Currently HDMI 2.0 PHYs do not have a default configuration function.
> >>> 
> >>> As these PHYs have the same register layout as the 3D PHYs we can
> >>> safely use the default configuration function.
> >> 
> >> I may have been a little to fast arriving at this conclusion. I
> >> mean most of the registers match but in the configuration
> >> function there are registers that do not match. Did you actually
> >> test this configuration function with an HDMI 2.0 phy? And did
> >> you test with different video modes? From my experience the phy
> >> may be wrongly configured and sometimes work anyway.
> >> 
> >> Do please retest with as many video modes as you can and give me
> >> your phy ID (read from controller config reg HDMI_CONFIG2_ID).
> > 
> > The Renesas R-Car Gen3 HDMI PHY reports an DWC HDMI 2.0 TX PHY ID, but has
> > a configuration function (rcar_hdmi_phy_configure() in
> > drivers/gpu/drm/rcar- du/rcar_dw_hdmi.c) that doesn't match
> > hdmi_phy_configure_dwc_hdmi_3d_tx(). From the information I have been
> > given the layout of the configuration registers haven't been changed by
> > Renesas. I know we've briefly discussed this in the past, but I'd
> > appreciate if you could have a second look and tell me what you think.
> 
> Yup, yours seems correct. Though at the time you submitted I
> found it odd that only 3 registers needed to be written whilst
> for HDMI 2.0 phys I have here 6 registers, but you said it is
> working so I though your phy was different ...
> 
> Even so, one thing I would like to know is what was the max
> resolution you tested? I see you have clock values up to 297MHz,
> so 4k@30Hz?

The highest resolution I've personally tested is 1440x900. I'd need to buy 
another monitor to go higher than that, but maybe this is the excuse I've been 
waiting for :-)

> If I send a patch with a general config function for HDMI 2.0 phys can you
> test it on your platform?

Sure, I'd be glad to.

-- 
Regards,

Laurent Pinchart