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* [PATCH 1/2 v2] eSDHC: Access Freescale eSDHC registers by 32-bit
@ 2011-07-22 10:15 ` Roy Zang
  0 siblings, 0 replies; 20+ messages in thread
From: Roy Zang @ 2011-07-22 10:15 UTC (permalink / raw)
  To: linux-mmc; +Cc: linuxppc-dev, cbouatmailru, akpm, Xu lei, Roy Zang, Kumar Gala

From: Xu lei <B33228@freescale.com>

For Freescale eSDHC registers only support 32-bit accesses,
this patch ensure that all Freescale eSDHC register accesses
are 32-bit.

Signed-off-by: Xu lei <B33228@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
this patch set replaces previous patches:
https://patchwork.kernel.org/patch/943332/
https://patchwork.kernel.org/patch/943342/
https://patchwork.kernel.org/patch/943322/

The last one is discarded according to the comment from Anton.


just resend with the new patch set. no change for this patch comparing
to previous version.

 drivers/mmc/host/sdhci-of-esdhc.c |   18 ++++++++++++++----
 1 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index ba40d6d..c9a8519 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -1,7 +1,7 @@
 /*
  * Freescale eSDHC controller driver.
  *
- * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2007, 2010 Freescale Semiconductor, Inc.
  * Copyright (c) 2009 MontaVista Software, Inc.
  *
  * Authors: Xiaobo Xie <X.Xie@freescale.com>
@@ -23,11 +23,21 @@
 static u16 esdhc_readw(struct sdhci_host *host, int reg)
 {
 	u16 ret;
+	int base = reg & ~0x3;
+	int shift = (reg & 0x2) * 8;
 
 	if (unlikely(reg == SDHCI_HOST_VERSION))
-		ret = in_be16(host->ioaddr + reg);
+		ret = in_be32(host->ioaddr + base) & 0xffff;
 	else
-		ret = sdhci_be32bs_readw(host, reg);
+		ret = (in_be32(host->ioaddr + base) >> shift) & 0xffff;
+	return ret;
+}
+
+static u8 esdhc_readb(struct sdhci_host *host, int reg)
+{
+	int base = reg & ~0x3;
+	int shift = (reg & 0x3) * 8;
+	u8 ret = (in_be32(host->ioaddr + base) >> shift) & 0xff;
 	return ret;
 }
 
@@ -79,7 +89,7 @@ struct sdhci_of_data sdhci_esdhc = {
 	.ops = {
 		.read_l = sdhci_be32bs_readl,
 		.read_w = esdhc_readw,
-		.read_b = sdhci_be32bs_readb,
+		.read_b = esdhc_readb,
 		.write_l = sdhci_be32bs_writel,
 		.write_w = esdhc_writew,
 		.write_b = esdhc_writeb,
-- 
1.6.0.6



^ permalink raw reply related	[flat|nested] 20+ messages in thread

end of thread, other threads:[~2011-09-09  9:07 UTC | newest]

Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-07-22 10:15 [PATCH 1/2 v2] eSDHC: Access Freescale eSDHC registers by 32-bit Roy Zang
2011-07-22 10:15 ` Roy Zang
2011-07-22 10:15 ` [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc Roy Zang
2011-07-22 10:15   ` Roy Zang
2011-07-22 10:15   ` Anton Vorontsov
2011-07-22 10:15     ` Anton Vorontsov
2011-07-26 10:29     ` Zang Roy-R61911
2011-07-26 10:29       ` Zang Roy-R61911
2011-08-12  9:44     ` Zang Roy-R61911
2011-08-12  9:44       ` Zang Roy-R61911
2011-08-12 10:04       ` Anton Vorontsov
2011-08-12 10:04         ` Anton Vorontsov
2011-08-15  4:46         ` Zang Roy-R61911
2011-08-15  4:46           ` Zang Roy-R61911
2011-08-26  8:44         ` Zang Roy-R61911
2011-08-26  8:44           ` Zang Roy-R61911
2011-09-09  9:03         ` Zang Roy-R61911
2011-09-09  9:03           ` Zang Roy-R61911
2011-09-09  9:07           ` Wolfram Sang
2011-09-09  9:07             ` Wolfram Sang

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