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From: Arnd Bergmann <arnd@arndb.de>
To: linux-arm-kernel@lists.infradead.org
Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com>,
	guohanjun@huawei.com, wangzhou1@hisilicon.com,
	liudongdong3@huawei.com, linuxarm@huawei.com,
	qiujiang@huawei.com, bhelgaas@google.com,
	Lorenzo.Pieralisi@arm.com, tn@semihalf.com,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	xuwei5@hisilicon.com, linux-acpi@vger.kernel.org, jcm@redhat.com,
	zhangjukuo@huawei.com, liguozhu@hisilicon.com
Subject: Re: [RFC PATCH v2 1/3] PCI: hisi: re-architect Hip05/Hip06 controllers driver to preapare for ACPI
Date: Mon, 08 Feb 2016 14:50:15 +0100	[thread overview]
Message-ID: <2409806.1aGBrN4l0X@wuerfel> (raw)
In-Reply-To: <1454935264-6076-2-git-send-email-gabriele.paoloni@huawei.com>

On Monday 08 February 2016 12:41:02 Gabriele Paoloni wrote:
> +
> +/* HipXX PCIe host only supports 32-bit config access */
> +int hisi_pcie_common_cfg_read(void __iomem *reg_base, int where, int size,
> +			      u32 *val)
> +{
> +	u32 reg;
> +	u32 reg_val;
> +	void *walker = &reg_val;
> +
> +	walker += (where & 0x3);
> +	reg = where & ~0x3;
> +	reg_val = readl(reg_base + reg);
> +
> +	if (size == 1)
> +		*val = *(u8 __force *) walker;
> +	else if (size == 2)
> +		*val = *(u16 __force *) walker;
> +	else if (size == 4)
> +		*val = reg_val;
> +	else
> +		return PCIBIOS_BAD_REGISTER_NUMBER;
> +
> +	return PCIBIOS_SUCCESSFUL;
> +}

Isn't this the same hack that Qualcomm are using?

	Arnd

WARNING: multiple messages have this Message-ID (diff)
From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH v2 1/3] PCI: hisi: re-architect Hip05/Hip06 controllers driver to preapare for ACPI
Date: Mon, 08 Feb 2016 14:50:15 +0100	[thread overview]
Message-ID: <2409806.1aGBrN4l0X@wuerfel> (raw)
In-Reply-To: <1454935264-6076-2-git-send-email-gabriele.paoloni@huawei.com>

On Monday 08 February 2016 12:41:02 Gabriele Paoloni wrote:
> +
> +/* HipXX PCIe host only supports 32-bit config access */
> +int hisi_pcie_common_cfg_read(void __iomem *reg_base, int where, int size,
> +			      u32 *val)
> +{
> +	u32 reg;
> +	u32 reg_val;
> +	void *walker = &reg_val;
> +
> +	walker += (where & 0x3);
> +	reg = where & ~0x3;
> +	reg_val = readl(reg_base + reg);
> +
> +	if (size == 1)
> +		*val = *(u8 __force *) walker;
> +	else if (size == 2)
> +		*val = *(u16 __force *) walker;
> +	else if (size == 4)
> +		*val = reg_val;
> +	else
> +		return PCIBIOS_BAD_REGISTER_NUMBER;
> +
> +	return PCIBIOS_SUCCESSFUL;
> +}

Isn't this the same hack that Qualcomm are using?

	Arnd

  reply	other threads:[~2016-02-08 13:51 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-08 12:41 [RFC PATCH v2 0/3] Add ACPI support for HiSilicon PCIe Host Controllers Gabriele Paoloni
2016-02-08 12:41 ` Gabriele Paoloni
2016-02-08 12:41 ` Gabriele Paoloni
2016-02-08 12:41 ` [RFC PATCH v2 1/3] PCI: hisi: re-architect Hip05/Hip06 controllers driver to preapare for ACPI Gabriele Paoloni
2016-02-08 12:41   ` Gabriele Paoloni
2016-02-08 12:41   ` Gabriele Paoloni
2016-02-08 13:50   ` Arnd Bergmann [this message]
2016-02-08 13:50     ` Arnd Bergmann
2016-02-08 16:06     ` Gabriele Paoloni
2016-02-08 16:06       ` Gabriele Paoloni
2016-02-08 16:06       ` Gabriele Paoloni
2016-02-08 16:32       ` Arnd Bergmann
2016-02-08 16:32         ` Arnd Bergmann
2016-02-08 16:32         ` Arnd Bergmann
2016-02-08 16:51         ` Gabriele Paoloni
2016-02-08 16:51           ` Gabriele Paoloni
2016-02-08 16:51           ` Gabriele Paoloni
2016-02-09 16:27           ` Arnd Bergmann
2016-02-09 16:27             ` Arnd Bergmann
2016-02-09 16:27             ` Arnd Bergmann
2016-02-09 16:52             ` Gabriele Paoloni
2016-02-09 16:52               ` Gabriele Paoloni
2016-02-09 16:52               ` Gabriele Paoloni
2016-02-08 12:41 ` [RFC PATCH v2 2/3] PCI: hisi: Make the HiSilicon PCIe host controller ECAM compliant Gabriele Paoloni
2016-02-08 12:41   ` Gabriele Paoloni
2016-02-08 12:41   ` Gabriele Paoloni
2016-02-08 13:48   ` Arnd Bergmann
2016-02-08 13:48     ` Arnd Bergmann
2016-02-08 15:55     ` Gabriele Paoloni
2016-02-08 15:55       ` Gabriele Paoloni
2016-02-08 15:55       ` Gabriele Paoloni
2016-02-08 16:29       ` Arnd Bergmann
2016-02-08 16:29         ` Arnd Bergmann
2016-02-08 16:29         ` Arnd Bergmann
2016-02-08 16:29         ` Arnd Bergmann
2016-02-08 17:21         ` Gabriele Paoloni
2016-02-08 17:21           ` Gabriele Paoloni
2016-02-08 17:21           ` Gabriele Paoloni
2016-02-09 15:32           ` Arnd Bergmann
2016-02-09 15:32             ` Arnd Bergmann
2016-02-09 15:56             ` Gabriele Paoloni
2016-02-09 15:56               ` Gabriele Paoloni
2016-02-09 15:56               ` Gabriele Paoloni
2016-02-08 12:41 ` [RFC PATCH v2 3/3] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers Gabriele Paoloni
2016-02-08 12:41   ` Gabriele Paoloni
2016-02-08 12:41   ` Gabriele Paoloni
2016-08-31 11:48 [RFC PATCH V2 0/3] Add ACPI support for Hisilicon PCIe Host Controller Dongdong Liu
2016-08-31 11:48 ` [RFC PATCH V2 1/3] PCI: hisi: re-architect Hip05/Hip06 controllers driver to preapare for ACPI Dongdong Liu
2016-08-31 11:48   ` Dongdong Liu
2016-08-31 11:45   ` Arnd Bergmann
2016-09-01  2:05     ` Dongdong Liu
2016-09-01  2:05       ` Dongdong Liu
2016-09-01  7:41       ` Arnd Bergmann
2016-09-01  7:41         ` Arnd Bergmann
2016-09-01 12:44         ` Dongdong Liu
2016-09-01 12:44           ` Dongdong Liu
2016-09-01 14:02           ` Arnd Bergmann
2016-09-01 14:02             ` Arnd Bergmann
2016-09-02  2:02             ` Dongdong Liu
2016-09-02  2:02               ` Dongdong Liu
2016-09-20  9:45             ` Gabriele Paoloni
2016-09-20  9:45               ` Gabriele Paoloni
2016-09-20  9:45               ` Gabriele Paoloni
2016-09-20 13:22               ` Arnd Bergmann

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