* [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.15
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM64 based SoC DT updates for v4.15.
The following changes since commit 2bd6bf03f4c1c59381d62c61d03f6cc3fe71f66e:
Linux 4.14-rc1 (2017-09-16 15:47:51 -0700)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt-for-v4.15
for you to fetch changes up to 2affee619d48d101831e83e74cadeb7c5200d9cb:
arm64: dts: renesas: r8a7796: add USB3.0 peripheral device node (2017-09-25 09:09:51 +0200)
----------------------------------------------------------------
Renesas ARM64 Based SoC DT Updates for v4.15
* r8a7795 (H3)
- Use r8a7795-cpg-mssr and r8a7795-sysc bindings
Hardcoded indicies are replaced with symbols now that they are available
- Drop bogus HDMI node name suffixes
Laurent Pinchart says: Node names should not use numerical suffixes if
the nodes can be distinguished by unit-address
- Update PFC node name to pin-controller
Shimoda-san says the PFC node name is changed "from e6060000.pfc and
pfc at e6060000 to e6060000.pin-controller and pin-controller at e6060000
like other Renesas SoCs."
* r8a7795 (H3) ES1.0
- Drop extra zero from XHCI unit address
This corrects a typo were ee0400000 rather than ee040000 was used
as the unit address.
* r8a7796 (M3-W)
- Add FDP1 instance
Laurent Pinchart says: The r8a7796 has a single FDP1 instance.
* r8a7795 (H3) and r8a7796 (M3-W) SoCs
- Add USB3.0 peripheral device nodes
Shimoda-san says that this is not enabled on the Salvator-X/XS boards
for now as:
+ we need a special cable (USB type-A to A cross cable).
+ we can swap the role by renesas_usb3 driver even if we use a normal
cable and after usb3.0 host is running, but I think it's a special
use case.
* r8a7795 (H3) and r8a7796 (M3-W) ULCB boards
- Enable display output
Laurent Pinchart says: The DU is already wired up to the HDMI encoder,
all we need to do is enable it.
* r8a77995 (D3) Draak board
- Enable EthernetAVB and , USB2.0 Host and PHY
- Add serial console pins.
This is safe to do now that r8a77995 PFC driver support is present
* r8a77970 (V3M)
- Add basic support for SoC and EtherAVB, [H]SCIF and SYS-DMAC nodes
This is a step towards enabling EtherAVB and [H]SCIF with SYS-DMAC
in the Eagle board support for which is under review
----------------------------------------------------------------
Geert Uytterhoeven (6):
arm64: dts: renesas: r8a7795-es1: Drop extra zero from usb unit address
arm64: dts: renesas: r8a7795: Drop bogus HDMI node names suffixes
arm64: renesas: Add Renesas R8A77970 Kconfig support
arm64: dts: renesas: r8a77995: Use r8a7795-sysc binding definitions
arm64: dts: renesas: r8a77995: Use r8a7795-cpg-mssr binding definitions
arm64: dts: draak: Add serial console pins
Laurent Pinchart (2):
arm64: dts: renesas: r8a7796: Add FDP1 instance
arm64: dts: renesas: ulcb: Enable display output
Sergei Shtylyov (4):
arm64: dts: renesas: initial R8A77970 SoC device tree
arm64: dts: renesas: r8a77970: add SYS-DMAC support
arm64: dts: renesas: r8a77970: add [H]SCIF support
arm64: dts: renesas: r8a77970: add EtherAVB support
Yoshihiro Shimoda (10):
arm64: dts: renesas: r8a77995: update PFC node name to pin-controller
arm64: dts: renesas: r8a77995: add GPIO device nodes
arm64: dts: renesas: r8a77995: Add EthernetAVB device node
arm64: dts: renesas: r8a77995: Add USB2.0 PHY device node
arm64: dts: renesas: r8a77995: add USB2.0 Host (EHCI/OHCI) device node
arm64: dts: renesas: r8a77995: draak: enable USB2.0 PHY
arm64: dts: renesas: r8a77995: draak: enable USB2.0 Host (EHCI/OHCI)
arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
arm64: dts: renesas: r8a7795: add USB3.0 peripheral device node
arm64: dts: renesas: r8a7796: add USB3.0 peripheral device node
arch/arm64/Kconfig.platforms | 6 +
arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 2 +-
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 15 +-
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 21 ++
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 366 +++++++++++++++++++++++++
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 55 ++++
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 211 +++++++++++++-
arch/arm64/boot/dts/renesas/ulcb.dtsi | 4 +
8 files changed, 669 insertions(+), 11 deletions(-)
create mode 100644 arch/arm64/boot/dts/renesas/r8a77970.dtsi
^ permalink raw reply [flat|nested] 66+ messages in thread* [PATCH 01/22] arm64: dts: renesas: r8a7795-es1: Drop extra zero from usb unit address
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
With W=1:
arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dtb: Warning (simple_bus_reg): Node /soc/usb@ee0400000 simple-bus unit address format error, expected "ee040000"
arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dtb: Warning (simple_bus_reg): Node /soc/usb@ee0400000 simple-bus unit address format error, expected "ee040000"
Fixes: 291e0c4994d0813f ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0")
Fixes: 171f2ef82284f61b ("arm64: dts: r8a7795: Add USB3.0 host device nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
index aaa5e67a963e..655dd30639c5 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
@@ -11,7 +11,7 @@
#include "r8a7795.dtsi"
&soc {
- xhci1: usb@ee0400000 {
+ xhci1: usb@ee040000 {
compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
reg = <0 0xee040000 0 0xc00>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 01/22] arm64: dts: renesas: r8a7795-es1: Drop extra zero from usb unit address
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
With W=1:
arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dtb: Warning (simple_bus_reg): Node /soc/usb at ee0400000 simple-bus unit address format error, expected "ee040000"
arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dtb: Warning (simple_bus_reg): Node /soc/usb at ee0400000 simple-bus unit address format error, expected "ee040000"
Fixes: 291e0c4994d0813f ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0")
Fixes: 171f2ef82284f61b ("arm64: dts: r8a7795: Add USB3.0 host device nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
index aaa5e67a963e..655dd30639c5 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
@@ -11,7 +11,7 @@
#include "r8a7795.dtsi"
&soc {
- xhci1: usb at ee0400000 {
+ xhci1: usb at ee040000 {
compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
reg = <0 0xee040000 0 0xc00>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 02/22] arm64: dts: renesas: r8a7796: Add FDP1 instance
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Laurent Pinchart, Simon Horman
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
The r8a7796 has a single FDP1 instance.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 369092e17e34..16da83458f18 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -1659,6 +1659,16 @@
/* placeholder */
};
+ fdp1@fe940000 {
+ compatible = "renesas,fdp1";
+ reg = <0 0xfe940000 0 0x2400>;
+ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 119>;
+ power-domains = <&sysc R8A7796_PD_A3VC>;
+ resets = <&cpg 119>;
+ renesas,fcp = <&fcpf0>;
+ };
+
fcpf0: fcp@fe950000 {
compatible = "renesas,fcpf";
reg = <0 0xfe950000 0 0x200>;
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 02/22] arm64: dts: renesas: r8a7796: Add FDP1 instance
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
The r8a7796 has a single FDP1 instance.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 369092e17e34..16da83458f18 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -1659,6 +1659,16 @@
/* placeholder */
};
+ fdp1 at fe940000 {
+ compatible = "renesas,fdp1";
+ reg = <0 0xfe940000 0 0x2400>;
+ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 119>;
+ power-domains = <&sysc R8A7796_PD_A3VC>;
+ resets = <&cpg 119>;
+ renesas,fcp = <&fcpf0>;
+ };
+
fcpf0: fcp at fe950000 {
compatible = "renesas,fcpf";
reg = <0 0xfe950000 0 0x200>;
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 03/22] arm64: dts: renesas: r8a77995: update PFC node name to pin-controller
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda, Simon Horman
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch changes the name from from e6060000.pfc and pfc@e6060000 to
e6060000.pin-controller and pin-controller@e6060000 like other Renesas
SoCs.
Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index d0f95b78c022..72c303362b16 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -122,7 +122,7 @@
reg = <0 0xe6160000 0 0x0200>;
};
- pfc: pfc@e6060000 {
+ pfc: pin-controller@e6060000 {
compatible = "renesas,pfc-r8a77995";
reg = <0 0xe6060000 0 0x508>;
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 03/22] arm64: dts: renesas: r8a77995: update PFC node name to pin-controller
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch changes the name from from e6060000.pfc and pfc at e6060000 to
e6060000.pin-controller and pin-controller at e6060000 like other Renesas
SoCs.
Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index d0f95b78c022..72c303362b16 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -122,7 +122,7 @@
reg = <0 0xe6160000 0 0x0200>;
};
- pfc: pfc at e6060000 {
+ pfc: pin-controller at e6060000 {
compatible = "renesas,pfc-r8a77995";
reg = <0 0xe6060000 0 0x508>;
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 04/22] arm64: dts: renesas: ulcb: Enable display output
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Laurent Pinchart, Simon Horman
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
The DU is already wired up to the HDMI encoder, all we need to do is
enable it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/ulcb.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index 1b868df2393f..dfec9072718b 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -157,6 +157,10 @@
};
};
+&du {
+ status = "okay";
+};
+
&ehci1 {
status = "okay";
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 04/22] arm64: dts: renesas: ulcb: Enable display output
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
The DU is already wired up to the HDMI encoder, all we need to do is
enable it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/ulcb.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index 1b868df2393f..dfec9072718b 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -157,6 +157,10 @@
};
};
+&du {
+ status = "okay";
+};
+
&ehci1 {
status = "okay";
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 05/22] arm64: dts: renesas: r8a7795: Drop bogus HDMI node names suffixes
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
Node names should not use numerical suffixes if the nodes can be
distinguished by unit-address.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 2938195b9571..5d5174d8635d 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -2014,7 +2014,7 @@
renesas,fcp = <&fcpf1>;
};
- hdmi0: hdmi0@fead0000 {
+ hdmi0: hdmi@fead0000 {
compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
reg = <0 0xfead0000 0 0x10000>;
interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
@@ -2039,7 +2039,7 @@
};
};
- hdmi1: hdmi1@feae0000 {
+ hdmi1: hdmi@feae0000 {
compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
reg = <0 0xfeae0000 0 0x10000>;
interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 05/22] arm64: dts: renesas: r8a7795: Drop bogus HDMI node names suffixes
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Node names should not use numerical suffixes if the nodes can be
distinguished by unit-address.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 2938195b9571..5d5174d8635d 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -2014,7 +2014,7 @@
renesas,fcp = <&fcpf1>;
};
- hdmi0: hdmi0 at fead0000 {
+ hdmi0: hdmi at fead0000 {
compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
reg = <0 0xfead0000 0 0x10000>;
interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
@@ -2039,7 +2039,7 @@
};
};
- hdmi1: hdmi1 at feae0000 {
+ hdmi1: hdmi at feae0000 {
compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
reg = <0 0xfeae0000 0 0x10000>;
interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 06/22] arm64: renesas: Add Renesas R8A77970 Kconfig support
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
Add a configuration option for the R-Car V3M SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/Kconfig.platforms | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 6b54ee8c1262..a07f9b5a4f82 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -184,6 +184,12 @@ config ARCH_R8A7796
help
This enables support for the Renesas R-Car M3-W SoC.
+config ARCH_R8A77970
+ bool "Renesas R-Car V3M SoC Platform"
+ depends on ARCH_RENESAS
+ help
+ This enables support for the Renesas R-Car V3M SoC.
+
config ARCH_R8A77995
bool "Renesas R-Car D3 SoC Platform"
depends on ARCH_RENESAS
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 06/22] arm64: renesas: Add Renesas R8A77970 Kconfig support
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Add a configuration option for the R-Car V3M SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/Kconfig.platforms | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 6b54ee8c1262..a07f9b5a4f82 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -184,6 +184,12 @@ config ARCH_R8A7796
help
This enables support for the Renesas R-Car M3-W SoC.
+config ARCH_R8A77970
+ bool "Renesas R-Car V3M SoC Platform"
+ depends on ARCH_RENESAS
+ help
+ This enables support for the Renesas R-Car V3M SoC.
+
config ARCH_R8A77995
bool "Renesas R-Car D3 SoC Platform"
depends on ARCH_RENESAS
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 07/22] arm64: dts: renesas: r8a77995: Use r8a7795-sysc binding definitions
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
Replace the hardcoded power domain indices by R8A77995_PD_* symbols.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 72c303362b16..a5b769b840e9 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -11,6 +11,7 @@
#include <dt-bindings/clock/renesas-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/r8a77995-sysc.h>
/ {
compatible = "renesas,r8a77995";
@@ -30,14 +31,14 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0>;
device_type = "cpu";
- power-domains = <&sysc 5>;
+ power-domains = <&sysc R8A77995_PD_CA53_CPU0>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
};
L2_CA53: cache-controller-1 {
compatible = "cache";
- power-domains = <&sysc 21>;
+ power-domains = <&sysc R8A77995_PD_CA53_SCU>;
cache-unified;
cache-level = <2>;
};
@@ -76,7 +77,7 @@
(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
@@ -97,7 +98,7 @@
"renesas,rcar-gen3-wdt";
reg = <0 0xe6020000 0 0x0c>;
clocks = <&cpg CPG_MOD 402>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 402>;
status = "disabled";
};
@@ -147,7 +148,7 @@
<&cpg CPG_CORE 16>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 310>;
status = "disabled";
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 07/22] arm64: dts: renesas: r8a77995: Use r8a7795-sysc binding definitions
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Replace the hardcoded power domain indices by R8A77995_PD_* symbols.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 72c303362b16..a5b769b840e9 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -11,6 +11,7 @@
#include <dt-bindings/clock/renesas-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/r8a77995-sysc.h>
/ {
compatible = "renesas,r8a77995";
@@ -30,14 +31,14 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0>;
device_type = "cpu";
- power-domains = <&sysc 5>;
+ power-domains = <&sysc R8A77995_PD_CA53_CPU0>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
};
L2_CA53: cache-controller-1 {
compatible = "cache";
- power-domains = <&sysc 21>;
+ power-domains = <&sysc R8A77995_PD_CA53_SCU>;
cache-unified;
cache-level = <2>;
};
@@ -76,7 +77,7 @@
(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
@@ -97,7 +98,7 @@
"renesas,rcar-gen3-wdt";
reg = <0 0xe6020000 0 0x0c>;
clocks = <&cpg CPG_MOD 402>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 402>;
status = "disabled";
};
@@ -147,7 +148,7 @@
<&cpg CPG_CORE 16>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 310>;
status = "disabled";
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 08/22] arm64: dts: renesas: r8a77995: Use r8a7795-cpg-mssr binding definitions
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
Replace the hardcoded clock indices by R8A77995_CLK_* symbols.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index a5b769b840e9..84b6bd58eafb 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -9,7 +9,7 @@
* kind, whether express or implied.
*/
-#include <dt-bindings/clock/renesas-cpg-mssr.h>
+#include <dt-bindings/clock/r8a77995-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a77995-sysc.h>
@@ -145,7 +145,7 @@
reg = <0 0xe6e88000 0 64>;
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 310>,
- <&cpg CPG_CORE 16>,
+ <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 08/22] arm64: dts: renesas: r8a77995: Use r8a7795-cpg-mssr binding definitions
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Replace the hardcoded clock indices by R8A77995_CLK_* symbols.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index a5b769b840e9..84b6bd58eafb 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -9,7 +9,7 @@
* kind, whether express or implied.
*/
-#include <dt-bindings/clock/renesas-cpg-mssr.h>
+#include <dt-bindings/clock/r8a77995-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a77995-sysc.h>
@@ -145,7 +145,7 @@
reg = <0 0xe6e88000 0 64>;
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 310>,
- <&cpg CPG_CORE 16>,
+ <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 09/22] arm64: dts: renesas: r8a77995: add GPIO device nodes
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda, Simon Horman
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds GPIO device nodes for r8a77995.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 112 ++++++++++++++++++++++++++++++
1 file changed, 112 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 84b6bd58eafb..d7756256d2a6 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -139,6 +139,118 @@
#power-domain-cells = <1>;
};
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 9>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
+ };
+
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
+ };
+
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
+ };
+
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 10>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
+ };
+
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
+ };
+
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 21>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
+ };
+
+ gpio6: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 14>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 906>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 906>;
+ };
+
scif2: serial@e6e88000 {
compatible = "renesas,scif-r8a77995",
"renesas,rcar-gen3-scif", "renesas,scif";
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 09/22] arm64: dts: renesas: r8a77995: add GPIO device nodes
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds GPIO device nodes for r8a77995.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 112 ++++++++++++++++++++++++++++++
1 file changed, 112 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 84b6bd58eafb..d7756256d2a6 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -139,6 +139,118 @@
#power-domain-cells = <1>;
};
+ gpio0: gpio at e6050000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 9>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
+ };
+
+ gpio1: gpio at e6051000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
+ };
+
+ gpio2: gpio at e6052000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
+ };
+
+ gpio3: gpio at e6053000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 10>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
+ };
+
+ gpio4: gpio at e6054000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
+ };
+
+ gpio5: gpio at e6055000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 21>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
+ };
+
+ gpio6: gpio at e6055400 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 14>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 906>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 906>;
+ };
+
scif2: serial at e6e88000 {
compatible = "renesas,scif-r8a77995",
"renesas,rcar-gen3-scif", "renesas,scif";
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 10/22] arm64: dts: renesas: r8a77995: Add EthernetAVB device node
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda, Simon Horman
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds EthernetAVB device node for r8a77995.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 45 +++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index d7756256d2a6..72d04d7337be 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -251,6 +251,51 @@
resets = <&cpg 906>;
};
+ avb: ethernet@e6800000 {
+ compatible = "renesas,etheravb-r8a77995",
+ "renesas,etheravb-rcar-gen3";
+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15",
+ "ch16", "ch17", "ch18", "ch19",
+ "ch20", "ch21", "ch22", "ch23",
+ "ch24";
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ phy-mode = "rgmii-txid";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
scif2: serial@e6e88000 {
compatible = "renesas,scif-r8a77995",
"renesas,rcar-gen3-scif", "renesas,scif";
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 10/22] arm64: dts: renesas: r8a77995: Add EthernetAVB device node
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds EthernetAVB device node for r8a77995.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 45 +++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index d7756256d2a6..72d04d7337be 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -251,6 +251,51 @@
resets = <&cpg 906>;
};
+ avb: ethernet at e6800000 {
+ compatible = "renesas,etheravb-r8a77995",
+ "renesas,etheravb-rcar-gen3";
+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15",
+ "ch16", "ch17", "ch18", "ch19",
+ "ch20", "ch21", "ch22", "ch23",
+ "ch24";
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ phy-mode = "rgmii-txid";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
scif2: serial at e6e88000 {
compatible = "renesas,scif-r8a77995",
"renesas,rcar-gen3-scif", "renesas,scif";
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 11/22] arm64: dts: renesas: initial R8A77970 SoC device tree
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Sergei Shtylyov, Vladimir Barinov,
Simon Horman
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
The initial R8A77970 SoC device tree including Cortex-A53 CPU, GIC, timer,
CPG, RST, and SYSC.
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 125 ++++++++++++++++++++++++++++++
1 file changed, 125 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/r8a77970.dtsi
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
new file mode 100644
index 000000000000..dec3492cd7dc
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -0,0 +1,125 @@
+/*
+ * Device Tree Source for the r8a77970 SoC
+ *
+ * Copyright (C) 2016-2017 Renesas Electronics Corp.
+ * Copyright (C) 2017 Cogent Embedded, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
+
+/ {
+ compatible = "renesas,r8a77970";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ psci {
+ compatible = "arm,psci-1.0", "arm,psci-0.2";
+ method = "smc";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ a53_0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0>;
+ clocks = <&cpg CPG_CORE 0>;
+ power-domains = <&sysc 5>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
+ L2_CA53: cache-controller {
+ compatible = "cache";
+ power-domains = <&sysc 21>;
+ cache-unified;
+ cache-level = <2>;
+ };
+ };
+
+ extal_clk: extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ extalr_clk: extalr {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gic: interrupt-controller@f1010000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1010000 0 0x1000>,
+ <0 0xf1020000 0 0x20000>,
+ <0 0xf1040000 0 0x20000>,
+ <0 0xf1060000 0 0x20000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 408>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) |
+ IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ cpg: clock-controller@e6150000 {
+ compatible = "renesas,r8a77970-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&extalr_clk>;
+ clock-names = "extal", "extalr";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
+
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a77970-rst";
+ reg = <0 0xe6160000 0 0x200>;
+ };
+
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a77970-sysc";
+ reg = <0 0xe6180000 0 0x440>;
+ #power-domain-cells = <1>;
+ };
+
+ prr: chipid@fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
+ };
+ };
+};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 11/22] arm64: dts: renesas: initial R8A77970 SoC device tree
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
The initial R8A77970 SoC device tree including Cortex-A53 CPU, GIC, timer,
CPG, RST, and SYSC.
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 125 ++++++++++++++++++++++++++++++
1 file changed, 125 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/r8a77970.dtsi
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
new file mode 100644
index 000000000000..dec3492cd7dc
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -0,0 +1,125 @@
+/*
+ * Device Tree Source for the r8a77970 SoC
+ *
+ * Copyright (C) 2016-2017 Renesas Electronics Corp.
+ * Copyright (C) 2017 Cogent Embedded, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
+
+/ {
+ compatible = "renesas,r8a77970";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ psci {
+ compatible = "arm,psci-1.0", "arm,psci-0.2";
+ method = "smc";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ a53_0: cpu at 0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0>;
+ clocks = <&cpg CPG_CORE 0>;
+ power-domains = <&sysc 5>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
+ L2_CA53: cache-controller {
+ compatible = "cache";
+ power-domains = <&sysc 21>;
+ cache-unified;
+ cache-level = <2>;
+ };
+ };
+
+ extal_clk: extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ extalr_clk: extalr {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gic: interrupt-controller at f1010000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1010000 0 0x1000>,
+ <0 0xf1020000 0 0x20000>,
+ <0 0xf1040000 0 0x20000>,
+ <0 0xf1060000 0 0x20000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 408>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) |
+ IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) |
+ IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ cpg: clock-controller at e6150000 {
+ compatible = "renesas,r8a77970-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&extalr_clk>;
+ clock-names = "extal", "extalr";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
+
+ rst: reset-controller at e6160000 {
+ compatible = "renesas,r8a77970-rst";
+ reg = <0 0xe6160000 0 0x200>;
+ };
+
+ sysc: system-controller at e6180000 {
+ compatible = "renesas,r8a77970-sysc";
+ reg = <0 0xe6180000 0 0x440>;
+ #power-domain-cells = <1>;
+ };
+
+ prr: chipid at fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
+ };
+ };
+};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 12/22] arm64: dts: renesas: r8a77970: add SYS-DMAC support
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Sergei Shtylyov, Vladimir Barinov,
Simon Horman
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Describe SYS-DMAC1/2 in the R8A77970 device tree.
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 48 +++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index dec3492cd7dc..a2a438a91b3f 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -121,5 +121,53 @@
compatible = "renesas,prr";
reg = <0 0xfff00044 0 4>;
};
+
+ dmac1: dma-controller@e7300000 {
+ compatible = "renesas,dmac-r8a77970",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7300000 0 0x10000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <8>;
+ };
+
+ dmac2: dma-controller@e7310000 {
+ compatible = "renesas,dmac-r8a77970",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7310000 0 0x10000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7";
+ clocks = <&cpg CPG_MOD 217>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 217>;
+ #dma-cells = <1>;
+ dma-channels = <8>;
+ };
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 12/22] arm64: dts: renesas: r8a77970: add SYS-DMAC support
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Describe SYS-DMAC1/2 in the R8A77970 device tree.
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 48 +++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index dec3492cd7dc..a2a438a91b3f 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -121,5 +121,53 @@
compatible = "renesas,prr";
reg = <0 0xfff00044 0 4>;
};
+
+ dmac1: dma-controller at e7300000 {
+ compatible = "renesas,dmac-r8a77970",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7300000 0 0x10000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <8>;
+ };
+
+ dmac2: dma-controller at e7310000 {
+ compatible = "renesas,dmac-r8a77970",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7310000 0 0x10000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7";
+ clocks = <&cpg CPG_MOD 217>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 217>;
+ #dma-cells = <1>;
+ dma-channels = <8>;
+ };
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 13/22] arm64: dts: renesas: r8a77970: add [H]SCIF support
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Sergei Shtylyov, Vladimir Barinov,
Simon Horman
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Describe [H]SCIF ports in the R8A77970 device tree.
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 149 ++++++++++++++++++++++++++++++
1 file changed, 149 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index a2a438a91b3f..04ec0e459686 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -59,6 +59,13 @@
clock-frequency = <0>;
};
+ /* External SCIF clock - to be overridden by boards that provide it */
+ scif_clk: scif {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
@@ -169,5 +176,147 @@
#dma-cells = <1>;
dma-channels = <8>;
};
+
+ hscif0: serial@e6540000 {
+ compatible = "renesas,hscif-r8a77970",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6540000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 520>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x31>, <&dmac1 0x30>,
+ <&dmac2 0x31>, <&dmac2 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 520>;
+ status = "disabled";
+ };
+
+ hscif1: serial@e6550000 {
+ compatible = "renesas,hscif-r8a77970",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6550000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 519>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x33>, <&dmac1 0x32>,
+ <&dmac2 0x33>, <&dmac2 0x32>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 519>;
+ status = "disabled";
+ };
+
+ hscif2: serial@e6560000 {
+ compatible = "renesas,hscif-r8a77970",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6560000 0 96>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 518>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x35>, <&dmac1 0x34>,
+ <&dmac2 0x35>, <&dmac2 0x34>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 518>;
+ status = "disabled";
+ };
+
+ hscif3: serial@e66a0000 {
+ compatible = "renesas,hscif-r8a77970",
+ "renesas,rcar-gen3-hscif", "renesas,hscif";
+ reg = <0 0xe66a0000 0 96>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 517>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x37>, <&dmac1 0x36>,
+ <&dmac2 0x37>, <&dmac2 0x36>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 517>;
+ status = "disabled";
+ };
+
+ scif0: serial@e6e60000 {
+ compatible = "renesas,scif-r8a77970",
+ "renesas,rcar-gen3-scif",
+ "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x51>, <&dmac1 0x50>,
+ <&dmac2 0x51>, <&dmac2 0x50>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 207>;
+ status = "disabled";
+ };
+
+ scif1: serial@e6e68000 {
+ compatible = "renesas,scif-r8a77970",
+ "renesas,rcar-gen3-scif",
+ "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x53>, <&dmac1 0x52>,
+ <&dmac2 0x53>, <&dmac2 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 206>;
+ status = "disabled";
+ };
+
+ scif3: serial@e6c50000 {
+ compatible = "renesas,scif-r8a77970",
+ "renesas,rcar-gen3-scif",
+ "renesas,scif";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x57>, <&dmac1 0x56>,
+ <&dmac2 0x57>, <&dmac2 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 204>;
+ status = "disabled";
+ };
+
+ scif4: serial@e6c40000 {
+ compatible = "renesas,scif-r8a77970",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x59>, <&dmac1 0x58>,
+ <&dmac2 0x59>, <&dmac2 0x58>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 203>;
+ status = "disabled";
+ };
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 13/22] arm64: dts: renesas: r8a77970: add [H]SCIF support
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Describe [H]SCIF ports in the R8A77970 device tree.
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 149 ++++++++++++++++++++++++++++++
1 file changed, 149 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index a2a438a91b3f..04ec0e459686 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -59,6 +59,13 @@
clock-frequency = <0>;
};
+ /* External SCIF clock - to be overridden by boards that provide it */
+ scif_clk: scif {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
@@ -169,5 +176,147 @@
#dma-cells = <1>;
dma-channels = <8>;
};
+
+ hscif0: serial at e6540000 {
+ compatible = "renesas,hscif-r8a77970",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6540000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 520>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x31>, <&dmac1 0x30>,
+ <&dmac2 0x31>, <&dmac2 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 520>;
+ status = "disabled";
+ };
+
+ hscif1: serial at e6550000 {
+ compatible = "renesas,hscif-r8a77970",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6550000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 519>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x33>, <&dmac1 0x32>,
+ <&dmac2 0x33>, <&dmac2 0x32>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 519>;
+ status = "disabled";
+ };
+
+ hscif2: serial at e6560000 {
+ compatible = "renesas,hscif-r8a77970",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6560000 0 96>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 518>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x35>, <&dmac1 0x34>,
+ <&dmac2 0x35>, <&dmac2 0x34>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 518>;
+ status = "disabled";
+ };
+
+ hscif3: serial at e66a0000 {
+ compatible = "renesas,hscif-r8a77970",
+ "renesas,rcar-gen3-hscif", "renesas,hscif";
+ reg = <0 0xe66a0000 0 96>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 517>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x37>, <&dmac1 0x36>,
+ <&dmac2 0x37>, <&dmac2 0x36>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 517>;
+ status = "disabled";
+ };
+
+ scif0: serial at e6e60000 {
+ compatible = "renesas,scif-r8a77970",
+ "renesas,rcar-gen3-scif",
+ "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x51>, <&dmac1 0x50>,
+ <&dmac2 0x51>, <&dmac2 0x50>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 207>;
+ status = "disabled";
+ };
+
+ scif1: serial at e6e68000 {
+ compatible = "renesas,scif-r8a77970",
+ "renesas,rcar-gen3-scif",
+ "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x53>, <&dmac1 0x52>,
+ <&dmac2 0x53>, <&dmac2 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 206>;
+ status = "disabled";
+ };
+
+ scif3: serial at e6c50000 {
+ compatible = "renesas,scif-r8a77970",
+ "renesas,rcar-gen3-scif",
+ "renesas,scif";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x57>, <&dmac1 0x56>,
+ <&dmac2 0x57>, <&dmac2 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 204>;
+ status = "disabled";
+ };
+
+ scif4: serial at e6c40000 {
+ compatible = "renesas,scif-r8a77970",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>,
+ <&cpg CPG_CORE 9>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x59>, <&dmac1 0x58>,
+ <&dmac2 0x59>, <&dmac2 0x58>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 203>;
+ status = "disabled";
+ };
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 14/22] arm64: dts: renesas: r8a77970: add EtherAVB support
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Sergei Shtylyov, Vladimir Barinov,
Simon Horman
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Define the generic R8A77970 part of the EtherAVB device node.
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 44 +++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 04ec0e459686..aa9032d34189 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -318,5 +318,49 @@
resets = <&cpg 203>;
status = "disabled";
};
+
+ avb: ethernet@e6800000 {
+ compatible = "renesas,etheravb-r8a77970",
+ "renesas,etheravb-rcar-gen3";
+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15",
+ "ch16", "ch17", "ch18", "ch19",
+ "ch20", "ch21", "ch22", "ch23",
+ "ch24";
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 812>;
+ phy-mode = "rgmii-id";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 14/22] arm64: dts: renesas: r8a77970: add EtherAVB support
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Define the generic R8A77970 part of the EtherAVB device node.
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 44 +++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 04ec0e459686..aa9032d34189 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -318,5 +318,49 @@
resets = <&cpg 203>;
status = "disabled";
};
+
+ avb: ethernet at e6800000 {
+ compatible = "renesas,etheravb-r8a77970",
+ "renesas,etheravb-rcar-gen3";
+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15",
+ "ch16", "ch17", "ch18", "ch19",
+ "ch20", "ch21", "ch22", "ch23",
+ "ch24";
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 812>;
+ phy-mode = "rgmii-id";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 15/22] arm64: dts: draak: Add serial console pins
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
Add pin control for SCIF2.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index d144370051d5..19c5462d8b67 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -36,7 +36,18 @@
clock-frequency = <48000000>;
};
+&pfc {
+ scif2_pins: scif2 {
+ groups = "scif2_data";
+ function = "scif2";
+ };
+
+};
+
&scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 15/22] arm64: dts: draak: Add serial console pins
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Add pin control for SCIF2.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index d144370051d5..19c5462d8b67 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -36,7 +36,18 @@
clock-frequency = <48000000>;
};
+&pfc {
+ scif2_pins: scif2 {
+ groups = "scif2_data";
+ function = "scif2";
+ };
+
+};
+
&scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 16/22] arm64: dts: renesas: r8a77995: Add USB2.0 PHY device node
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda, Simon Horman
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds USB2.0 PHY device node for r8a77995.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 72d04d7337be..59ed1303bd93 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -309,5 +309,17 @@
resets = <&cpg 310>;
status = "disabled";
};
+
+ usb2_phy0: usb-phy@ee080200 {
+ compatible = "renesas,usb2-phy-r8a77995",
+ "renesas,rcar-gen3-usb2-phy";
+ reg = <0 0xee080200 0 0x700>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 16/22] arm64: dts: renesas: r8a77995: Add USB2.0 PHY device node
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds USB2.0 PHY device node for r8a77995.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 72d04d7337be..59ed1303bd93 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -309,5 +309,17 @@
resets = <&cpg 310>;
status = "disabled";
};
+
+ usb2_phy0: usb-phy at ee080200 {
+ compatible = "renesas,usb2-phy-r8a77995",
+ "renesas,rcar-gen3-usb2-phy";
+ reg = <0 0xee080200 0 0x700>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 17/22] arm64: dts: renesas: r8a77995: add USB2.0 Host (EHCI/OHCI) device node
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda, Simon Horman
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds USB2.0 Host (EHCI/OHCI) device node for r8a77995.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 59ed1303bd93..56e42921e879 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -310,6 +310,31 @@
status = "disabled";
};
+ ehci0: usb@ee080100 {
+ compatible = "generic-ehci";
+ reg = <0 0xee080100 0 0x100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ companion = <&ohci0>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+ };
+
+ ohci0: usb@ee080000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee080000 0 0x100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+ };
+
usb2_phy0: usb-phy@ee080200 {
compatible = "renesas,usb2-phy-r8a77995",
"renesas,rcar-gen3-usb2-phy";
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 17/22] arm64: dts: renesas: r8a77995: add USB2.0 Host (EHCI/OHCI) device node
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds USB2.0 Host (EHCI/OHCI) device node for r8a77995.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 59ed1303bd93..56e42921e879 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -310,6 +310,31 @@
status = "disabled";
};
+ ehci0: usb at ee080100 {
+ compatible = "generic-ehci";
+ reg = <0 0xee080100 0 0x100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ companion = <&ohci0>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+ };
+
+ ohci0: usb at ee080000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee080000 0 0x100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+ };
+
usb2_phy0: usb-phy at ee080200 {
compatible = "renesas,usb2-phy-r8a77995",
"renesas,rcar-gen3-usb2-phy";
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 18/22] arm64: dts: renesas: r8a77995: draak: enable USB2.0 PHY
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda, Simon Horman
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch enables USB2.0 PHY for R-Car D3 draak board.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 19c5462d8b67..454658ac6efc 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -42,6 +42,10 @@
function = "scif2";
};
+ usb0_pins: usb0 {
+ groups = "usb0";
+ function = "usb0";
+ };
};
&scif2 {
@@ -51,6 +55,13 @@
status = "okay";
};
+&usb2_phy0 {
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
&rwdt {
timeout-sec = <60>;
status = "okay";
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 18/22] arm64: dts: renesas: r8a77995: draak: enable USB2.0 PHY
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch enables USB2.0 PHY for R-Car D3 draak board.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 19c5462d8b67..454658ac6efc 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -42,6 +42,10 @@
function = "scif2";
};
+ usb0_pins: usb0 {
+ groups = "usb0";
+ function = "usb0";
+ };
};
&scif2 {
@@ -51,6 +55,13 @@
status = "okay";
};
+&usb2_phy0 {
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
&rwdt {
timeout-sec = <60>;
status = "okay";
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 19/22] arm64: dts: renesas: r8a77995: draak: enable USB2.0 Host (EHCI/OHCI)
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda, Simon Horman
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch enables USB2.0 Host (EHCI/OHCI) for r8a77995.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 454658ac6efc..7b776cb7e928 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -48,6 +48,14 @@
};
};
+&ehci0 {
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 19/22] arm64: dts: renesas: r8a77995: draak: enable USB2.0 Host (EHCI/OHCI)
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch enables USB2.0 Host (EHCI/OHCI) for r8a77995.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 454658ac6efc..7b776cb7e928 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -48,6 +48,14 @@
};
};
+&ehci0 {
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 20/22] arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda, Simon Horman
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch enables EthernetAVB for R-Car D3 draak board.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 7b776cb7e928..96b7ff5cc321 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -11,6 +11,7 @@
/dts-v1/;
#include "r8a77995.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Renesas Draak board based on r8a77995";
@@ -18,6 +19,7 @@
aliases {
serial0 = &scif2;
+ ethernet0 = &avb;
};
chosen {
@@ -37,6 +39,14 @@
};
&pfc {
+ avb0_pins: avb {
+ mux {
+ groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
+ "avb0_mii";
+ function = "avb0";
+ };
+ };
+
scif2_pins: scif2 {
groups = "scif2_data";
function = "scif2";
@@ -56,6 +66,21 @@
status = "okay";
};
+&avb {
+ pinctrl-0 = <&avb0_pins>;
+ pinctrl-names = "default";
+ renesas,no-ether-link;
+ phy-handle = <&phy0>;
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ rxc-skew-ps = <1500>;
+ reg = <0>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 20/22] arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch enables EthernetAVB for R-Car D3 draak board.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 7b776cb7e928..96b7ff5cc321 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -11,6 +11,7 @@
/dts-v1/;
#include "r8a77995.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Renesas Draak board based on r8a77995";
@@ -18,6 +19,7 @@
aliases {
serial0 = &scif2;
+ ethernet0 = &avb;
};
chosen {
@@ -37,6 +39,14 @@
};
&pfc {
+ avb0_pins: avb {
+ mux {
+ groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
+ "avb0_mii";
+ function = "avb0";
+ };
+ };
+
scif2_pins: scif2 {
groups = "scif2_data";
function = "scif2";
@@ -56,6 +66,21 @@
status = "okay";
};
+&avb {
+ pinctrl-0 = <&avb0_pins>;
+ pinctrl-names = "default";
+ renesas,no-ether-link;
+ phy-handle = <&phy0>;
+ status = "okay";
+
+ phy0: ethernet-phy at 0 {
+ rxc-skew-ps = <1500>;
+ reg = <0>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* Re: [PATCH 20/22] arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
2017-09-29 11:52 ` Simon Horman
@ 2017-09-30 10:24 ` Sergei Shtylyov
-1 siblings, 0 replies; 66+ messages in thread
From: Sergei Shtylyov @ 2017-09-30 10:24 UTC (permalink / raw)
To: Simon Horman, linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda
Hello!
On 9/29/2017 2:52 PM, Simon Horman wrote:
> From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>
> This patch enables EthernetAVB for R-Car D3 draak board.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> ---
> arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> index 7b776cb7e928..96b7ff5cc321 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
[...]
> @@ -37,6 +39,14 @@
> };
>
> &pfc {
> + avb0_pins: avb {
> + mux {
> + groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
^^^^^^^^^^^^^^
Hum, I don't think it's compatible with routing the PHY interrupt via
GPIO5_19 below. The driver doesn't support signalling via AVB_PHY_INT anyway.
> + "avb0_mii";
> + function = "avb0";
> + };
> + };
> +
> scif2_pins: scif2 {
> groups = "scif2_data";
> function = "scif2";
> @@ -56,6 +66,21 @@
> status = "okay";
> };
>
> +&avb {
> + pinctrl-0 = <&avb0_pins>;
> + pinctrl-names = "default";
> + renesas,no-ether-link;
> + phy-handle = <&phy0>;
> + status = "okay";
> +
> + phy0: ethernet-phy@0 {
> + rxc-skew-ps = <1500>;
> + reg = <0>;
> + interrupt-parent = <&gpio5>;
> + interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
> + };
> +};
> +
> &scif2 {
> pinctrl-0 = <&scif2_pins>;
> pinctrl-names = "default";
MBR, Sergei
^ permalink raw reply [flat|nested] 66+ messages in thread* [PATCH 20/22] arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
@ 2017-09-30 10:24 ` Sergei Shtylyov
0 siblings, 0 replies; 66+ messages in thread
From: Sergei Shtylyov @ 2017-09-30 10:24 UTC (permalink / raw)
To: linux-arm-kernel
Hello!
On 9/29/2017 2:52 PM, Simon Horman wrote:
> From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>
> This patch enables EthernetAVB for R-Car D3 draak board.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> ---
> arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> index 7b776cb7e928..96b7ff5cc321 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
[...]
> @@ -37,6 +39,14 @@
> };
>
> &pfc {
> + avb0_pins: avb {
> + mux {
> + groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
^^^^^^^^^^^^^^
Hum, I don't think it's compatible with routing the PHY interrupt via
GPIO5_19 below. The driver doesn't support signalling via AVB_PHY_INT anyway.
> + "avb0_mii";
> + function = "avb0";
> + };
> + };
> +
> scif2_pins: scif2 {
> groups = "scif2_data";
> function = "scif2";
> @@ -56,6 +66,21 @@
> status = "okay";
> };
>
> +&avb {
> + pinctrl-0 = <&avb0_pins>;
> + pinctrl-names = "default";
> + renesas,no-ether-link;
> + phy-handle = <&phy0>;
> + status = "okay";
> +
> + phy0: ethernet-phy at 0 {
> + rxc-skew-ps = <1500>;
> + reg = <0>;
> + interrupt-parent = <&gpio5>;
> + interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
> + };
> +};
> +
> &scif2 {
> pinctrl-0 = <&scif2_pins>;
> pinctrl-names = "default";
MBR, Sergei
^ permalink raw reply [flat|nested] 66+ messages in thread* RE: [PATCH 20/22] arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
2017-09-30 10:24 ` Sergei Shtylyov
@ 2017-10-02 1:18 ` Yoshihiro Shimoda
-1 siblings, 0 replies; 66+ messages in thread
From: Yoshihiro Shimoda @ 2017-10-02 1:18 UTC (permalink / raw)
To: Sergei Shtylyov, Simon Horman
Cc: linux-arm-kernel, Magnus Damm, linux-renesas-soc
Hello,
> -----Original Message-----
> From: Sergei Shtylyov
> Sent: Saturday, September 30, 2017 7:24 PM
>
> Hello!
>
> On 9/29/2017 2:52 PM, Simon Horman wrote:
>
> > From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> >
> > This patch enables EthernetAVB for R-Car D3 draak board.
> >
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > ---
> > arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++++++++
> > 1 file changed, 25 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > index 7b776cb7e928..96b7ff5cc321 100644
> > --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> [...]
> > @@ -37,6 +39,14 @@
> > };
> >
> > &pfc {
> > + avb0_pins: avb {
> > + mux {
> > + groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
> ^^^^^^^^^^^^^^
> Hum, I don't think it's compatible with routing the PHY interrupt via
> GPIO5_19 below. The driver doesn't support signalling via AVB_PHY_INT anyway.
Oops! You're correct. I should drop "avb0_phy_int".
Simon-san, may I send a follow-up patch to fix this?
Best regards,
Yoshihiro Shimoda
> > + "avb0_mii";
> > + function = "avb0";
> > + };
> > + };
> > +
> > scif2_pins: scif2 {
> > groups = "scif2_data";
> > function = "scif2";
> > @@ -56,6 +66,21 @@
> > status = "okay";
> > };
> >
> > +&avb {
> > + pinctrl-0 = <&avb0_pins>;
> > + pinctrl-names = "default";
> > + renesas,no-ether-link;
> > + phy-handle = <&phy0>;
> > + status = "okay";
> > +
> > + phy0: ethernet-phy@0 {
> > + rxc-skew-ps = <1500>;
> > + reg = <0>;
> > + interrupt-parent = <&gpio5>;
> > + interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
> > + };
> > +};
> > +
> > &scif2 {
> > pinctrl-0 = <&scif2_pins>;
> > pinctrl-names = "default";
>
> MBR, Sergei
^ permalink raw reply [flat|nested] 66+ messages in thread* [PATCH 20/22] arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
@ 2017-10-02 1:18 ` Yoshihiro Shimoda
0 siblings, 0 replies; 66+ messages in thread
From: Yoshihiro Shimoda @ 2017-10-02 1:18 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
> -----Original Message-----
> From: Sergei Shtylyov
> Sent: Saturday, September 30, 2017 7:24 PM
>
> Hello!
>
> On 9/29/2017 2:52 PM, Simon Horman wrote:
>
> > From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> >
> > This patch enables EthernetAVB for R-Car D3 draak board.
> >
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > ---
> > arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++++++++
> > 1 file changed, 25 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > index 7b776cb7e928..96b7ff5cc321 100644
> > --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> [...]
> > @@ -37,6 +39,14 @@
> > };
> >
> > &pfc {
> > + avb0_pins: avb {
> > + mux {
> > + groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
> ^^^^^^^^^^^^^^
> Hum, I don't think it's compatible with routing the PHY interrupt via
> GPIO5_19 below. The driver doesn't support signalling via AVB_PHY_INT anyway.
Oops! You're correct. I should drop "avb0_phy_int".
Simon-san, may I send a follow-up patch to fix this?
Best regards,
Yoshihiro Shimoda
> > + "avb0_mii";
> > + function = "avb0";
> > + };
> > + };
> > +
> > scif2_pins: scif2 {
> > groups = "scif2_data";
> > function = "scif2";
> > @@ -56,6 +66,21 @@
> > status = "okay";
> > };
> >
> > +&avb {
> > + pinctrl-0 = <&avb0_pins>;
> > + pinctrl-names = "default";
> > + renesas,no-ether-link;
> > + phy-handle = <&phy0>;
> > + status = "okay";
> > +
> > + phy0: ethernet-phy at 0 {
> > + rxc-skew-ps = <1500>;
> > + reg = <0>;
> > + interrupt-parent = <&gpio5>;
> > + interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
> > + };
> > +};
> > +
> > &scif2 {
> > pinctrl-0 = <&scif2_pins>;
> > pinctrl-names = "default";
>
> MBR, Sergei
^ permalink raw reply [flat|nested] 66+ messages in thread* Re: [PATCH 20/22] arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
2017-10-02 1:18 ` Yoshihiro Shimoda
@ 2017-10-02 7:14 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-10-02 7:14 UTC (permalink / raw)
To: Yoshihiro Shimoda
Cc: Sergei Shtylyov, linux-arm-kernel, Magnus Damm, linux-renesas-soc
On Mon, Oct 02, 2017 at 01:18:49AM +0000, Yoshihiro Shimoda wrote:
> Hello,
>
> > -----Original Message-----
> > From: Sergei Shtylyov
> > Sent: Saturday, September 30, 2017 7:24 PM
> >
> > Hello!
> >
> > On 9/29/2017 2:52 PM, Simon Horman wrote:
> >
> > > From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > >
> > > This patch enables EthernetAVB for R-Car D3 draak board.
> > >
> > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > > ---
> > > arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++++++++
> > > 1 file changed, 25 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > index 7b776cb7e928..96b7ff5cc321 100644
> > > --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > [...]
> > > @@ -37,6 +39,14 @@
> > > };
> > >
> > > &pfc {
> > > + avb0_pins: avb {
> > > + mux {
> > > + groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
> > ^^^^^^^^^^^^^^
> > Hum, I don't think it's compatible with routing the PHY interrupt via
> > GPIO5_19 below. The driver doesn't support signalling via AVB_PHY_INT anyway.
>
> Oops! You're correct. I should drop "avb0_phy_int".
>
> Simon-san, may I send a follow-up patch to fix this?
Thanks Sergei, thanks Shimoda-san,
yes, please provide a follow-up patch.
At this stage I don't think we need to re-spin this pull-request
to fix this, rather a follow-up patch can be included
in a follow-up pull request.
>
> Best regards,
> Yoshihiro Shimoda
>
> > > + "avb0_mii";
> > > + function = "avb0";
> > > + };
> > > + };
> > > +
> > > scif2_pins: scif2 {
> > > groups = "scif2_data";
> > > function = "scif2";
> > > @@ -56,6 +66,21 @@
> > > status = "okay";
> > > };
> > >
> > > +&avb {
> > > + pinctrl-0 = <&avb0_pins>;
> > > + pinctrl-names = "default";
> > > + renesas,no-ether-link;
> > > + phy-handle = <&phy0>;
> > > + status = "okay";
> > > +
> > > + phy0: ethernet-phy@0 {
> > > + rxc-skew-ps = <1500>;
> > > + reg = <0>;
> > > + interrupt-parent = <&gpio5>;
> > > + interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
> > > + };
> > > +};
> > > +
> > > &scif2 {
> > > pinctrl-0 = <&scif2_pins>;
> > > pinctrl-names = "default";
> >
> > MBR, Sergei
^ permalink raw reply [flat|nested] 66+ messages in thread* [PATCH 20/22] arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
@ 2017-10-02 7:14 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-10-02 7:14 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Oct 02, 2017 at 01:18:49AM +0000, Yoshihiro Shimoda wrote:
> Hello,
>
> > -----Original Message-----
> > From: Sergei Shtylyov
> > Sent: Saturday, September 30, 2017 7:24 PM
> >
> > Hello!
> >
> > On 9/29/2017 2:52 PM, Simon Horman wrote:
> >
> > > From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > >
> > > This patch enables EthernetAVB for R-Car D3 draak board.
> > >
> > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > > ---
> > > arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++++++++
> > > 1 file changed, 25 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > index 7b776cb7e928..96b7ff5cc321 100644
> > > --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > [...]
> > > @@ -37,6 +39,14 @@
> > > };
> > >
> > > &pfc {
> > > + avb0_pins: avb {
> > > + mux {
> > > + groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
> > ^^^^^^^^^^^^^^
> > Hum, I don't think it's compatible with routing the PHY interrupt via
> > GPIO5_19 below. The driver doesn't support signalling via AVB_PHY_INT anyway.
>
> Oops! You're correct. I should drop "avb0_phy_int".
>
> Simon-san, may I send a follow-up patch to fix this?
Thanks Sergei, thanks Shimoda-san,
yes, please provide a follow-up patch.
At this stage I don't think we need to re-spin this pull-request
to fix this, rather a follow-up patch can be included
in a follow-up pull request.
>
> Best regards,
> Yoshihiro Shimoda
>
> > > + "avb0_mii";
> > > + function = "avb0";
> > > + };
> > > + };
> > > +
> > > scif2_pins: scif2 {
> > > groups = "scif2_data";
> > > function = "scif2";
> > > @@ -56,6 +66,21 @@
> > > status = "okay";
> > > };
> > >
> > > +&avb {
> > > + pinctrl-0 = <&avb0_pins>;
> > > + pinctrl-names = "default";
> > > + renesas,no-ether-link;
> > > + phy-handle = <&phy0>;
> > > + status = "okay";
> > > +
> > > + phy0: ethernet-phy at 0 {
> > > + rxc-skew-ps = <1500>;
> > > + reg = <0>;
> > > + interrupt-parent = <&gpio5>;
> > > + interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
> > > + };
> > > +};
> > > +
> > > &scif2 {
> > > pinctrl-0 = <&scif2_pins>;
> > > pinctrl-names = "default";
> >
> > MBR, Sergei
^ permalink raw reply [flat|nested] 66+ messages in thread* RE: [PATCH 20/22] arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
2017-10-02 7:14 ` Simon Horman
@ 2017-10-02 9:16 ` Yoshihiro Shimoda
-1 siblings, 0 replies; 66+ messages in thread
From: Yoshihiro Shimoda @ 2017-10-02 9:16 UTC (permalink / raw)
To: Simon Horman
Cc: Sergei Shtylyov, linux-arm-kernel, Magnus Damm, linux-renesas-soc
Hi Simon-san,
> -----Original Message-----
> From: Simon Horman
> Sent: Monday, October 2, 2017 4:15 PM
>
> On Mon, Oct 02, 2017 at 01:18:49AM +0000, Yoshihiro Shimoda wrote:
> > Hello,
> >
> > > -----Original Message-----
> > > From: Sergei Shtylyov
> > > Sent: Saturday, September 30, 2017 7:24 PM
> > >
> > > Hello!
> > >
> > > On 9/29/2017 2:52 PM, Simon Horman wrote:
> > >
> > > > From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > >
> > > > This patch enables EthernetAVB for R-Car D3 draak board.
> > > >
> > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > > > ---
> > > > arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++++++++
> > > > 1 file changed, 25 insertions(+)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > > index 7b776cb7e928..96b7ff5cc321 100644
> > > > --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > > +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > [...]
> > > > @@ -37,6 +39,14 @@
> > > > };
> > > >
> > > > &pfc {
> > > > + avb0_pins: avb {
> > > > + mux {
> > > > + groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
> > > ^^^^^^^^^^^^^^
> > > Hum, I don't think it's compatible with routing the PHY interrupt via
> > > GPIO5_19 below. The driver doesn't support signalling via AVB_PHY_INT anyway.
> >
> > Oops! You're correct. I should drop "avb0_phy_int".
> >
> > Simon-san, may I send a follow-up patch to fix this?
>
> Thanks Sergei, thanks Shimoda-san,
>
> yes, please provide a follow-up patch.
>
> At this stage I don't think we need to re-spin this pull-request
> to fix this, rather a follow-up patch can be included
> in a follow-up pull request.
I got it. I will send it. Also, should I send salvator-common and ulcb patches
about Geert-san's comment (These dtsi files also enable "avb_phy_int" for now)?
Best regards,
Yoshihiro Shimoda
> >
> > Best regards,
> > Yoshihiro Shimoda
> >
> > > > + "avb0_mii";
> > > > + function = "avb0";
> > > > + };
> > > > + };
> > > > +
> > > > scif2_pins: scif2 {
> > > > groups = "scif2_data";
> > > > function = "scif2";
> > > > @@ -56,6 +66,21 @@
> > > > status = "okay";
> > > > };
> > > >
> > > > +&avb {
> > > > + pinctrl-0 = <&avb0_pins>;
> > > > + pinctrl-names = "default";
> > > > + renesas,no-ether-link;
> > > > + phy-handle = <&phy0>;
> > > > + status = "okay";
> > > > +
> > > > + phy0: ethernet-phy@0 {
> > > > + rxc-skew-ps = <1500>;
> > > > + reg = <0>;
> > > > + interrupt-parent = <&gpio5>;
> > > > + interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
> > > > + };
> > > > +};
> > > > +
> > > > &scif2 {
> > > > pinctrl-0 = <&scif2_pins>;
> > > > pinctrl-names = "default";
> > >
> > > MBR, Sergei
^ permalink raw reply [flat|nested] 66+ messages in thread* [PATCH 20/22] arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
@ 2017-10-02 9:16 ` Yoshihiro Shimoda
0 siblings, 0 replies; 66+ messages in thread
From: Yoshihiro Shimoda @ 2017-10-02 9:16 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon-san,
> -----Original Message-----
> From: Simon Horman
> Sent: Monday, October 2, 2017 4:15 PM
>
> On Mon, Oct 02, 2017 at 01:18:49AM +0000, Yoshihiro Shimoda wrote:
> > Hello,
> >
> > > -----Original Message-----
> > > From: Sergei Shtylyov
> > > Sent: Saturday, September 30, 2017 7:24 PM
> > >
> > > Hello!
> > >
> > > On 9/29/2017 2:52 PM, Simon Horman wrote:
> > >
> > > > From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > >
> > > > This patch enables EthernetAVB for R-Car D3 draak board.
> > > >
> > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > > > ---
> > > > arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++++++++
> > > > 1 file changed, 25 insertions(+)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > > index 7b776cb7e928..96b7ff5cc321 100644
> > > > --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > > +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > [...]
> > > > @@ -37,6 +39,14 @@
> > > > };
> > > >
> > > > &pfc {
> > > > + avb0_pins: avb {
> > > > + mux {
> > > > + groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
> > > ^^^^^^^^^^^^^^
> > > Hum, I don't think it's compatible with routing the PHY interrupt via
> > > GPIO5_19 below. The driver doesn't support signalling via AVB_PHY_INT anyway.
> >
> > Oops! You're correct. I should drop "avb0_phy_int".
> >
> > Simon-san, may I send a follow-up patch to fix this?
>
> Thanks Sergei, thanks Shimoda-san,
>
> yes, please provide a follow-up patch.
>
> At this stage I don't think we need to re-spin this pull-request
> to fix this, rather a follow-up patch can be included
> in a follow-up pull request.
I got it. I will send it. Also, should I send salvator-common and ulcb patches
about Geert-san's comment (These dtsi files also enable "avb_phy_int" for now)?
Best regards,
Yoshihiro Shimoda
> >
> > Best regards,
> > Yoshihiro Shimoda
> >
> > > > + "avb0_mii";
> > > > + function = "avb0";
> > > > + };
> > > > + };
> > > > +
> > > > scif2_pins: scif2 {
> > > > groups = "scif2_data";
> > > > function = "scif2";
> > > > @@ -56,6 +66,21 @@
> > > > status = "okay";
> > > > };
> > > >
> > > > +&avb {
> > > > + pinctrl-0 = <&avb0_pins>;
> > > > + pinctrl-names = "default";
> > > > + renesas,no-ether-link;
> > > > + phy-handle = <&phy0>;
> > > > + status = "okay";
> > > > +
> > > > + phy0: ethernet-phy at 0 {
> > > > + rxc-skew-ps = <1500>;
> > > > + reg = <0>;
> > > > + interrupt-parent = <&gpio5>;
> > > > + interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
> > > > + };
> > > > +};
> > > > +
> > > > &scif2 {
> > > > pinctrl-0 = <&scif2_pins>;
> > > > pinctrl-names = "default";
> > >
> > > MBR, Sergei
^ permalink raw reply [flat|nested] 66+ messages in thread* Re: [PATCH 20/22] arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
2017-10-02 9:16 ` Yoshihiro Shimoda
@ 2017-10-03 7:45 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-10-03 7:45 UTC (permalink / raw)
To: Yoshihiro Shimoda
Cc: Sergei Shtylyov, linux-arm-kernel, Magnus Damm, linux-renesas-soc
On Mon, Oct 02, 2017 at 09:16:56AM +0000, Yoshihiro Shimoda wrote:
> Hi Simon-san,
>
> > -----Original Message-----
> > From: Simon Horman
> > Sent: Monday, October 2, 2017 4:15 PM
> >
> > On Mon, Oct 02, 2017 at 01:18:49AM +0000, Yoshihiro Shimoda wrote:
> > > Hello,
> > >
> > > > -----Original Message-----
> > > > From: Sergei Shtylyov
> > > > Sent: Saturday, September 30, 2017 7:24 PM
> > > >
> > > > Hello!
> > > >
> > > > On 9/29/2017 2:52 PM, Simon Horman wrote:
> > > >
> > > > > From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > > >
> > > > > This patch enables EthernetAVB for R-Car D3 draak board.
> > > > >
> > > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > > > > ---
> > > > > arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++++++++
> > > > > 1 file changed, 25 insertions(+)
> > > > >
> > > > > diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > > > index 7b776cb7e928..96b7ff5cc321 100644
> > > > > --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > > > +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > > [...]
> > > > > @@ -37,6 +39,14 @@
> > > > > };
> > > > >
> > > > > &pfc {
> > > > > + avb0_pins: avb {
> > > > > + mux {
> > > > > + groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
> > > > ^^^^^^^^^^^^^^
> > > > Hum, I don't think it's compatible with routing the PHY interrupt via
> > > > GPIO5_19 below. The driver doesn't support signalling via AVB_PHY_INT anyway.
> > >
> > > Oops! You're correct. I should drop "avb0_phy_int".
> > >
> > > Simon-san, may I send a follow-up patch to fix this?
> >
> > Thanks Sergei, thanks Shimoda-san,
> >
> > yes, please provide a follow-up patch.
> >
> > At this stage I don't think we need to re-spin this pull-request
> > to fix this, rather a follow-up patch can be included
> > in a follow-up pull request.
>
> I got it. I will send it. Also, should I send salvator-common and ulcb patches
> about Geert-san's comment (These dtsi files also enable "avb_phy_int" for now)?
Hi Shimoda-san,
yes, I think that would be best.
Please include Fixes tags.
^ permalink raw reply [flat|nested] 66+ messages in thread* [PATCH 20/22] arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
@ 2017-10-03 7:45 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-10-03 7:45 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Oct 02, 2017 at 09:16:56AM +0000, Yoshihiro Shimoda wrote:
> Hi Simon-san,
>
> > -----Original Message-----
> > From: Simon Horman
> > Sent: Monday, October 2, 2017 4:15 PM
> >
> > On Mon, Oct 02, 2017 at 01:18:49AM +0000, Yoshihiro Shimoda wrote:
> > > Hello,
> > >
> > > > -----Original Message-----
> > > > From: Sergei Shtylyov
> > > > Sent: Saturday, September 30, 2017 7:24 PM
> > > >
> > > > Hello!
> > > >
> > > > On 9/29/2017 2:52 PM, Simon Horman wrote:
> > > >
> > > > > From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > > >
> > > > > This patch enables EthernetAVB for R-Car D3 draak board.
> > > > >
> > > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > > > > ---
> > > > > arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++++++++
> > > > > 1 file changed, 25 insertions(+)
> > > > >
> > > > > diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > > > index 7b776cb7e928..96b7ff5cc321 100644
> > > > > --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > > > +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
> > > > [...]
> > > > > @@ -37,6 +39,14 @@
> > > > > };
> > > > >
> > > > > &pfc {
> > > > > + avb0_pins: avb {
> > > > > + mux {
> > > > > + groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
> > > > ^^^^^^^^^^^^^^
> > > > Hum, I don't think it's compatible with routing the PHY interrupt via
> > > > GPIO5_19 below. The driver doesn't support signalling via AVB_PHY_INT anyway.
> > >
> > > Oops! You're correct. I should drop "avb0_phy_int".
> > >
> > > Simon-san, may I send a follow-up patch to fix this?
> >
> > Thanks Sergei, thanks Shimoda-san,
> >
> > yes, please provide a follow-up patch.
> >
> > At this stage I don't think we need to re-spin this pull-request
> > to fix this, rather a follow-up patch can be included
> > in a follow-up pull request.
>
> I got it. I will send it. Also, should I send salvator-common and ulcb patches
> about Geert-san's comment (These dtsi files also enable "avb_phy_int" for now)?
Hi Shimoda-san,
yes, I think that would be best.
Please include Fixes tags.
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PATCH 20/22] arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
2017-09-30 10:24 ` Sergei Shtylyov
@ 2017-10-02 7:21 ` Geert Uytterhoeven
-1 siblings, 0 replies; 66+ messages in thread
From: Geert Uytterhoeven @ 2017-10-02 7:21 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: Simon Horman, Linux-Renesas, linux-arm-kernel, Magnus Damm,
Yoshihiro Shimoda
Hi Sergei,
On Sat, Sep 30, 2017 at 12:24 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> On 9/29/2017 2:52 PM, Simon Horman wrote:
>> From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>>
>> This patch enables EthernetAVB for R-Car D3 draak board.
>>
>> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>
> [...]
>>
>> @@ -37,6 +39,14 @@
>> };
>> &pfc {
>> + avb0_pins: avb {
>> + mux {
>> + groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
>
> ^^^^^^^^^^^^^^
> Hum, I don't think it's compatible with routing the PHY interrupt via
> GPIO5_19 below. The driver doesn't support signalling via AVB_PHY_INT
> anyway.
Seems we have the same issue in arch/arm64/boot/dts/renesas/ulcb.dtsi and
arch/arm64/boot/dts/renesas/salvator-common.dtsi?
>> +&avb {
>> + phy0: ethernet-phy@0 {
>> + rxc-skew-ps = <1500>;
>> + reg = <0>;
>> + interrupt-parent = <&gpio5>;
>> + interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
>> + };
>> +};
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 66+ messages in thread* [PATCH 20/22] arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
@ 2017-10-02 7:21 ` Geert Uytterhoeven
0 siblings, 0 replies; 66+ messages in thread
From: Geert Uytterhoeven @ 2017-10-02 7:21 UTC (permalink / raw)
To: linux-arm-kernel
Hi Sergei,
On Sat, Sep 30, 2017 at 12:24 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> On 9/29/2017 2:52 PM, Simon Horman wrote:
>> From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>>
>> This patch enables EthernetAVB for R-Car D3 draak board.
>>
>> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>> --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>> +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
>
> [...]
>>
>> @@ -37,6 +39,14 @@
>> };
>> &pfc {
>> + avb0_pins: avb {
>> + mux {
>> + groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
>
> ^^^^^^^^^^^^^^
> Hum, I don't think it's compatible with routing the PHY interrupt via
> GPIO5_19 below. The driver doesn't support signalling via AVB_PHY_INT
> anyway.
Seems we have the same issue in arch/arm64/boot/dts/renesas/ulcb.dtsi and
arch/arm64/boot/dts/renesas/salvator-common.dtsi?
>> +&avb {
>> + phy0: ethernet-phy at 0 {
>> + rxc-skew-ps = <1500>;
>> + reg = <0>;
>> + interrupt-parent = <&gpio5>;
>> + interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
>> + };
>> +};
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 66+ messages in thread
* [PATCH 21/22] arm64: dts: renesas: r8a7795: add USB3.0 peripheral device node
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda, Simon Horman
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds USB3.0 peripheral channel 0 device node for r8a7795.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 5d5174d8635d..d5cfd1a1c539 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1471,6 +1471,17 @@
status = "disabled";
};
+ usb3_peri0: usb@ee020000 {
+ compatible = "renesas,r8a7795-usb3-peri",
+ "renesas,rcar-gen3-usb3-peri";
+ reg = <0 0xee020000 0 0x400>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
+ status = "disabled";
+ };
+
usb_dmac0: dma-controller@e65a0000 {
compatible = "renesas,r8a7795-usb-dmac",
"renesas,usb-dmac";
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 21/22] arm64: dts: renesas: r8a7795: add USB3.0 peripheral device node
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds USB3.0 peripheral channel 0 device node for r8a7795.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 5d5174d8635d..d5cfd1a1c539 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1471,6 +1471,17 @@
status = "disabled";
};
+ usb3_peri0: usb at ee020000 {
+ compatible = "renesas,r8a7795-usb3-peri",
+ "renesas,rcar-gen3-usb3-peri";
+ reg = <0 0xee020000 0 0x400>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
+ status = "disabled";
+ };
+
usb_dmac0: dma-controller at e65a0000 {
compatible = "renesas,r8a7795-usb-dmac",
"renesas,usb-dmac";
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PATCH 22/22] arm64: dts: renesas: r8a7796: add USB3.0 peripheral device node
2017-09-29 11:52 ` Simon Horman
@ 2017-09-29 11:52 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda, Simon Horman
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds USB3.0 peripheral channel 0 device node for r8a7796.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 16da83458f18..57ac5ca6ed98 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -1279,6 +1279,17 @@
status = "disabled";
};
+ usb3_peri0: usb@ee020000 {
+ compatible = "renesas,r8a7796-usb3-peri",
+ "renesas,rcar-gen3-usb3-peri";
+ reg = <0 0xee020000 0 0x400>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
+ status = "disabled";
+ };
+
ohci0: usb@ee080000 {
compatible = "generic-ohci";
reg = <0 0xee080000 0 0x100>;
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread* [PATCH 22/22] arm64: dts: renesas: r8a7796: add USB3.0 peripheral device node
@ 2017-09-29 11:52 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-09-29 11:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds USB3.0 peripheral channel 0 device node for r8a7796.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 16da83458f18..57ac5ca6ed98 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -1279,6 +1279,17 @@
status = "disabled";
};
+ usb3_peri0: usb at ee020000 {
+ compatible = "renesas,r8a7796-usb3-peri",
+ "renesas,rcar-gen3-usb3-peri";
+ reg = <0 0xee020000 0 0x400>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
+ status = "disabled";
+ };
+
ohci0: usb at ee080000 {
compatible = "generic-ohci";
reg = <0 0xee080000 0 0x100>;
--
2.1.4
^ permalink raw reply related [flat|nested] 66+ messages in thread
* Re: [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.15
2017-09-29 11:52 ` Simon Horman
@ 2017-10-19 21:39 ` Arnd Bergmann
-1 siblings, 0 replies; 66+ messages in thread
From: Arnd Bergmann @ 2017-10-19 21:39 UTC (permalink / raw)
To: Simon Horman
Cc: arm-soc, Linux-Renesas, Olof Johansson, Kevin Hilman, Linux ARM,
Magnus Damm
On Fri, Sep 29, 2017 at 1:52 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> ----------------------------------------------------------------
> Renesas ARM64 Based SoC DT Updates for v4.15
>
> * r8a7795 (H3)
> - Use r8a7795-cpg-mssr and r8a7795-sysc bindings
> Hardcoded indicies are replaced with symbols now that they are available
>
> - Drop bogus HDMI node name suffixes
> Laurent Pinchart says: Node names should not use numerical suffixes if
> the nodes can be distinguished by unit-address
>
> - Update PFC node name to pin-controller
> Shimoda-san says the PFC node name is changed "from e6060000.pfc and
> pfc@e6060000 to e6060000.pin-controller and pin-controller@e6060000
> like other Renesas SoCs."
>
> * r8a7795 (H3) ES1.0
> - Drop extra zero from XHCI unit address
> This corrects a typo were ee0400000 rather than ee040000 was used
> as the unit address.
>
> * r8a7796 (M3-W)
> - Add FDP1 instance
> Laurent Pinchart says: The r8a7796 has a single FDP1 instance.
>
> * r8a7795 (H3) and r8a7796 (M3-W) SoCs
> - Add USB3.0 peripheral device nodes
> Shimoda-san says that this is not enabled on the Salvator-X/XS boards
> for now as:
> + we need a special cable (USB type-A to A cross cable).
> + we can swap the role by renesas_usb3 driver even if we use a normal
> cable and after usb3.0 host is running, but I think it's a special
> use case.
>
> * r8a7795 (H3) and r8a7796 (M3-W) ULCB boards
> - Enable display output
> Laurent Pinchart says: The DU is already wired up to the HDMI encoder,
> all we need to do is enable it.
>
> * r8a77995 (D3) Draak board
> - Enable EthernetAVB and , USB2.0 Host and PHY
>
> - Add serial console pins.
> This is safe to do now that r8a77995 PFC driver support is present
>
> * r8a77970 (V3M)
> - Add basic support for SoC and EtherAVB, [H]SCIF and SYS-DMAC nodes
> This is a step towards enabling EtherAVB and [H]SCIF with SYS-DMAC
> in the Eagle board support for which is under review
Thanks for the detailed changelog!
> ----------------------------------------------------------------
> Geert Uytterhoeven (6):
> arm64: dts: renesas: r8a7795-es1: Drop extra zero from usb unit address
> arm64: dts: renesas: r8a7795: Drop bogus HDMI node names suffixes
> arm64: renesas: Add Renesas R8A77970 Kconfig support
That one last commit doesn't seem to belong in here, but I've pulled
it anyway, thanks!
Arnd
^ permalink raw reply [flat|nested] 66+ messages in thread* [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.15
@ 2017-10-19 21:39 ` Arnd Bergmann
0 siblings, 0 replies; 66+ messages in thread
From: Arnd Bergmann @ 2017-10-19 21:39 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Sep 29, 2017 at 1:52 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> ----------------------------------------------------------------
> Renesas ARM64 Based SoC DT Updates for v4.15
>
> * r8a7795 (H3)
> - Use r8a7795-cpg-mssr and r8a7795-sysc bindings
> Hardcoded indicies are replaced with symbols now that they are available
>
> - Drop bogus HDMI node name suffixes
> Laurent Pinchart says: Node names should not use numerical suffixes if
> the nodes can be distinguished by unit-address
>
> - Update PFC node name to pin-controller
> Shimoda-san says the PFC node name is changed "from e6060000.pfc and
> pfc at e6060000 to e6060000.pin-controller and pin-controller at e6060000
> like other Renesas SoCs."
>
> * r8a7795 (H3) ES1.0
> - Drop extra zero from XHCI unit address
> This corrects a typo were ee0400000 rather than ee040000 was used
> as the unit address.
>
> * r8a7796 (M3-W)
> - Add FDP1 instance
> Laurent Pinchart says: The r8a7796 has a single FDP1 instance.
>
> * r8a7795 (H3) and r8a7796 (M3-W) SoCs
> - Add USB3.0 peripheral device nodes
> Shimoda-san says that this is not enabled on the Salvator-X/XS boards
> for now as:
> + we need a special cable (USB type-A to A cross cable).
> + we can swap the role by renesas_usb3 driver even if we use a normal
> cable and after usb3.0 host is running, but I think it's a special
> use case.
>
> * r8a7795 (H3) and r8a7796 (M3-W) ULCB boards
> - Enable display output
> Laurent Pinchart says: The DU is already wired up to the HDMI encoder,
> all we need to do is enable it.
>
> * r8a77995 (D3) Draak board
> - Enable EthernetAVB and , USB2.0 Host and PHY
>
> - Add serial console pins.
> This is safe to do now that r8a77995 PFC driver support is present
>
> * r8a77970 (V3M)
> - Add basic support for SoC and EtherAVB, [H]SCIF and SYS-DMAC nodes
> This is a step towards enabling EtherAVB and [H]SCIF with SYS-DMAC
> in the Eagle board support for which is under review
Thanks for the detailed changelog!
> ----------------------------------------------------------------
> Geert Uytterhoeven (6):
> arm64: dts: renesas: r8a7795-es1: Drop extra zero from usb unit address
> arm64: dts: renesas: r8a7795: Drop bogus HDMI node names suffixes
> arm64: renesas: Add Renesas R8A77970 Kconfig support
That one last commit doesn't seem to belong in here, but I've pulled
it anyway, thanks!
Arnd
^ permalink raw reply [flat|nested] 66+ messages in thread* Re: [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.15
2017-10-19 21:39 ` Arnd Bergmann
@ 2017-10-20 9:03 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-10-20 9:03 UTC (permalink / raw)
To: Arnd Bergmann
Cc: arm-soc, Linux-Renesas, Olof Johansson, Kevin Hilman, Linux ARM,
Magnus Damm
On Thu, Oct 19, 2017 at 11:39:45PM +0200, Arnd Bergmann wrote:
> On Fri, Sep 29, 2017 at 1:52 PM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> > ----------------------------------------------------------------
> > Renesas ARM64 Based SoC DT Updates for v4.15
> >
> > * r8a7795 (H3)
> > - Use r8a7795-cpg-mssr and r8a7795-sysc bindings
> > Hardcoded indicies are replaced with symbols now that they are available
> >
> > - Drop bogus HDMI node name suffixes
> > Laurent Pinchart says: Node names should not use numerical suffixes if
> > the nodes can be distinguished by unit-address
> >
> > - Update PFC node name to pin-controller
> > Shimoda-san says the PFC node name is changed "from e6060000.pfc and
> > pfc@e6060000 to e6060000.pin-controller and pin-controller@e6060000
> > like other Renesas SoCs."
> >
> > * r8a7795 (H3) ES1.0
> > - Drop extra zero from XHCI unit address
> > This corrects a typo were ee0400000 rather than ee040000 was used
> > as the unit address.
> >
> > * r8a7796 (M3-W)
> > - Add FDP1 instance
> > Laurent Pinchart says: The r8a7796 has a single FDP1 instance.
> >
> > * r8a7795 (H3) and r8a7796 (M3-W) SoCs
> > - Add USB3.0 peripheral device nodes
> > Shimoda-san says that this is not enabled on the Salvator-X/XS boards
> > for now as:
> > + we need a special cable (USB type-A to A cross cable).
> > + we can swap the role by renesas_usb3 driver even if we use a normal
> > cable and after usb3.0 host is running, but I think it's a special
> > use case.
> >
> > * r8a7795 (H3) and r8a7796 (M3-W) ULCB boards
> > - Enable display output
> > Laurent Pinchart says: The DU is already wired up to the HDMI encoder,
> > all we need to do is enable it.
> >
> > * r8a77995 (D3) Draak board
> > - Enable EthernetAVB and , USB2.0 Host and PHY
> >
> > - Add serial console pins.
> > This is safe to do now that r8a77995 PFC driver support is present
> >
> > * r8a77970 (V3M)
> > - Add basic support for SoC and EtherAVB, [H]SCIF and SYS-DMAC nodes
> > This is a step towards enabling EtherAVB and [H]SCIF with SYS-DMAC
> > in the Eagle board support for which is under review
>
> Thanks for the detailed changelog!
>
> > ----------------------------------------------------------------
> > Geert Uytterhoeven (6):
> > arm64: dts: renesas: r8a7795-es1: Drop extra zero from usb unit address
> > arm64: dts: renesas: r8a7795: Drop bogus HDMI node names suffixes
> > arm64: renesas: Add Renesas R8A77970 Kconfig support
>
> That one last commit doesn't seem to belong in here, but I've pulled
> it anyway, thanks!
Thanks! I take it you would have prefered this in an soc branch?
^ permalink raw reply [flat|nested] 66+ messages in thread
* [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.15
@ 2017-10-20 9:03 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-10-20 9:03 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Oct 19, 2017 at 11:39:45PM +0200, Arnd Bergmann wrote:
> On Fri, Sep 29, 2017 at 1:52 PM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> > ----------------------------------------------------------------
> > Renesas ARM64 Based SoC DT Updates for v4.15
> >
> > * r8a7795 (H3)
> > - Use r8a7795-cpg-mssr and r8a7795-sysc bindings
> > Hardcoded indicies are replaced with symbols now that they are available
> >
> > - Drop bogus HDMI node name suffixes
> > Laurent Pinchart says: Node names should not use numerical suffixes if
> > the nodes can be distinguished by unit-address
> >
> > - Update PFC node name to pin-controller
> > Shimoda-san says the PFC node name is changed "from e6060000.pfc and
> > pfc at e6060000 to e6060000.pin-controller and pin-controller at e6060000
> > like other Renesas SoCs."
> >
> > * r8a7795 (H3) ES1.0
> > - Drop extra zero from XHCI unit address
> > This corrects a typo were ee0400000 rather than ee040000 was used
> > as the unit address.
> >
> > * r8a7796 (M3-W)
> > - Add FDP1 instance
> > Laurent Pinchart says: The r8a7796 has a single FDP1 instance.
> >
> > * r8a7795 (H3) and r8a7796 (M3-W) SoCs
> > - Add USB3.0 peripheral device nodes
> > Shimoda-san says that this is not enabled on the Salvator-X/XS boards
> > for now as:
> > + we need a special cable (USB type-A to A cross cable).
> > + we can swap the role by renesas_usb3 driver even if we use a normal
> > cable and after usb3.0 host is running, but I think it's a special
> > use case.
> >
> > * r8a7795 (H3) and r8a7796 (M3-W) ULCB boards
> > - Enable display output
> > Laurent Pinchart says: The DU is already wired up to the HDMI encoder,
> > all we need to do is enable it.
> >
> > * r8a77995 (D3) Draak board
> > - Enable EthernetAVB and , USB2.0 Host and PHY
> >
> > - Add serial console pins.
> > This is safe to do now that r8a77995 PFC driver support is present
> >
> > * r8a77970 (V3M)
> > - Add basic support for SoC and EtherAVB, [H]SCIF and SYS-DMAC nodes
> > This is a step towards enabling EtherAVB and [H]SCIF with SYS-DMAC
> > in the Eagle board support for which is under review
>
> Thanks for the detailed changelog!
>
> > ----------------------------------------------------------------
> > Geert Uytterhoeven (6):
> > arm64: dts: renesas: r8a7795-es1: Drop extra zero from usb unit address
> > arm64: dts: renesas: r8a7795: Drop bogus HDMI node names suffixes
> > arm64: renesas: Add Renesas R8A77970 Kconfig support
>
> That one last commit doesn't seem to belong in here, but I've pulled
> it anyway, thanks!
Thanks! I take it you would have prefered this in an soc branch?
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.15
2017-10-20 9:03 ` Simon Horman
@ 2017-10-20 9:06 ` Arnd Bergmann
-1 siblings, 0 replies; 66+ messages in thread
From: Arnd Bergmann @ 2017-10-20 9:06 UTC (permalink / raw)
To: Simon Horman
Cc: arm-soc, Linux-Renesas, Olof Johansson, Kevin Hilman, Linux ARM,
Magnus Damm
On Fri, Oct 20, 2017 at 11:03 AM, Simon Horman <horms@verge.net.au> wrote:
> On Thu, Oct 19, 2017 at 11:39:45PM +0200, Arnd Bergmann wrote:
>> On Fri, Sep 29, 2017 at 1:52 PM, Simon Horman
>> That one last commit doesn't seem to belong in here, but I've pulled
>> it anyway, thanks!
>
> Thanks! I take it you would have prefered this in an soc branch?
Yes, correct.
Arnd
^ permalink raw reply [flat|nested] 66+ messages in thread* [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.15
@ 2017-10-20 9:06 ` Arnd Bergmann
0 siblings, 0 replies; 66+ messages in thread
From: Arnd Bergmann @ 2017-10-20 9:06 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Oct 20, 2017 at 11:03 AM, Simon Horman <horms@verge.net.au> wrote:
> On Thu, Oct 19, 2017 at 11:39:45PM +0200, Arnd Bergmann wrote:
>> On Fri, Sep 29, 2017 at 1:52 PM, Simon Horman
>> That one last commit doesn't seem to belong in here, but I've pulled
>> it anyway, thanks!
>
> Thanks! I take it you would have prefered this in an soc branch?
Yes, correct.
Arnd
^ permalink raw reply [flat|nested] 66+ messages in thread* Re: [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.15
2017-10-20 9:06 ` Arnd Bergmann
@ 2017-10-20 9:28 ` Simon Horman
-1 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-10-20 9:28 UTC (permalink / raw)
To: Arnd Bergmann
Cc: arm-soc, Linux-Renesas, Olof Johansson, Kevin Hilman, Linux ARM,
Magnus Damm
On Fri, Oct 20, 2017 at 11:06:56AM +0200, Arnd Bergmann wrote:
> On Fri, Oct 20, 2017 at 11:03 AM, Simon Horman <horms@verge.net.au> wrote:
> > On Thu, Oct 19, 2017 at 11:39:45PM +0200, Arnd Bergmann wrote:
> >> On Fri, Sep 29, 2017 at 1:52 PM, Simon Horman
>
> >> That one last commit doesn't seem to belong in here, but I've pulled
> >> it anyway, thanks!
> >
> > Thanks! I take it you would have prefered this in an soc branch?
>
> Yes, correct.
Understood and noted for next time.
^ permalink raw reply [flat|nested] 66+ messages in thread
* [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.15
@ 2017-10-20 9:28 ` Simon Horman
0 siblings, 0 replies; 66+ messages in thread
From: Simon Horman @ 2017-10-20 9:28 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Oct 20, 2017 at 11:06:56AM +0200, Arnd Bergmann wrote:
> On Fri, Oct 20, 2017 at 11:03 AM, Simon Horman <horms@verge.net.au> wrote:
> > On Thu, Oct 19, 2017 at 11:39:45PM +0200, Arnd Bergmann wrote:
> >> On Fri, Sep 29, 2017 at 1:52 PM, Simon Horman
>
> >> That one last commit doesn't seem to belong in here, but I've pulled
> >> it anyway, thanks!
> >
> > Thanks! I take it you would have prefered this in an soc branch?
>
> Yes, correct.
Understood and noted for next time.
^ permalink raw reply [flat|nested] 66+ messages in thread