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* [PATCH] riscv: Make RISCV_TIMER depends on RISCV_SBI
@ 2020-10-28 13:12 Kefeng Wang
  2020-11-06  7:14 ` Palmer Dabbelt
  2020-12-03 23:47 ` [tip: timers/core] clocksource/drivers/riscv: " tip-bot2 for Kefeng Wang
  0 siblings, 2 replies; 4+ messages in thread
From: Kefeng Wang @ 2020-10-28 13:12 UTC (permalink / raw)
  To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Daniel Lezcano, linux-riscv
  Cc: Kefeng Wang

The riscv timer is set via SBI timer call, let's make RISCV_TIMER
depends on RISCV_SBI, and it also fixes some build issue.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
---
 drivers/clocksource/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 68b087bff59c..2be849bb794a 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -654,7 +654,7 @@ config ATCPIT100_TIMER
 
 config RISCV_TIMER
 	bool "Timer for the RISC-V platform" if COMPILE_TEST
-	depends on GENERIC_SCHED_CLOCK && RISCV
+	depends on GENERIC_SCHED_CLOCK && RISCV && RISCV_SBI
 	select TIMER_PROBE
 	select TIMER_OF
 	help
-- 
2.26.2


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^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH] riscv: Make RISCV_TIMER depends on RISCV_SBI
  2020-10-28 13:12 [PATCH] riscv: Make RISCV_TIMER depends on RISCV_SBI Kefeng Wang
@ 2020-11-06  7:14 ` Palmer Dabbelt
  2020-11-27  2:53   ` Kefeng Wang
  2020-12-03 23:47 ` [tip: timers/core] clocksource/drivers/riscv: " tip-bot2 for Kefeng Wang
  1 sibling, 1 reply; 4+ messages in thread
From: Palmer Dabbelt @ 2020-11-06  7:14 UTC (permalink / raw)
  To: wangkefeng.wang
  Cc: wangkefeng.wang, linux-riscv, aou, daniel.lezcano, Paul Walmsley

On Wed, 28 Oct 2020 06:12:30 PDT (-0700), wangkefeng.wang@huawei.com wrote:
> The riscv timer is set via SBI timer call, let's make RISCV_TIMER
> depends on RISCV_SBI, and it also fixes some build issue.
>
> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
> ---
>  drivers/clocksource/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index 68b087bff59c..2be849bb794a 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -654,7 +654,7 @@ config ATCPIT100_TIMER
>
>  config RISCV_TIMER
>  	bool "Timer for the RISC-V platform" if COMPILE_TEST
> -	depends on GENERIC_SCHED_CLOCK && RISCV
> +	depends on GENERIC_SCHED_CLOCK && RISCV && RISCV_SBI
>  	select TIMER_PROBE
>  	select TIMER_OF
>  	help

This should probably be

Fixes: 2bc3fc877aa9 ("RISC-V: Remove CLINT related code from timer and arch")

not really a bug in that commit, but since then the memory-mapped and SBI
timers have been split and therefor there's no way this driver can do anything
without SBI support.

Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>

Thanks!

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^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] riscv: Make RISCV_TIMER depends on RISCV_SBI
  2020-11-06  7:14 ` Palmer Dabbelt
@ 2020-11-27  2:53   ` Kefeng Wang
  0 siblings, 0 replies; 4+ messages in thread
From: Kefeng Wang @ 2020-11-27  2:53 UTC (permalink / raw)
  To: Palmer Dabbelt; +Cc: linux-riscv, aou, daniel.lezcano, Paul Walmsley

Hi Daniel, ping...

On 2020/11/6 15:14, Palmer Dabbelt wrote:
> On Wed, 28 Oct 2020 06:12:30 PDT (-0700), wangkefeng.wang@huawei.com 
> wrote:
>> The riscv timer is set via SBI timer call, let's make RISCV_TIMER
>> depends on RISCV_SBI, and it also fixes some build issue.
>>
>> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
>> ---
>>  drivers/clocksource/Kconfig | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
>> index 68b087bff59c..2be849bb794a 100644
>> --- a/drivers/clocksource/Kconfig
>> +++ b/drivers/clocksource/Kconfig
>> @@ -654,7 +654,7 @@ config ATCPIT100_TIMER
>>
>>  config RISCV_TIMER
>>      bool "Timer for the RISC-V platform" if COMPILE_TEST
>> -    depends on GENERIC_SCHED_CLOCK && RISCV
>> +    depends on GENERIC_SCHED_CLOCK && RISCV && RISCV_SBI
>>      select TIMER_PROBE
>>      select TIMER_OF
>>      help
>
> This should probably be
>
> Fixes: 2bc3fc877aa9 ("RISC-V: Remove CLINT related code from timer and 
> arch")
>
> not really a bug in that commit, but since then the memory-mapped and SBI
> timers have been split and therefor there's no way this driver can do 
> anything
> without SBI support.
>
> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
>
> Thanks!
>

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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [tip: timers/core] clocksource/drivers/riscv: Make RISCV_TIMER depends on RISCV_SBI
  2020-10-28 13:12 [PATCH] riscv: Make RISCV_TIMER depends on RISCV_SBI Kefeng Wang
  2020-11-06  7:14 ` Palmer Dabbelt
@ 2020-12-03 23:47 ` tip-bot2 for Kefeng Wang
  1 sibling, 0 replies; 4+ messages in thread
From: tip-bot2 for Kefeng Wang @ 2020-12-03 23:47 UTC (permalink / raw)
  To: linux-tip-commits
  Cc: Kefeng Wang, Palmer Dabbelt, Daniel Lezcano, x86, linux-kernel

The following commit has been merged into the timers/core branch of tip:

Commit-ID:     ab3105446f1ec4e98fadfc998ee24feec271c16c
Gitweb:        https://git.kernel.org/tip/ab3105446f1ec4e98fadfc998ee24feec271c16c
Author:        Kefeng Wang <wangkefeng.wang@huawei.com>
AuthorDate:    Wed, 28 Oct 2020 21:12:30 +08:00
Committer:     Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Thu, 03 Dec 2020 19:16:26 +01:00

clocksource/drivers/riscv: Make RISCV_TIMER depends on RISCV_SBI

The riscv timer is set via SBI timer call, let's make RISCV_TIMER
depends on RISCV_SBI, and it also fixes some build issue.

Fixes: d5be89a8d118 ("RISC-V: Resurrect the MMIO timer implementation for M-mode systems")
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20201028131230.72907-1-wangkefeng.wang@huawei.com
---
 drivers/clocksource/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 390c27c..9f00b83 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -644,7 +644,7 @@ config ATCPIT100_TIMER
 
 config RISCV_TIMER
 	bool "Timer for the RISC-V platform" if COMPILE_TEST
-	depends on GENERIC_SCHED_CLOCK && RISCV
+	depends on GENERIC_SCHED_CLOCK && RISCV && RISCV_SBI
 	select TIMER_PROBE
 	select TIMER_OF
 	help

^ permalink raw reply related	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2020-12-03 23:48 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-28 13:12 [PATCH] riscv: Make RISCV_TIMER depends on RISCV_SBI Kefeng Wang
2020-11-06  7:14 ` Palmer Dabbelt
2020-11-27  2:53   ` Kefeng Wang
2020-12-03 23:47 ` [tip: timers/core] clocksource/drivers/riscv: " tip-bot2 for Kefeng Wang

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