From: sathyanarayanan kuppuswamy <sathyanarayanan.kuppuswamy@linux.intel.com> To: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com> Cc: andy@infradead.org, qipeng.zha@intel.com, dvhart@infradead.org, linux@roeck-us.net, wim@iguana.be, sathyaosid@gmail.com, david.e.box@linux.intel.com, platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org Subject: Re: [PATCH v3 4/5] platform/x86: intel_pmc_ipc: Fix iTCO GCS memory mapping failure Date: Fri, 31 Mar 2017 10:22:26 -0700 [thread overview] Message-ID: <2abb78ba-3b61-c9ed-7211-f7b8bf09c791@linux.intel.com> (raw) In-Reply-To: <20170331140137.GD23725@rajaneesh-OptiPlex-9010> On 03/31/2017 07:01 AM, Rajneesh Bhardwaj wrote: > On Fri, Mar 17, 2017 at 07:06:21PM -0700, Kuppuswamy Sathyanarayanan wrote: >> iTCO watchdog driver need access to PMC_CFG GCR register to modify >> the no reboot setting. Currently, this is done by passing PMC_CFG reg >> address as memory resource to watchdog driver and allowing it directly >> modify the PMC_CFG register. But currently PMC driver also has >> requirement to memory map the entire GCR register space in this driver. >> This causes mem request failure in watchdog driver. So this patch fixes >> this issue by adding api to update noreboot flag and passes them >> to watchdog driver via platform data. >> >> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> >> --- >> drivers/platform/x86/intel_pmc_ipc.c | 20 ++++++++++---------- >> 1 file changed, 10 insertions(+), 10 deletions(-) >> >> Changes since v2: >> * Added support for update_noreboot_bit api. >> >> diff --git a/drivers/platform/x86/intel_pmc_ipc.c b/drivers/platform/x86/intel_pmc_ipc.c >> index ea5579e..0c66c11 100644 >> --- a/drivers/platform/x86/intel_pmc_ipc.c >> +++ b/drivers/platform/x86/intel_pmc_ipc.c >> @@ -126,7 +126,6 @@ static struct intel_pmc_ipc_dev { >> struct platform_device *tco_dev; >> >> /* gcr */ >> - resource_size_t gcr_base; >> void __iomem *gcr_mem_base; >> int gcr_size; >> bool has_gcr_regs; >> @@ -254,6 +253,15 @@ int intel_pmc_gcr_update(u32 offset, u32 mask, u32 val) >> } >> EXPORT_SYMBOL_GPL(intel_pmc_gcr_update); >> >> +static int update_noreboot_bit(bool status) >> +{ >> + if (status) >> + return intel_pmc_gcr_update(PMC_GCR_PMC_CFG_REG, BIT(4), >> + BIT(4)); >> + else >> + return intel_pmc_gcr_update(PMC_GCR_PMC_CFG_REG, BIT(4), 0); >> +} >> + > I think bit 4 will hold good only when TCO version is 3. What about the > other cases? Tested it on APL and it worked fine. Setting bit 4 will work for both version 3 and 5. Currently this driver only handles wdt device creation for APL platform. For APL, WDT version is 5 and hence this fix should work fine. For other cases, currently iTCO_wdt driver still uses the memory mapped reboot setting. > >> static int intel_pmc_ipc_check_status(void) >> { >> int status; >> @@ -571,15 +579,12 @@ static struct resource tco_res[] = { >> { >> .flags = IORESOURCE_IO, >> }, >> - /* GCS */ >> - { >> - .flags = IORESOURCE_MEM, >> - }, >> }; >> >> static struct itco_wdt_platform_data tco_info = { >> .name = "Apollo Lake SoC", >> .version = 5, >> + .update_noreboot_flag = update_noreboot_bit, >> }; >> >> #define TELEMETRY_RESOURCE_PUNIT_SSRAM 0 >> @@ -636,10 +641,6 @@ static int ipc_create_tco_device(void) >> res->start = ipcdev.acpi_io_base + SMI_EN_OFFSET; >> res->end = res->start + SMI_EN_SIZE - 1; >> >> - res = tco_res + TCO_RESOURCE_GCR_MEM; >> - res->start = ipcdev.gcr_base + TCO_PMC_OFFSET; >> - res->end = res->start + TCO_PMC_SIZE - 1; >> - >> pdev = platform_device_register_full(&pdevinfo); >> if (IS_ERR(pdev)) >> return PTR_ERR(pdev); >> @@ -801,7 +802,6 @@ static int ipc_plat_get_res(struct platform_device *pdev) >> } >> ipcdev.ipc_base = addr; >> >> - ipcdev.gcr_base = res->start + PLAT_RESOURCE_GCR_OFFSET; >> ipcdev.gcr_mem_base = addr + PLAT_RESOURCE_GCR_OFFSET; >> ipcdev.gcr_size = PLAT_RESOURCE_GCR_SIZE; >> dev_info(&pdev->dev, "ipc res: %pR\n", res); >> -- >> 2.7.4 >> -- Sathyanarayanan Kuppuswamy Android kernel developer
WARNING: multiple messages have this Message-ID (diff)
From: sathyanarayanan kuppuswamy <sathyanarayanan.kuppuswamy-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> To: Rajneesh Bhardwaj <rajneesh.bhardwaj-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> Cc: andy-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org, qipeng.zha-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, dvhart-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org, linux-0h96xk9xTtrk1uMJSBkQmQ@public.gmane.org, wim-IQzOog9fTRqzQB+pC5nmwQ@public.gmane.org, sathyaosid-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, david.e.box-VuQAYsv1563Yd54FQh9/CA@public.gmane.org, platform-driver-x86-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Subject: Re: [PATCH v3 4/5] platform/x86: intel_pmc_ipc: Fix iTCO GCS memory mapping failure Date: Fri, 31 Mar 2017 10:22:26 -0700 [thread overview] Message-ID: <2abb78ba-3b61-c9ed-7211-f7b8bf09c791@linux.intel.com> (raw) In-Reply-To: <20170331140137.GD23725@rajaneesh-OptiPlex-9010> On 03/31/2017 07:01 AM, Rajneesh Bhardwaj wrote: > On Fri, Mar 17, 2017 at 07:06:21PM -0700, Kuppuswamy Sathyanarayanan wrote: >> iTCO watchdog driver need access to PMC_CFG GCR register to modify >> the no reboot setting. Currently, this is done by passing PMC_CFG reg >> address as memory resource to watchdog driver and allowing it directly >> modify the PMC_CFG register. But currently PMC driver also has >> requirement to memory map the entire GCR register space in this driver. >> This causes mem request failure in watchdog driver. So this patch fixes >> this issue by adding api to update noreboot flag and passes them >> to watchdog driver via platform data. >> >> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> >> --- >> drivers/platform/x86/intel_pmc_ipc.c | 20 ++++++++++---------- >> 1 file changed, 10 insertions(+), 10 deletions(-) >> >> Changes since v2: >> * Added support for update_noreboot_bit api. >> >> diff --git a/drivers/platform/x86/intel_pmc_ipc.c b/drivers/platform/x86/intel_pmc_ipc.c >> index ea5579e..0c66c11 100644 >> --- a/drivers/platform/x86/intel_pmc_ipc.c >> +++ b/drivers/platform/x86/intel_pmc_ipc.c >> @@ -126,7 +126,6 @@ static struct intel_pmc_ipc_dev { >> struct platform_device *tco_dev; >> >> /* gcr */ >> - resource_size_t gcr_base; >> void __iomem *gcr_mem_base; >> int gcr_size; >> bool has_gcr_regs; >> @@ -254,6 +253,15 @@ int intel_pmc_gcr_update(u32 offset, u32 mask, u32 val) >> } >> EXPORT_SYMBOL_GPL(intel_pmc_gcr_update); >> >> +static int update_noreboot_bit(bool status) >> +{ >> + if (status) >> + return intel_pmc_gcr_update(PMC_GCR_PMC_CFG_REG, BIT(4), >> + BIT(4)); >> + else >> + return intel_pmc_gcr_update(PMC_GCR_PMC_CFG_REG, BIT(4), 0); >> +} >> + > I think bit 4 will hold good only when TCO version is 3. What about the > other cases? Tested it on APL and it worked fine. Setting bit 4 will work for both version 3 and 5. Currently this driver only handles wdt device creation for APL platform. For APL, WDT version is 5 and hence this fix should work fine. For other cases, currently iTCO_wdt driver still uses the memory mapped reboot setting. > >> static int intel_pmc_ipc_check_status(void) >> { >> int status; >> @@ -571,15 +579,12 @@ static struct resource tco_res[] = { >> { >> .flags = IORESOURCE_IO, >> }, >> - /* GCS */ >> - { >> - .flags = IORESOURCE_MEM, >> - }, >> }; >> >> static struct itco_wdt_platform_data tco_info = { >> .name = "Apollo Lake SoC", >> .version = 5, >> + .update_noreboot_flag = update_noreboot_bit, >> }; >> >> #define TELEMETRY_RESOURCE_PUNIT_SSRAM 0 >> @@ -636,10 +641,6 @@ static int ipc_create_tco_device(void) >> res->start = ipcdev.acpi_io_base + SMI_EN_OFFSET; >> res->end = res->start + SMI_EN_SIZE - 1; >> >> - res = tco_res + TCO_RESOURCE_GCR_MEM; >> - res->start = ipcdev.gcr_base + TCO_PMC_OFFSET; >> - res->end = res->start + TCO_PMC_SIZE - 1; >> - >> pdev = platform_device_register_full(&pdevinfo); >> if (IS_ERR(pdev)) >> return PTR_ERR(pdev); >> @@ -801,7 +802,6 @@ static int ipc_plat_get_res(struct platform_device *pdev) >> } >> ipcdev.ipc_base = addr; >> >> - ipcdev.gcr_base = res->start + PLAT_RESOURCE_GCR_OFFSET; >> ipcdev.gcr_mem_base = addr + PLAT_RESOURCE_GCR_OFFSET; >> ipcdev.gcr_size = PLAT_RESOURCE_GCR_SIZE; >> dev_info(&pdev->dev, "ipc res: %pR\n", res); >> -- >> 2.7.4 >> -- Sathyanarayanan Kuppuswamy Android kernel developer -- To unsubscribe from this list: send the line "unsubscribe linux-watchdog" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
next prev parent reply other threads:[~2017-03-31 17:26 UTC|newest] Thread overview: 120+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-03-18 2:06 [PATCH v3 1/5] platform/x86: intel_pmc_ipc: fix gcr offset Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` [PATCH v3 2/5] platform/x86: intel_pmc_ipc: Add pmc gcr read/write/update api's Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` Kuppuswamy Sathyanarayanan 2017-03-31 13:47 ` Rajneesh Bhardwaj 2017-03-31 13:47 ` Rajneesh Bhardwaj 2017-03-18 2:06 ` [PATCH v3 3/5] watchdog: iTCO_wdt: Add PMC specific noreboot update api Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` Kuppuswamy Sathyanarayanan 2017-03-28 9:12 ` [v3,3/5] " Guenter Roeck 2017-03-28 9:12 ` Guenter Roeck 2017-03-28 9:12 ` Guenter Roeck 2017-03-18 2:06 ` [PATCH v3 4/5] platform/x86: intel_pmc_ipc: Fix iTCO GCS memory mapping failure Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` Kuppuswamy Sathyanarayanan 2017-03-31 14:01 ` Rajneesh Bhardwaj 2017-03-31 14:01 ` Rajneesh Bhardwaj 2017-03-31 17:22 ` sathyanarayanan kuppuswamy [this message] 2017-03-31 17:22 ` sathyanarayanan kuppuswamy 2017-03-31 17:22 ` sathyanarayanan kuppuswamy 2017-03-18 2:06 ` [PATCH v3 5/5] platform/x86: intel_pmc_ipc: use gcr mem base for S0ix counter read Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` Kuppuswamy Sathyanarayanan 2017-03-31 13:54 ` Rajneesh Bhardwaj 2017-03-31 13:54 ` Rajneesh Bhardwaj 2017-03-31 13:54 ` Rajneesh Bhardwaj 2017-03-31 15:08 ` Shanth Murthy 2017-03-31 15:08 ` Shanth Murthy 2017-03-31 13:37 ` [PATCH v3 1/5] platform/x86: intel_pmc_ipc: fix gcr offset Rajneesh Bhardwaj 2017-03-31 13:37 ` Rajneesh Bhardwaj 2017-03-31 23:27 ` [PATCH v4 " Kuppuswamy Sathyanarayanan 2017-03-31 23:27 ` Kuppuswamy Sathyanarayanan 2017-03-31 23:27 ` [PATCH v4 2/5] platform/x86: intel_pmc_ipc: Add pmc gcr read/write/update api's Kuppuswamy Sathyanarayanan 2017-03-31 23:27 ` Kuppuswamy Sathyanarayanan 2017-04-02 13:58 ` Andy Shevchenko 2017-04-02 13:58 ` Andy Shevchenko 2017-04-03 1:51 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-03 1:51 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-03 1:51 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-04 13:23 ` Andy Shevchenko 2017-04-04 13:23 ` Andy Shevchenko 2017-04-04 20:14 ` sathyanarayanan kuppuswamy 2017-04-04 20:14 ` sathyanarayanan kuppuswamy 2017-03-31 23:27 ` [PATCH v4 3/5] watchdog: iTCO_wdt: Add PMC specific noreboot update api Kuppuswamy Sathyanarayanan 2017-03-31 23:27 ` Kuppuswamy Sathyanarayanan 2017-03-31 23:27 ` Kuppuswamy Sathyanarayanan 2017-04-02 14:04 ` Andy Shevchenko 2017-04-02 14:04 ` Andy Shevchenko 2017-04-03 1:55 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-03 1:55 ` Sathyanarayanan Kuppuswamy Natarajan 2017-03-31 23:27 ` [PATCH v4 4/5] platform/x86: intel_pmc_ipc: Fix iTCO GCS memory mapping failure Kuppuswamy Sathyanarayanan 2017-03-31 23:27 ` Kuppuswamy Sathyanarayanan 2017-04-02 14:10 ` Andy Shevchenko 2017-04-02 14:10 ` Andy Shevchenko 2017-04-03 1:53 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-03 1:53 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-03 1:53 ` Sathyanarayanan Kuppuswamy Natarajan 2017-03-31 23:27 ` [PATCH v4 5/5] platform/x86: intel_pmc_ipc: use gcr mem base for S0ix counter read Kuppuswamy Sathyanarayanan 2017-03-31 23:27 ` Kuppuswamy Sathyanarayanan 2017-04-02 14:11 ` [PATCH v4 1/5] platform/x86: intel_pmc_ipc: fix gcr offset Andy Shevchenko 2017-04-02 14:11 ` Andy Shevchenko 2017-04-02 14:11 ` Andy Shevchenko 2017-04-03 1:51 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-03 1:51 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-03 1:51 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-04 0:24 ` [PATCH v5 1/6] " Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` [PATCH v5 2/6] platform/x86: intel_pmc_ipc: Add pmc gcr read/write/update api's Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 13:53 ` Andy Shevchenko 2017-04-04 13:53 ` Andy Shevchenko 2017-04-04 22:07 ` sathyanarayanan kuppuswamy 2017-04-04 22:07 ` sathyanarayanan kuppuswamy 2017-04-04 22:07 ` sathyanarayanan kuppuswamy 2017-04-04 0:24 ` [PATCH v5 3/6] watchdog: iTCO_wdt: Add PMC specific noreboot update api Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 13:48 ` Andy Shevchenko 2017-04-04 13:48 ` Andy Shevchenko 2017-04-04 0:24 ` [PATCH v5 4/6] watchdog: iTCO_wdt: cleanup set/unset no_reboot calls Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 3:22 ` Guenter Roeck 2017-04-04 3:22 ` Guenter Roeck 2017-04-04 3:22 ` Guenter Roeck 2017-04-04 13:49 ` Andy Shevchenko 2017-04-04 13:49 ` Andy Shevchenko 2017-04-04 0:24 ` [PATCH v5 5/6] platform/x86: intel_pmc_ipc: Fix iTCO_wdt GCS memory mapping failure Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 13:53 ` Andy Shevchenko 2017-04-04 13:53 ` Andy Shevchenko 2017-04-04 0:24 ` [PATCH v5 6/6] platform/x86: intel_pmc_ipc: use gcr mem base for S0ix counter read Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 13:51 ` Andy Shevchenko 2017-04-04 13:51 ` Andy Shevchenko 2017-04-04 22:15 ` sathyanarayanan kuppuswamy 2017-04-04 22:15 ` sathyanarayanan kuppuswamy 2017-04-04 22:15 ` sathyanarayanan kuppuswamy 2017-04-04 13:25 ` [PATCH v4 1/5] platform/x86: intel_pmc_ipc: fix gcr offset Andy Shevchenko 2017-04-04 13:25 ` Andy Shevchenko 2017-04-04 21:32 ` sathyanarayanan kuppuswamy 2017-04-04 21:32 ` sathyanarayanan kuppuswamy 2017-04-05 22:54 ` [PATCH v6 1/6] " Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` [PATCH v6 2/6] platform/x86: intel_pmc_ipc: Add pmc gcr read/write/update api's Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` [PATCH v6 3/6] watchdog: iTCO_wdt: cleanup set/unset no_reboot_bit functions Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` [PATCH v6 4/6] watchdog: iTCO_wdt: Add PMC specific noreboot update api Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` Kuppuswamy Sathyanarayanan 2017-04-06 11:42 ` Guenter Roeck 2017-04-06 11:42 ` Guenter Roeck 2017-04-05 22:54 ` [PATCH v6 5/6] platform/x86: intel_pmc_ipc: Fix iTCO_wdt GCS memory mapping failure Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` Kuppuswamy Sathyanarayanan 2017-04-06 21:37 ` Andy Shevchenko 2017-04-06 21:37 ` Andy Shevchenko 2017-04-05 22:54 ` [PATCH v6 6/6] platform/x86: intel_pmc_ipc: use gcr mem base for S0ix counter read Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` Kuppuswamy Sathyanarayanan 2017-04-06 15:16 ` [PATCH v6 1/6] platform/x86: intel_pmc_ipc: fix gcr offset Rajneesh Bhardwaj 2017-04-06 15:16 ` Rajneesh Bhardwaj
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=2abb78ba-3b61-c9ed-7211-f7b8bf09c791@linux.intel.com \ --to=sathyanarayanan.kuppuswamy@linux.intel.com \ --cc=andy@infradead.org \ --cc=david.e.box@linux.intel.com \ --cc=dvhart@infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-watchdog@vger.kernel.org \ --cc=linux@roeck-us.net \ --cc=platform-driver-x86@vger.kernel.org \ --cc=qipeng.zha@intel.com \ --cc=rajneesh.bhardwaj@intel.com \ --cc=sathyaosid@gmail.com \ --cc=wim@iguana.be \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.