From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> To: andy@infradead.org, qipeng.zha@intel.com, dvhart@infradead.org, linux@roeck-us.net Cc: wim@iguana.be, sathyaosid@gmail.com, david.e.box@linux.intel.com, rajneesh.bhardwaj@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org Subject: [PATCH v3 5/5] platform/x86: intel_pmc_ipc: use gcr mem base for S0ix counter read Date: Fri, 17 Mar 2017 19:06:22 -0700 [thread overview] Message-ID: <4967f29bb2746241a5c72443b94adebae3d0d45c.1489801590.git.sathyanarayanan.kuppuswamy@linux.intel.com> (raw) In-Reply-To: <1ee0cc63c5ad4d4581fa46ae5e72001f0ac341c0.1489801590.git.sathyanarayanan.kuppuswamy@linux.intel.com> To maintain the uniformity in accessing GCR registers, this patch modifies the S0ix counter read function to use GCR address base instead of ipc address base. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> --- arch/x86/include/asm/intel_pmc_ipc.h | 2 ++ drivers/platform/x86/intel_pmc_ipc.c | 10 +++------- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/intel_pmc_ipc.h b/arch/x86/include/asm/intel_pmc_ipc.h index 8402efe..fac89eb 100644 --- a/arch/x86/include/asm/intel_pmc_ipc.h +++ b/arch/x86/include/asm/intel_pmc_ipc.h @@ -25,6 +25,8 @@ /* GCR reg offsets from gcr base*/ #define PMC_GCR_PMC_CFG_REG 0x08 +#define PMC_GCR_TELEM_DEEP_S0IX_REG 0x78 +#define PMC_GCR_TELEM_SHLW_S0IX_REG 0x80 #if IS_ENABLED(CONFIG_INTEL_PMC_IPC) diff --git a/drivers/platform/x86/intel_pmc_ipc.c b/drivers/platform/x86/intel_pmc_ipc.c index 0c66c11..54d5254 100644 --- a/drivers/platform/x86/intel_pmc_ipc.c +++ b/drivers/platform/x86/intel_pmc_ipc.c @@ -57,10 +57,6 @@ #define IPC_WRITE_BUFFER 0x80 #define IPC_READ_BUFFER 0x90 -/* PMC Global Control Registers */ -#define GCR_TELEM_DEEP_S0IX_OFFSET 0x1078 -#define GCR_TELEM_SHLW_S0IX_OFFSET 0x1080 - /* Residency with clock rate at 19.2MHz to usecs */ #define S0IX_RESIDENCY_IN_USECS(d, s) \ ({ \ @@ -196,7 +192,7 @@ static inline u32 ipc_data_readl(u32 offset) static inline u64 gcr_data_readq(u32 offset) { - return readq(ipcdev.ipc_base + offset); + return readq(ipcdev.gcr_mem_base + offset); } int intel_pmc_gcr_read(u32 offset, u32 *data) @@ -838,8 +834,8 @@ int intel_pmc_s0ix_counter_read(u64 *data) if (!ipcdev.has_gcr_regs) return -EACCES; - deep = gcr_data_readq(GCR_TELEM_DEEP_S0IX_OFFSET); - shlw = gcr_data_readq(GCR_TELEM_SHLW_S0IX_OFFSET); + deep = gcr_data_readq(PMC_GCR_TELEM_DEEP_S0IX_REG); + shlw = gcr_data_readq(PMC_GCR_TELEM_SHLW_S0IX_REG); *data = S0IX_RESIDENCY_IN_USECS(deep, shlw); -- 2.7.4
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From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> To: andy-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org, qipeng.zha-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, dvhart-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org, linux-0h96xk9xTtrk1uMJSBkQmQ@public.gmane.org Cc: wim-IQzOog9fTRqzQB+pC5nmwQ@public.gmane.org, sathyaosid-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, david.e.box-VuQAYsv1563Yd54FQh9/CA@public.gmane.org, rajneesh.bhardwaj-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, sathyanarayanan.kuppuswamy-VuQAYsv1563Yd54FQh9/CA@public.gmane.org, platform-driver-x86-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Subject: [PATCH v3 5/5] platform/x86: intel_pmc_ipc: use gcr mem base for S0ix counter read Date: Fri, 17 Mar 2017 19:06:22 -0700 [thread overview] Message-ID: <4967f29bb2746241a5c72443b94adebae3d0d45c.1489801590.git.sathyanarayanan.kuppuswamy@linux.intel.com> (raw) In-Reply-To: <1ee0cc63c5ad4d4581fa46ae5e72001f0ac341c0.1489801590.git.sathyanarayanan.kuppuswamy-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> To maintain the uniformity in accessing GCR registers, this patch modifies the S0ix counter read function to use GCR address base instead of ipc address base. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> --- arch/x86/include/asm/intel_pmc_ipc.h | 2 ++ drivers/platform/x86/intel_pmc_ipc.c | 10 +++------- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/intel_pmc_ipc.h b/arch/x86/include/asm/intel_pmc_ipc.h index 8402efe..fac89eb 100644 --- a/arch/x86/include/asm/intel_pmc_ipc.h +++ b/arch/x86/include/asm/intel_pmc_ipc.h @@ -25,6 +25,8 @@ /* GCR reg offsets from gcr base*/ #define PMC_GCR_PMC_CFG_REG 0x08 +#define PMC_GCR_TELEM_DEEP_S0IX_REG 0x78 +#define PMC_GCR_TELEM_SHLW_S0IX_REG 0x80 #if IS_ENABLED(CONFIG_INTEL_PMC_IPC) diff --git a/drivers/platform/x86/intel_pmc_ipc.c b/drivers/platform/x86/intel_pmc_ipc.c index 0c66c11..54d5254 100644 --- a/drivers/platform/x86/intel_pmc_ipc.c +++ b/drivers/platform/x86/intel_pmc_ipc.c @@ -57,10 +57,6 @@ #define IPC_WRITE_BUFFER 0x80 #define IPC_READ_BUFFER 0x90 -/* PMC Global Control Registers */ -#define GCR_TELEM_DEEP_S0IX_OFFSET 0x1078 -#define GCR_TELEM_SHLW_S0IX_OFFSET 0x1080 - /* Residency with clock rate at 19.2MHz to usecs */ #define S0IX_RESIDENCY_IN_USECS(d, s) \ ({ \ @@ -196,7 +192,7 @@ static inline u32 ipc_data_readl(u32 offset) static inline u64 gcr_data_readq(u32 offset) { - return readq(ipcdev.ipc_base + offset); + return readq(ipcdev.gcr_mem_base + offset); } int intel_pmc_gcr_read(u32 offset, u32 *data) @@ -838,8 +834,8 @@ int intel_pmc_s0ix_counter_read(u64 *data) if (!ipcdev.has_gcr_regs) return -EACCES; - deep = gcr_data_readq(GCR_TELEM_DEEP_S0IX_OFFSET); - shlw = gcr_data_readq(GCR_TELEM_SHLW_S0IX_OFFSET); + deep = gcr_data_readq(PMC_GCR_TELEM_DEEP_S0IX_REG); + shlw = gcr_data_readq(PMC_GCR_TELEM_SHLW_S0IX_REG); *data = S0IX_RESIDENCY_IN_USECS(deep, shlw); -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-watchdog" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
next prev parent reply other threads:[~2017-03-18 2:14 UTC|newest] Thread overview: 120+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-03-18 2:06 [PATCH v3 1/5] platform/x86: intel_pmc_ipc: fix gcr offset Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` [PATCH v3 2/5] platform/x86: intel_pmc_ipc: Add pmc gcr read/write/update api's Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` Kuppuswamy Sathyanarayanan 2017-03-31 13:47 ` Rajneesh Bhardwaj 2017-03-31 13:47 ` Rajneesh Bhardwaj 2017-03-18 2:06 ` [PATCH v3 3/5] watchdog: iTCO_wdt: Add PMC specific noreboot update api Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` Kuppuswamy Sathyanarayanan 2017-03-28 9:12 ` [v3,3/5] " Guenter Roeck 2017-03-28 9:12 ` Guenter Roeck 2017-03-28 9:12 ` Guenter Roeck 2017-03-18 2:06 ` [PATCH v3 4/5] platform/x86: intel_pmc_ipc: Fix iTCO GCS memory mapping failure Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` Kuppuswamy Sathyanarayanan 2017-03-31 14:01 ` Rajneesh Bhardwaj 2017-03-31 14:01 ` Rajneesh Bhardwaj 2017-03-31 17:22 ` sathyanarayanan kuppuswamy 2017-03-31 17:22 ` sathyanarayanan kuppuswamy 2017-03-31 17:22 ` sathyanarayanan kuppuswamy 2017-03-18 2:06 ` Kuppuswamy Sathyanarayanan [this message] 2017-03-18 2:06 ` [PATCH v3 5/5] platform/x86: intel_pmc_ipc: use gcr mem base for S0ix counter read Kuppuswamy Sathyanarayanan 2017-03-18 2:06 ` Kuppuswamy Sathyanarayanan 2017-03-31 13:54 ` Rajneesh Bhardwaj 2017-03-31 13:54 ` Rajneesh Bhardwaj 2017-03-31 13:54 ` Rajneesh Bhardwaj 2017-03-31 15:08 ` Shanth Murthy 2017-03-31 15:08 ` Shanth Murthy 2017-03-31 13:37 ` [PATCH v3 1/5] platform/x86: intel_pmc_ipc: fix gcr offset Rajneesh Bhardwaj 2017-03-31 13:37 ` Rajneesh Bhardwaj 2017-03-31 23:27 ` [PATCH v4 " Kuppuswamy Sathyanarayanan 2017-03-31 23:27 ` Kuppuswamy Sathyanarayanan 2017-03-31 23:27 ` [PATCH v4 2/5] platform/x86: intel_pmc_ipc: Add pmc gcr read/write/update api's Kuppuswamy Sathyanarayanan 2017-03-31 23:27 ` Kuppuswamy Sathyanarayanan 2017-04-02 13:58 ` Andy Shevchenko 2017-04-02 13:58 ` Andy Shevchenko 2017-04-03 1:51 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-03 1:51 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-03 1:51 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-04 13:23 ` Andy Shevchenko 2017-04-04 13:23 ` Andy Shevchenko 2017-04-04 20:14 ` sathyanarayanan kuppuswamy 2017-04-04 20:14 ` sathyanarayanan kuppuswamy 2017-03-31 23:27 ` [PATCH v4 3/5] watchdog: iTCO_wdt: Add PMC specific noreboot update api Kuppuswamy Sathyanarayanan 2017-03-31 23:27 ` Kuppuswamy Sathyanarayanan 2017-03-31 23:27 ` Kuppuswamy Sathyanarayanan 2017-04-02 14:04 ` Andy Shevchenko 2017-04-02 14:04 ` Andy Shevchenko 2017-04-03 1:55 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-03 1:55 ` Sathyanarayanan Kuppuswamy Natarajan 2017-03-31 23:27 ` [PATCH v4 4/5] platform/x86: intel_pmc_ipc: Fix iTCO GCS memory mapping failure Kuppuswamy Sathyanarayanan 2017-03-31 23:27 ` Kuppuswamy Sathyanarayanan 2017-04-02 14:10 ` Andy Shevchenko 2017-04-02 14:10 ` Andy Shevchenko 2017-04-03 1:53 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-03 1:53 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-03 1:53 ` Sathyanarayanan Kuppuswamy Natarajan 2017-03-31 23:27 ` [PATCH v4 5/5] platform/x86: intel_pmc_ipc: use gcr mem base for S0ix counter read Kuppuswamy Sathyanarayanan 2017-03-31 23:27 ` Kuppuswamy Sathyanarayanan 2017-04-02 14:11 ` [PATCH v4 1/5] platform/x86: intel_pmc_ipc: fix gcr offset Andy Shevchenko 2017-04-02 14:11 ` Andy Shevchenko 2017-04-02 14:11 ` Andy Shevchenko 2017-04-03 1:51 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-03 1:51 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-03 1:51 ` Sathyanarayanan Kuppuswamy Natarajan 2017-04-04 0:24 ` [PATCH v5 1/6] " Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` [PATCH v5 2/6] platform/x86: intel_pmc_ipc: Add pmc gcr read/write/update api's Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 13:53 ` Andy Shevchenko 2017-04-04 13:53 ` Andy Shevchenko 2017-04-04 22:07 ` sathyanarayanan kuppuswamy 2017-04-04 22:07 ` sathyanarayanan kuppuswamy 2017-04-04 22:07 ` sathyanarayanan kuppuswamy 2017-04-04 0:24 ` [PATCH v5 3/6] watchdog: iTCO_wdt: Add PMC specific noreboot update api Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 13:48 ` Andy Shevchenko 2017-04-04 13:48 ` Andy Shevchenko 2017-04-04 0:24 ` [PATCH v5 4/6] watchdog: iTCO_wdt: cleanup set/unset no_reboot calls Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 3:22 ` Guenter Roeck 2017-04-04 3:22 ` Guenter Roeck 2017-04-04 3:22 ` Guenter Roeck 2017-04-04 13:49 ` Andy Shevchenko 2017-04-04 13:49 ` Andy Shevchenko 2017-04-04 0:24 ` [PATCH v5 5/6] platform/x86: intel_pmc_ipc: Fix iTCO_wdt GCS memory mapping failure Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 13:53 ` Andy Shevchenko 2017-04-04 13:53 ` Andy Shevchenko 2017-04-04 0:24 ` [PATCH v5 6/6] platform/x86: intel_pmc_ipc: use gcr mem base for S0ix counter read Kuppuswamy Sathyanarayanan 2017-04-04 0:24 ` Kuppuswamy Sathyanarayanan 2017-04-04 13:51 ` Andy Shevchenko 2017-04-04 13:51 ` Andy Shevchenko 2017-04-04 22:15 ` sathyanarayanan kuppuswamy 2017-04-04 22:15 ` sathyanarayanan kuppuswamy 2017-04-04 22:15 ` sathyanarayanan kuppuswamy 2017-04-04 13:25 ` [PATCH v4 1/5] platform/x86: intel_pmc_ipc: fix gcr offset Andy Shevchenko 2017-04-04 13:25 ` Andy Shevchenko 2017-04-04 21:32 ` sathyanarayanan kuppuswamy 2017-04-04 21:32 ` sathyanarayanan kuppuswamy 2017-04-05 22:54 ` [PATCH v6 1/6] " Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` [PATCH v6 2/6] platform/x86: intel_pmc_ipc: Add pmc gcr read/write/update api's Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` [PATCH v6 3/6] watchdog: iTCO_wdt: cleanup set/unset no_reboot_bit functions Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` [PATCH v6 4/6] watchdog: iTCO_wdt: Add PMC specific noreboot update api Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` Kuppuswamy Sathyanarayanan 2017-04-06 11:42 ` Guenter Roeck 2017-04-06 11:42 ` Guenter Roeck 2017-04-05 22:54 ` [PATCH v6 5/6] platform/x86: intel_pmc_ipc: Fix iTCO_wdt GCS memory mapping failure Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` Kuppuswamy Sathyanarayanan 2017-04-06 21:37 ` Andy Shevchenko 2017-04-06 21:37 ` Andy Shevchenko 2017-04-05 22:54 ` [PATCH v6 6/6] platform/x86: intel_pmc_ipc: use gcr mem base for S0ix counter read Kuppuswamy Sathyanarayanan 2017-04-05 22:54 ` Kuppuswamy Sathyanarayanan 2017-04-06 15:16 ` [PATCH v6 1/6] platform/x86: intel_pmc_ipc: fix gcr offset Rajneesh Bhardwaj 2017-04-06 15:16 ` Rajneesh Bhardwaj
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