* [PATCH v2 1/2] rockchip: rk3399: Init clocks in U-Boot proper if SPL was not run
@ 2020-10-27 21:15 Alper Nebi Yasak
2020-10-27 21:15 ` [PATCH v2 2/2] rockchip: gru: Allow setting up clocks in U-Boot proper Alper Nebi Yasak
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Alper Nebi Yasak @ 2020-10-27 21:15 UTC (permalink / raw)
To: u-boot
It's possible to chainload U-Boot proper from the vendor firmware in
rk3399 chromebooks, but the way the vendor firmware sets up clocks is
somehow different than what U-Boot expects. This causes the display to
stay devoid of content even though vidconsole claims to work (with
patches in process of being upstreamed).
This is meant to be a rk3399 version of commit d3cb46aa8c41 ("rockchip:
Init clocks again when chain-loading") which can detect the discrepancy,
but this patch instead checks whether SPL (and therefore the clock init)
was run via the handoff functionality and runs the init if it was not.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
Changes in v2:
- Check for SPL handoff instead of always re-initializing
v1: https://patchwork.ozlabs.org/project/uboot/patch/20201022203740.24528-1-alpernebiyasak at gmail.com/
drivers/clk/rockchip/clk_rk3399.c | 22 ++++++++++++++++------
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 1ea41f3c5b2e..64e0e2348db5 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -23,6 +23,8 @@
#include <linux/bitops.h>
#include <linux/delay.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3399_clk_plat {
struct dtd_rockchip_rk3399_cru dtd;
@@ -50,10 +52,9 @@ struct pll_div {
.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
-#if defined(CONFIG_SPL_BUILD)
static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2, 2);
-#else
+#if !defined(CONFIG_SPL_BUILD)
static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
#endif
@@ -1274,7 +1275,6 @@ static struct clk_ops rk3399_clk_ops = {
.disable = rk3399_clk_disable,
};
-#ifdef CONFIG_SPL_BUILD
static void rkclk_init(struct rockchip_cru *cru)
{
u32 aclk_div;
@@ -1352,20 +1352,30 @@ static void rkclk_init(struct rockchip_cru *cru)
hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
}
-#endif
static int rk3399_clk_probe(struct udevice *dev)
{
-#ifdef CONFIG_SPL_BUILD
struct rk3399_clk_priv *priv = dev_get_priv(dev);
+ bool init_clocks = false;
#if CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3399_clk_plat *plat = dev_get_platdata(dev);
priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
#endif
- rkclk_init(priv->cru);
+
+#if defined(CONFIG_SPL_BUILD)
+ init_clocks = true;
+#elif CONFIG_IS_ENABLED(HANDOFF)
+ if (!(gd->flags & GD_FLG_RELOC)) {
+ if (!(gd->spl_handoff))
+ init_clocks = true;
+ }
#endif
+
+ if (init_clocks)
+ rkclk_init(priv->cru);
+
return 0;
}
--
2.28.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 2/2] rockchip: gru: Allow setting up clocks in U-Boot proper
2020-10-27 21:15 [PATCH v2 1/2] rockchip: rk3399: Init clocks in U-Boot proper if SPL was not run Alper Nebi Yasak
@ 2020-10-27 21:15 ` Alper Nebi Yasak
2020-11-03 15:11 ` Simon Glass
2020-11-13 10:13 ` Kever Yang
2020-11-03 15:11 ` [PATCH v2 1/2] rockchip: rk3399: Init clocks in U-Boot proper if SPL was not run Simon Glass
2020-11-13 10:12 ` Kever Yang
2 siblings, 2 replies; 6+ messages in thread
From: Alper Nebi Yasak @ 2020-10-27 21:15 UTC (permalink / raw)
To: u-boot
Commit fe974716326c ("rockchip: rk3288: Allow setting up clocks in
U-Boot proper") fixes some clock issues when chainloading U-Boot on
rk3288 chromebooks. Part of that change is still available in veyron's
board_early_init_r() function. Since chain-loading U-Boot proper from
vendor firmware is possible on gru boards as well, do the same thing for
them too.
On rk3399, this needs to detect whether SPL was run via handoff, so
enable that and bloblist kconfigs it needs for chromebook_bob.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
Changes in v2:
- Enable kconfigs needed for using SPL handoff
v1: https://patchwork.ozlabs.org/project/uboot/patch/20201022203740.24528-2-alpernebiyasak at gmail.com/
board/google/gru/gru.c | 23 +++++++++++++++++++++++
configs/chromebook_bob_defconfig | 5 +++++
2 files changed, 28 insertions(+)
diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c
index 7dfbc3ac8676..441a1a376a9a 100644
--- a/board/google/gru/gru.c
+++ b/board/google/gru/gru.c
@@ -4,6 +4,7 @@
*/
#include <common.h>
+#include <dm.h>
#include <init.h>
#ifdef CONFIG_SPL_BUILD
@@ -31,3 +32,25 @@ int board_early_init_f(void)
return 0;
}
#endif
+
+#ifndef CONFIG_SPL_BUILD
+int board_early_init_r(void)
+{
+ struct udevice *clk;
+ int ret;
+
+ /*
+ * This init is done in SPL, but when chain-loading U-Boot SPL will
+ * have been skipped. Allow the clock driver to check if it needs
+ * setting up.
+ */
+ ret = uclass_get_device_by_driver(UCLASS_CLK,
+ DM_GET_DRIVER(clk_rk3399), &clk);
+ if (ret) {
+ debug("%s: CLK init failed: %d\n", __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+#endif
diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig
index 4608892fb567..73635f0d13f1 100644
--- a/configs/chromebook_bob_defconfig
+++ b/configs/chromebook_bob_defconfig
@@ -19,6 +19,11 @@ CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_BLOBLIST=y
+CONFIG_BLOBLIST_SIZE=0x1000
+CONFIG_BLOBLIST_ADDR=0x100000
+CONFIG_HANDOFF=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
--
2.28.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 1/2] rockchip: rk3399: Init clocks in U-Boot proper if SPL was not run
2020-10-27 21:15 [PATCH v2 1/2] rockchip: rk3399: Init clocks in U-Boot proper if SPL was not run Alper Nebi Yasak
2020-10-27 21:15 ` [PATCH v2 2/2] rockchip: gru: Allow setting up clocks in U-Boot proper Alper Nebi Yasak
@ 2020-11-03 15:11 ` Simon Glass
2020-11-13 10:12 ` Kever Yang
2 siblings, 0 replies; 6+ messages in thread
From: Simon Glass @ 2020-11-03 15:11 UTC (permalink / raw)
To: u-boot
On Tue, 27 Oct 2020 at 15:15, Alper Nebi Yasak <alpernebiyasak@gmail.com> wrote:
>
> It's possible to chainload U-Boot proper from the vendor firmware in
> rk3399 chromebooks, but the way the vendor firmware sets up clocks is
> somehow different than what U-Boot expects. This causes the display to
> stay devoid of content even though vidconsole claims to work (with
> patches in process of being upstreamed).
>
> This is meant to be a rk3399 version of commit d3cb46aa8c41 ("rockchip:
> Init clocks again when chain-loading") which can detect the discrepancy,
> but this patch instead checks whether SPL (and therefore the clock init)
> was run via the handoff functionality and runs the init if it was not.
>
> Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
> ---
>
> Changes in v2:
> - Check for SPL handoff instead of always re-initializing
>
> v1: https://patchwork.ozlabs.org/project/uboot/patch/20201022203740.24528-1-alpernebiyasak at gmail.com/
>
> drivers/clk/rockchip/clk_rk3399.c | 22 ++++++++++++++++------
> 1 file changed, 16 insertions(+), 6 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 2/2] rockchip: gru: Allow setting up clocks in U-Boot proper
2020-10-27 21:15 ` [PATCH v2 2/2] rockchip: gru: Allow setting up clocks in U-Boot proper Alper Nebi Yasak
@ 2020-11-03 15:11 ` Simon Glass
2020-11-13 10:13 ` Kever Yang
1 sibling, 0 replies; 6+ messages in thread
From: Simon Glass @ 2020-11-03 15:11 UTC (permalink / raw)
To: u-boot
On Tue, 27 Oct 2020 at 15:15, Alper Nebi Yasak <alpernebiyasak@gmail.com> wrote:
>
> Commit fe974716326c ("rockchip: rk3288: Allow setting up clocks in
> U-Boot proper") fixes some clock issues when chainloading U-Boot on
> rk3288 chromebooks. Part of that change is still available in veyron's
> board_early_init_r() function. Since chain-loading U-Boot proper from
> vendor firmware is possible on gru boards as well, do the same thing for
> them too.
>
> On rk3399, this needs to detect whether SPL was run via handoff, so
> enable that and bloblist kconfigs it needs for chromebook_bob.
>
> Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
> ---
>
> Changes in v2:
> - Enable kconfigs needed for using SPL handoff
>
> v1: https://patchwork.ozlabs.org/project/uboot/patch/20201022203740.24528-2-alpernebiyasak at gmail.com/
>
> board/google/gru/gru.c | 23 +++++++++++++++++++++++
> configs/chromebook_bob_defconfig | 5 +++++
> 2 files changed, 28 insertions(+)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 1/2] rockchip: rk3399: Init clocks in U-Boot proper if SPL was not run
2020-10-27 21:15 [PATCH v2 1/2] rockchip: rk3399: Init clocks in U-Boot proper if SPL was not run Alper Nebi Yasak
2020-10-27 21:15 ` [PATCH v2 2/2] rockchip: gru: Allow setting up clocks in U-Boot proper Alper Nebi Yasak
2020-11-03 15:11 ` [PATCH v2 1/2] rockchip: rk3399: Init clocks in U-Boot proper if SPL was not run Simon Glass
@ 2020-11-13 10:12 ` Kever Yang
2 siblings, 0 replies; 6+ messages in thread
From: Kever Yang @ 2020-11-13 10:12 UTC (permalink / raw)
To: u-boot
On 2020/10/28 ??5:15, Alper Nebi Yasak wrote:
> It's possible to chainload U-Boot proper from the vendor firmware in
> rk3399 chromebooks, but the way the vendor firmware sets up clocks is
> somehow different than what U-Boot expects. This causes the display to
> stay devoid of content even though vidconsole claims to work (with
> patches in process of being upstreamed).
>
> This is meant to be a rk3399 version of commit d3cb46aa8c41 ("rockchip:
> Init clocks again when chain-loading") which can detect the discrepancy,
> but this patch instead checks whether SPL (and therefore the clock init)
> was run via the handoff functionality and runs the init if it was not.
>
> Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
>
> Changes in v2:
> - Check for SPL handoff instead of always re-initializing
>
> v1: https://patchwork.ozlabs.org/project/uboot/patch/20201022203740.24528-1-alpernebiyasak at gmail.com/
>
> drivers/clk/rockchip/clk_rk3399.c | 22 ++++++++++++++++------
> 1 file changed, 16 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
> index 1ea41f3c5b2e..64e0e2348db5 100644
> --- a/drivers/clk/rockchip/clk_rk3399.c
> +++ b/drivers/clk/rockchip/clk_rk3399.c
> @@ -23,6 +23,8 @@
> #include <linux/bitops.h>
> #include <linux/delay.h>
>
> +DECLARE_GLOBAL_DATA_PTR;
> +
> #if CONFIG_IS_ENABLED(OF_PLATDATA)
> struct rk3399_clk_plat {
> struct dtd_rockchip_rk3399_cru dtd;
> @@ -50,10 +52,9 @@ struct pll_div {
> .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
> .postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
>
> -#if defined(CONFIG_SPL_BUILD)
> static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
> static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2, 2);
> -#else
> +#if !defined(CONFIG_SPL_BUILD)
> static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
> #endif
>
> @@ -1274,7 +1275,6 @@ static struct clk_ops rk3399_clk_ops = {
> .disable = rk3399_clk_disable,
> };
>
> -#ifdef CONFIG_SPL_BUILD
> static void rkclk_init(struct rockchip_cru *cru)
> {
> u32 aclk_div;
> @@ -1352,20 +1352,30 @@ static void rkclk_init(struct rockchip_cru *cru)
> hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
> HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
> }
> -#endif
>
> static int rk3399_clk_probe(struct udevice *dev)
> {
> -#ifdef CONFIG_SPL_BUILD
> struct rk3399_clk_priv *priv = dev_get_priv(dev);
> + bool init_clocks = false;
>
> #if CONFIG_IS_ENABLED(OF_PLATDATA)
> struct rk3399_clk_plat *plat = dev_get_platdata(dev);
>
> priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
> #endif
> - rkclk_init(priv->cru);
> +
> +#if defined(CONFIG_SPL_BUILD)
> + init_clocks = true;
> +#elif CONFIG_IS_ENABLED(HANDOFF)
> + if (!(gd->flags & GD_FLG_RELOC)) {
> + if (!(gd->spl_handoff))
> + init_clocks = true;
> + }
> #endif
> +
> + if (init_clocks)
> + rkclk_init(priv->cru);
> +
> return 0;
> }
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 2/2] rockchip: gru: Allow setting up clocks in U-Boot proper
2020-10-27 21:15 ` [PATCH v2 2/2] rockchip: gru: Allow setting up clocks in U-Boot proper Alper Nebi Yasak
2020-11-03 15:11 ` Simon Glass
@ 2020-11-13 10:13 ` Kever Yang
1 sibling, 0 replies; 6+ messages in thread
From: Kever Yang @ 2020-11-13 10:13 UTC (permalink / raw)
To: u-boot
On 2020/10/28 ??5:15, Alper Nebi Yasak wrote:
> Commit fe974716326c ("rockchip: rk3288: Allow setting up clocks in
> U-Boot proper") fixes some clock issues when chainloading U-Boot on
> rk3288 chromebooks. Part of that change is still available in veyron's
> board_early_init_r() function. Since chain-loading U-Boot proper from
> vendor firmware is possible on gru boards as well, do the same thing for
> them too.
>
> On rk3399, this needs to detect whether SPL was run via handoff, so
> enable that and bloblist kconfigs it needs for chromebook_bob.
>
> Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
>
> Changes in v2:
> - Enable kconfigs needed for using SPL handoff
>
> v1: https://patchwork.ozlabs.org/project/uboot/patch/20201022203740.24528-2-alpernebiyasak at gmail.com/
>
> board/google/gru/gru.c | 23 +++++++++++++++++++++++
> configs/chromebook_bob_defconfig | 5 +++++
> 2 files changed, 28 insertions(+)
>
> diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c
> index 7dfbc3ac8676..441a1a376a9a 100644
> --- a/board/google/gru/gru.c
> +++ b/board/google/gru/gru.c
> @@ -4,6 +4,7 @@
> */
>
> #include <common.h>
> +#include <dm.h>
> #include <init.h>
>
> #ifdef CONFIG_SPL_BUILD
> @@ -31,3 +32,25 @@ int board_early_init_f(void)
> return 0;
> }
> #endif
> +
> +#ifndef CONFIG_SPL_BUILD
> +int board_early_init_r(void)
> +{
> + struct udevice *clk;
> + int ret;
> +
> + /*
> + * This init is done in SPL, but when chain-loading U-Boot SPL will
> + * have been skipped. Allow the clock driver to check if it needs
> + * setting up.
> + */
> + ret = uclass_get_device_by_driver(UCLASS_CLK,
> + DM_GET_DRIVER(clk_rk3399), &clk);
> + if (ret) {
> + debug("%s: CLK init failed: %d\n", __func__, ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +#endif
> diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig
> index 4608892fb567..73635f0d13f1 100644
> --- a/configs/chromebook_bob_defconfig
> +++ b/configs/chromebook_bob_defconfig
> @@ -19,6 +19,11 @@ CONFIG_DEBUG_UART=y
> CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
> # CONFIG_DISPLAY_CPUINFO is not set
> CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_BOARD_EARLY_INIT_R=y
> +CONFIG_BLOBLIST=y
> +CONFIG_BLOBLIST_SIZE=0x1000
> +CONFIG_BLOBLIST_ADDR=0x100000
> +CONFIG_HANDOFF=y
> # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> CONFIG_SPL_STACK_R=y
> CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-11-13 10:13 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-27 21:15 [PATCH v2 1/2] rockchip: rk3399: Init clocks in U-Boot proper if SPL was not run Alper Nebi Yasak
2020-10-27 21:15 ` [PATCH v2 2/2] rockchip: gru: Allow setting up clocks in U-Boot proper Alper Nebi Yasak
2020-11-03 15:11 ` Simon Glass
2020-11-13 10:13 ` Kever Yang
2020-11-03 15:11 ` [PATCH v2 1/2] rockchip: rk3399: Init clocks in U-Boot proper if SPL was not run Simon Glass
2020-11-13 10:12 ` Kever Yang
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