From: Auger Eric <eric.auger@redhat.com>
To: Jingyi Wang <wangjingyi11@huawei.com>,
drjones@redhat.com, kvm@vger.kernel.org,
kvmarm@lists.cs.columbia.edu
Cc: maz@kernel.org, wanghaibin.wang@huawei.com, yuzenghui@huawei.com
Subject: Re: [kvm-unit-tests PATCH v2 5/8] arm64: microbench: its: Add LPI latency test
Date: Thu, 2 Jul 2020 15:13:19 +0200 [thread overview]
Message-ID: <2e682906-8b0b-9f5c-31af-8067139c680d@redhat.com> (raw)
In-Reply-To: <20200702030132.20252-6-wangjingyi11@huawei.com>
Hi Jingyi,
On 7/2/20 5:01 AM, Jingyi Wang wrote:
> Triggers LPIs through the INT command and test the latency.
> Mostly inherited form commit 0ef02cd6cbaa(arm/arm64: ITS: INT
> functional tests).
>
> Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
> ---
> arm/micro-bench.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arm/micro-bench.c b/arm/micro-bench.c
> index 80d8db3..aeb60a7 100644
> --- a/arm/micro-bench.c
> +++ b/arm/micro-bench.c
> @@ -20,6 +20,7 @@
> */
> #include <libcflat.h>
> #include <asm/gic.h>
> +#include <asm/gic-v3-its.h>
>
> #define NTIMES (1U << 16)
>
> @@ -145,6 +146,48 @@ static void ipi_exec(void)
> assert_msg(irq_received, "failed to receive IPI in time, but received %d successfully\n", received);
> }
>
> +static bool lpi_prep(void)
> +{
> + struct its_collection *col1;
> + struct its_device *dev2;
> +
> + if (!gicv3_its_base())
> + return false;
> +
> + its_enable_defaults();
> + dev2 = its_create_device(2 /* dev id */, 8 /* nb_ites */);
> + col1 = its_create_collection(1 /* col id */, 1 /* target PE */);
> + gicv3_lpi_set_config(8199, LPI_PROP_DEFAULT);
> +
> + its_send_mapd_nv(dev2, true);
> + its_send_mapc_nv(col1, true);
> + its_send_invall_nv(col1);
> + its_send_mapti_nv(dev2, 8199 /* lpi id */, 20 /* event id */, col1);
> +
> + gic_prep_common();
> + return true;
> +}
> +
> +static void lpi_exec(void)
> +{
> + struct its_device *dev2;
> + unsigned tries = 1 << 28;
> + static int received = 0;
> +
> + irq_received = false;
> +
> + dev2 = its_get_device(2);
> + its_send_int_nv(dev2, 20);
> +
> + while (!irq_received && tries--)
> + cpu_relax();
> +
> + if (irq_received)
> + ++received;
> +
> + assert_msg(irq_received, "failed to receive LPI in time, but received %d successfully\n", received);
> +}
> +
> static void hvc_exec(void)
> {
> asm volatile("mov w0, #0x4b000000; hvc #0" ::: "w0");
> @@ -190,6 +233,7 @@ static struct exit_test tests[] = {
> {"eoi", NULL, eoi_exec, true},
> {"ipi", ipi_prep, ipi_exec, true},
> {"ipi_hw", ipi_hw_prep, ipi_exec, true},
> + {"lpi", lpi_prep, lpi_exec, true},
> };
>
> struct ns_time {
>
Looks good to me (w/wo the lpi_prep returned value change)
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Thanks
Eric
WARNING: multiple messages have this Message-ID (diff)
From: Auger Eric <eric.auger@redhat.com>
To: Jingyi Wang <wangjingyi11@huawei.com>,
drjones@redhat.com, kvm@vger.kernel.org,
kvmarm@lists.cs.columbia.edu
Cc: maz@kernel.org
Subject: Re: [kvm-unit-tests PATCH v2 5/8] arm64: microbench: its: Add LPI latency test
Date: Thu, 2 Jul 2020 15:13:19 +0200 [thread overview]
Message-ID: <2e682906-8b0b-9f5c-31af-8067139c680d@redhat.com> (raw)
In-Reply-To: <20200702030132.20252-6-wangjingyi11@huawei.com>
Hi Jingyi,
On 7/2/20 5:01 AM, Jingyi Wang wrote:
> Triggers LPIs through the INT command and test the latency.
> Mostly inherited form commit 0ef02cd6cbaa(arm/arm64: ITS: INT
> functional tests).
>
> Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
> ---
> arm/micro-bench.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arm/micro-bench.c b/arm/micro-bench.c
> index 80d8db3..aeb60a7 100644
> --- a/arm/micro-bench.c
> +++ b/arm/micro-bench.c
> @@ -20,6 +20,7 @@
> */
> #include <libcflat.h>
> #include <asm/gic.h>
> +#include <asm/gic-v3-its.h>
>
> #define NTIMES (1U << 16)
>
> @@ -145,6 +146,48 @@ static void ipi_exec(void)
> assert_msg(irq_received, "failed to receive IPI in time, but received %d successfully\n", received);
> }
>
> +static bool lpi_prep(void)
> +{
> + struct its_collection *col1;
> + struct its_device *dev2;
> +
> + if (!gicv3_its_base())
> + return false;
> +
> + its_enable_defaults();
> + dev2 = its_create_device(2 /* dev id */, 8 /* nb_ites */);
> + col1 = its_create_collection(1 /* col id */, 1 /* target PE */);
> + gicv3_lpi_set_config(8199, LPI_PROP_DEFAULT);
> +
> + its_send_mapd_nv(dev2, true);
> + its_send_mapc_nv(col1, true);
> + its_send_invall_nv(col1);
> + its_send_mapti_nv(dev2, 8199 /* lpi id */, 20 /* event id */, col1);
> +
> + gic_prep_common();
> + return true;
> +}
> +
> +static void lpi_exec(void)
> +{
> + struct its_device *dev2;
> + unsigned tries = 1 << 28;
> + static int received = 0;
> +
> + irq_received = false;
> +
> + dev2 = its_get_device(2);
> + its_send_int_nv(dev2, 20);
> +
> + while (!irq_received && tries--)
> + cpu_relax();
> +
> + if (irq_received)
> + ++received;
> +
> + assert_msg(irq_received, "failed to receive LPI in time, but received %d successfully\n", received);
> +}
> +
> static void hvc_exec(void)
> {
> asm volatile("mov w0, #0x4b000000; hvc #0" ::: "w0");
> @@ -190,6 +233,7 @@ static struct exit_test tests[] = {
> {"eoi", NULL, eoi_exec, true},
> {"ipi", ipi_prep, ipi_exec, true},
> {"ipi_hw", ipi_hw_prep, ipi_exec, true},
> + {"lpi", lpi_prep, lpi_exec, true},
> };
>
> struct ns_time {
>
Looks good to me (w/wo the lpi_prep returned value change)
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Thanks
Eric
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
next prev parent reply other threads:[~2020-07-02 13:13 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-02 3:01 [kvm-unit-tests PATCH v2 0/8] arm/arm64: Add IPI/LPI/vtimer latency test Jingyi Wang
2020-07-02 3:01 ` Jingyi Wang
2020-07-02 3:01 ` [kvm-unit-tests PATCH v2 1/8] arm64: microbench: get correct ipi received num Jingyi Wang
2020-07-02 3:01 ` Jingyi Wang
2020-07-02 12:36 ` Auger Eric
2020-07-02 12:36 ` Auger Eric
2020-07-02 3:01 ` [kvm-unit-tests PATCH v2 2/8] arm64: microbench: Use the funcions for ipi test as the general functions for gic(ipi/lpi/timer) test Jingyi Wang
2020-07-02 3:01 ` Jingyi Wang
2020-07-02 5:25 ` Andrew Jones
2020-07-02 5:25 ` Andrew Jones
2020-07-02 8:21 ` Jingyi Wang
2020-07-02 8:21 ` Jingyi Wang
2020-07-02 12:36 ` Auger Eric
2020-07-02 12:36 ` Auger Eric
2020-07-02 3:01 ` [kvm-unit-tests PATCH v2 3/8] arm64: microbench: gic: Add gicv4.1 support for ipi latency test Jingyi Wang
2020-07-02 3:01 ` Jingyi Wang
2020-07-02 8:22 ` Marc Zyngier
2020-07-02 8:22 ` Marc Zyngier
2020-07-02 9:02 ` Jingyi Wang
2020-07-02 9:02 ` Jingyi Wang
2020-07-02 9:17 ` Marc Zyngier
2020-07-02 9:17 ` Marc Zyngier
2020-07-02 9:29 ` Jingyi Wang
2020-07-02 9:29 ` Jingyi Wang
2020-07-02 12:36 ` Auger Eric
2020-07-02 12:36 ` Auger Eric
2020-07-02 13:03 ` Marc Zyngier
2020-07-02 13:03 ` Marc Zyngier
2020-07-02 12:57 ` Auger Eric
2020-07-02 12:57 ` Auger Eric
2020-07-02 13:08 ` Marc Zyngier
2020-07-02 13:08 ` Marc Zyngier
2020-07-02 13:42 ` Auger Eric
2020-07-02 13:42 ` Auger Eric
2020-07-03 3:39 ` Jingyi Wang
2020-07-03 3:39 ` Jingyi Wang
2020-07-02 21:33 ` Andrew Jones
2020-07-02 21:33 ` Andrew Jones
2020-07-02 3:01 ` [kvm-unit-tests PATCH v2 4/8] arm64: its: Handle its command queue wrapping Jingyi Wang
2020-07-02 3:01 ` Jingyi Wang
2020-07-02 13:01 ` Auger Eric
2020-07-02 13:01 ` Auger Eric
2020-07-02 3:01 ` [kvm-unit-tests PATCH v2 5/8] arm64: microbench: its: Add LPI latency test Jingyi Wang
2020-07-02 3:01 ` Jingyi Wang
2020-07-02 13:13 ` Auger Eric [this message]
2020-07-02 13:13 ` Auger Eric
2020-07-02 3:01 ` [kvm-unit-tests PATCH v2 6/8] arm64: microbench: Allow each test to specify its running times Jingyi Wang
2020-07-02 3:01 ` Jingyi Wang
2020-07-02 5:29 ` Andrew Jones
2020-07-02 5:29 ` Andrew Jones
2020-07-02 8:46 ` Jingyi Wang
2020-07-02 8:46 ` Jingyi Wang
2020-07-02 13:17 ` Auger Eric
2020-07-02 13:17 ` Auger Eric
2020-07-02 3:01 ` [kvm-unit-tests PATCH v2 7/8] arm64: microbench: Add time limit for each individual test Jingyi Wang
2020-07-02 3:01 ` Jingyi Wang
2020-07-02 5:48 ` Andrew Jones
2020-07-02 5:48 ` Andrew Jones
2020-07-02 8:47 ` Jingyi Wang
2020-07-02 8:47 ` Jingyi Wang
2020-07-02 13:23 ` Auger Eric
2020-07-02 13:23 ` Auger Eric
2020-07-03 3:42 ` Jingyi Wang
2020-07-03 3:42 ` Jingyi Wang
2020-07-02 3:01 ` [kvm-unit-tests PATCH v2 8/8] arm64: microbench: Add vtimer latency test Jingyi Wang
2020-07-02 3:01 ` Jingyi Wang
2020-07-02 5:44 ` Andrew Jones
2020-07-02 5:44 ` Andrew Jones
2020-07-02 8:56 ` Jingyi Wang
2020-07-02 8:56 ` Jingyi Wang
2020-07-02 13:36 ` Auger Eric
2020-07-02 13:36 ` Auger Eric
2020-07-03 7:41 ` Jingyi Wang
2020-07-03 7:41 ` Jingyi Wang
2020-07-03 7:45 ` Auger Eric
2020-07-03 7:45 ` Auger Eric
2020-07-06 12:23 ` Jingyi Wang
2020-07-06 12:23 ` Jingyi Wang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2e682906-8b0b-9f5c-31af-8067139c680d@redhat.com \
--to=eric.auger@redhat.com \
--cc=drjones@redhat.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=maz@kernel.org \
--cc=wanghaibin.wang@huawei.com \
--cc=wangjingyi11@huawei.com \
--cc=yuzenghui@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.