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From: Jan Beulich <jbeulich@suse.com>
To: Roger Pau Monne <roger.pau@citrix.com>
Cc: xen-devel@lists.xenproject.org,
	Andrew Cooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>,
	Jun Nakajima <jun.nakajima@intel.com>,
	Kevin Tian <kevin.tian@intel.com>
Subject: Re: [PATCH v2 7/8] x86/hvm: Disallow access to unknown MSRs
Date: Fri, 28 Aug 2020 10:51:57 +0200	[thread overview]
Message-ID: <2ffb53cf-8b62-141e-5fc9-1de38137721a@suse.com> (raw)
In-Reply-To: <20200820150835.27440-8-roger.pau@citrix.com>

On 20.08.2020 17:08, Roger Pau Monne wrote:
> From: Andrew Cooper <andrew.cooper3@citrix.com>
> 
> Change the catch-all behavior for MSR not explicitly handled. Instead
> of allow full read-access to the MSR space and silently dropping
> writes return an exception when the MSR is not explicitly handled.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> [remove rdmsr_safe from default case in svm_msr_read_intercept]
> Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>

While within this patch use of 0x in log messages is consistent,
ultimately this one wants to follow whatever gets done in patch 6.

Jan


  reply	other threads:[~2020-08-28  8:52 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-20 15:08 [PATCH v2 0/8] x86: switch default MSR behavior Roger Pau Monne
2020-08-20 15:08 ` [PATCH v2 1/8] x86/vmx: handle writes to MISC_ENABLE MSR Roger Pau Monne
2020-08-20 15:08 ` [PATCH v2 2/8] x86/svm: silently drop writes to SYSCFG and related MSRs Roger Pau Monne
2020-08-27 15:03   ` Jan Beulich
2020-08-31 14:37     ` Roger Pau Monné
2020-08-31 14:45       ` Roger Pau Monné
2020-08-31 15:21         ` Jan Beulich
2020-08-31 15:20       ` Jan Beulich
2020-08-20 15:08 ` [PATCH v2 3/8] x86/msr: explicitly handle AMD DE_CFG Roger Pau Monne
2020-08-20 17:08   ` Andrew Cooper
2020-08-21 11:52     ` Roger Pau Monné
2020-08-21 14:03       ` Andrew Cooper
2020-08-21 14:09         ` Roger Pau Monné
2020-08-20 15:08 ` [PATCH v2 4/8] x86/svm: drop writes to BU_CFG on revF chips Roger Pau Monne
2020-08-27 15:42   ` Jan Beulich
2020-08-20 15:08 ` [PATCH v2 5/8] x86/pv: allow reading FEATURE_CONTROL MSR Roger Pau Monne
2020-08-27 15:53   ` Jan Beulich
2020-08-31 15:12     ` Roger Pau Monné
2020-08-31 15:25       ` Jan Beulich
2020-08-20 15:08 ` [PATCH v2 6/8] x86/pv: disallow access to unknown MSRs Roger Pau Monne
2020-08-28  8:45   ` Jan Beulich
2020-08-20 15:08 ` [PATCH v2 7/8] x86/hvm: Disallow " Roger Pau Monne
2020-08-28  8:51   ` Jan Beulich [this message]
2020-08-20 15:08 ` [PATCH v2 8/8] x86/msr: Drop compatibility #GP handling in guest_{rd, wr}msr() Roger Pau Monne
2020-08-28  8:55   ` [PATCH v2 8/8] x86/msr: Drop compatibility #GP handling in guest_{rd,wr}msr() Jan Beulich
2020-08-31 15:22     ` Roger Pau Monné

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