From: "Ramuthevar, Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com> To: Rob Herring <robh@kernel.org> Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, arnd@arndb.de, brendanhiggins@google.com, tglx@linutronix.de, boris.brezillon@collabora.com, anders.roxell@linaro.org, masonccyang@mxic.com.tw, linux-mips@vger.kernel.org, hauke.mehrtens@intel.com, andriy.shevchenko@intel.com, qi-ming.wu@intel.com, cheol.yong.kim@intel.com Subject: Re: [PATCH v6 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC Date: Fri, 15 May 2020 10:06:22 +0800 [thread overview] Message-ID: <3248d380-1d08-3088-8d18-0373a8a5aef9@linux.intel.com> (raw) In-Reply-To: <20200514130321.GB8436@bogus> Hi Rob, Thank you for the review comments... On 14/5/2020 9:03 pm, Rob Herring wrote: > On Wed, May 13, 2020 at 06:46:14PM +0800, Ramuthevar,Vadivel MuruganX wrote: >> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> >> Add YAML file for dt-bindings to support NAND Flash Controller >> on Intel's Lightning Mountain SoC. >> >> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> --- >> .../devicetree/bindings/mtd/intel,lgm-nand.yaml | 83 ++++++++++++++++++++++ >> 1 file changed, 83 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml >> >> diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml >> new file mode 100644 >> index 000000000000..d9e0df8553fa >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml >> @@ -0,0 +1,83 @@ >> +# SPDX-License-Identifier: GPL-2.0 > > Dual license new bindings please: > > (GPL-2.0-only OR BSD-2-Clause) Noted. > >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Intel LGM SoC NAND Controller Device Tree Bindings >> + >> +allOf: >> + - $ref: "nand-controller.yaml" >> + >> +maintainers: >> + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> + >> +properties: >> + compatible: >> + const: intel,lgm-nand-controller >> + >> + reg: >> + maxItems: 1 > > Looks like you have 4 or 6 entries, not 1. Need to define what each one > is. Sure, will define it. > >> + >> + clocks: >> + maxItems: 1 >> + >> + dmas: >> + maxItems: 2 >> + >> + dma-names: >> + enum: >> + - rx >> + - tx > > This defines a single entry. I believe you want: > > items: > - const: tx > - const: rx Yes, Thanks! > >> + >> + pinctrl-names: true > > No need for this. Tools add pinctrl properties. will drop it. > >> + >> +patternProperties: >> + "^nand@[a-f0-9]+$": >> + type: object >> + properties: >> + reg: >> + minimum: 0 >> + maximum: 7 >> + >> + nand-ecc-mode: true >> + >> + nand-ecc-algo: >> + const: hw >> + >> + additionalProperties: false >> + >> +required: >> + - compatible >> + - reg >> + - clocks >> + - clock-names >> + - dmas >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + nand-controller@e0f00000 { >> + compatible = "intel,nand-controller"; > > Doesn't match the schema. Noted, will update the schema name. > >> + reg = <0xe0f00000 0x100>, >> + <0xe1000000 0x300>, >> + <0xe1400000 0x8000>, >> + <0xe1c00000 0x1000>; > > Is it 4 or 6 entries? yes, will update. > >> + reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1", >> + "addr_sel0","addr_sel1"; > > Not documented. Noted, will document it. > >> + clocks = <&cgu0 125>; >> + dma-names = "tx", "rx"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + #clock-cells = <1>; > > This is a clock provider too? Yes, it is getting clock from CGU for nand-controller. Regards Vadivel > >> + >> + nand@0 { >> + reg = <0>; >> + nand-on-flash-bbt; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + }; >> + }; >> + >> +... >> -- >> 2.11.0 >>
WARNING: multiple messages have this Message-ID (diff)
From: "Ramuthevar, Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com> To: Rob Herring <robh@kernel.org> Cc: cheol.yong.kim@intel.com, devicetree@vger.kernel.org, qi-ming.wu@intel.com, anders.roxell@linaro.org, vigneshr@ti.com, arnd@arndb.de, hauke.mehrtens@intel.com, richard@nod.at, brendanhiggins@google.com, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, boris.brezillon@collabora.com, linux-mtd@lists.infradead.org, miquel.raynal@bootlin.com, tglx@linutronix.de, masonccyang@mxic.com.tw, andriy.shevchenko@intel.com Subject: Re: [PATCH v6 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC Date: Fri, 15 May 2020 10:06:22 +0800 [thread overview] Message-ID: <3248d380-1d08-3088-8d18-0373a8a5aef9@linux.intel.com> (raw) In-Reply-To: <20200514130321.GB8436@bogus> Hi Rob, Thank you for the review comments... On 14/5/2020 9:03 pm, Rob Herring wrote: > On Wed, May 13, 2020 at 06:46:14PM +0800, Ramuthevar,Vadivel MuruganX wrote: >> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> >> Add YAML file for dt-bindings to support NAND Flash Controller >> on Intel's Lightning Mountain SoC. >> >> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> --- >> .../devicetree/bindings/mtd/intel,lgm-nand.yaml | 83 ++++++++++++++++++++++ >> 1 file changed, 83 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml >> >> diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml >> new file mode 100644 >> index 000000000000..d9e0df8553fa >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml >> @@ -0,0 +1,83 @@ >> +# SPDX-License-Identifier: GPL-2.0 > > Dual license new bindings please: > > (GPL-2.0-only OR BSD-2-Clause) Noted. > >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Intel LGM SoC NAND Controller Device Tree Bindings >> + >> +allOf: >> + - $ref: "nand-controller.yaml" >> + >> +maintainers: >> + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> + >> +properties: >> + compatible: >> + const: intel,lgm-nand-controller >> + >> + reg: >> + maxItems: 1 > > Looks like you have 4 or 6 entries, not 1. Need to define what each one > is. Sure, will define it. > >> + >> + clocks: >> + maxItems: 1 >> + >> + dmas: >> + maxItems: 2 >> + >> + dma-names: >> + enum: >> + - rx >> + - tx > > This defines a single entry. I believe you want: > > items: > - const: tx > - const: rx Yes, Thanks! > >> + >> + pinctrl-names: true > > No need for this. Tools add pinctrl properties. will drop it. > >> + >> +patternProperties: >> + "^nand@[a-f0-9]+$": >> + type: object >> + properties: >> + reg: >> + minimum: 0 >> + maximum: 7 >> + >> + nand-ecc-mode: true >> + >> + nand-ecc-algo: >> + const: hw >> + >> + additionalProperties: false >> + >> +required: >> + - compatible >> + - reg >> + - clocks >> + - clock-names >> + - dmas >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + nand-controller@e0f00000 { >> + compatible = "intel,nand-controller"; > > Doesn't match the schema. Noted, will update the schema name. > >> + reg = <0xe0f00000 0x100>, >> + <0xe1000000 0x300>, >> + <0xe1400000 0x8000>, >> + <0xe1c00000 0x1000>; > > Is it 4 or 6 entries? yes, will update. > >> + reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1", >> + "addr_sel0","addr_sel1"; > > Not documented. Noted, will document it. > >> + clocks = <&cgu0 125>; >> + dma-names = "tx", "rx"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + #clock-cells = <1>; > > This is a clock provider too? Yes, it is getting clock from CGU for nand-controller. Regards Vadivel > >> + >> + nand@0 { >> + reg = <0>; >> + nand-on-flash-bbt; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + }; >> + }; >> + >> +... >> -- >> 2.11.0 >> ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2020-05-15 2:06 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-05-13 10:46 [PATCH v6 0/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC Ramuthevar,Vadivel MuruganX 2020-05-13 10:46 ` Ramuthevar, Vadivel MuruganX 2020-05-13 10:46 ` [PATCH v6 1/2] dt-bindings: mtd: Add Nand Flash Controller support for " Ramuthevar,Vadivel MuruganX 2020-05-13 10:46 ` Ramuthevar, Vadivel MuruganX 2020-05-14 12:57 ` Rob Herring 2020-05-14 12:57 ` Rob Herring 2020-05-15 2:08 ` Ramuthevar, Vadivel MuruganX 2020-05-15 2:08 ` Ramuthevar, Vadivel MuruganX 2020-05-15 8:06 ` Ramuthevar, Vadivel MuruganX 2020-05-15 8:06 ` Ramuthevar, Vadivel MuruganX 2020-05-18 18:27 ` Rob Herring 2020-05-18 18:27 ` Rob Herring 2020-05-19 4:51 ` Ramuthevar, Vadivel MuruganX 2020-05-19 4:51 ` Ramuthevar, Vadivel MuruganX 2020-05-14 13:03 ` Rob Herring 2020-05-14 13:03 ` Rob Herring 2020-05-15 2:06 ` Ramuthevar, Vadivel MuruganX [this message] 2020-05-15 2:06 ` Ramuthevar, Vadivel MuruganX 2020-05-18 18:24 ` Rob Herring 2020-05-18 18:24 ` Rob Herring 2020-05-13 10:46 ` [PATCH v6 2/2] mtd: rawnand: Add NAND controller support on " Ramuthevar,Vadivel MuruganX 2020-05-13 10:46 ` Ramuthevar, Vadivel MuruganX 2020-05-13 15:34 ` Andy Shevchenko 2020-05-13 15:34 ` Andy Shevchenko 2020-05-13 15:35 ` Andy Shevchenko 2020-05-13 15:35 ` Andy Shevchenko 2020-05-14 1:04 ` Ramuthevar, Vadivel MuruganX 2020-05-14 1:04 ` Ramuthevar, Vadivel MuruganX 2020-05-14 1:02 ` Ramuthevar, Vadivel MuruganX 2020-05-14 1:02 ` Ramuthevar, Vadivel MuruganX
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