From: Arnd Bergmann <arnd@arndb.de> To: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Chanwoo Choi <cw00.choi@samsung.com>, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, kgene.kim@samsung.com, mark.rutland@arm.com, olof@lixom.net, catalin.marinas@arm.com, will.deacon@arm.com, tomasz.figa@gmail.com, thomas.abraham@linaro.org, linus.walleij@linaro.org, kyungmin.park@samsung.com, inki.dae@samsung.com, chanho61.park@samsung.com, geunsik.lim@samsung.com, sw0312.kim@samsung.com, jh80.chung@samsung.com, a.kesavan@samsung.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 11/19] clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains Date: Thu, 27 Nov 2014 13:35:29 +0100 [thread overview] Message-ID: <3556463.Me1EFEY7Zb@wuerfel> (raw) In-Reply-To: <54771518.1010004@samsung.com> On Thursday 27 November 2014 13:12:08 Sylwester Nawrocki wrote: > On 27/11/14 12:56, Chanwoo Choi wrote: > > On 11/27/2014 08:41 PM, Arnd Bergmann wrote: > >> > On Thursday 27 November 2014 16:35:08 Chanwoo Choi wrote: > >>> >> + - "samsung,exynos5433-cmu-bus0", "samsung,exynos5433-cmu-bus1" > >>> >> + and "samsung,exynos5433-cmu-bus2" - clock controller compatible for CMU_BUS > >>> >> + which generates global data buses clock and global peripheral buses clock. > >>> >> > >>> >> - reg: physical base address of the controller and length of memory mapped > >>> >> region. > >>> >> > >> > > >> > This looks like you are duplicating the bindings and the code, but > >> > it's really the same hardware multiple times with minor variations > >> > that you should be able to describe properly here. Why not make > >> > three nodes with the same compatible string and have them handled > >> > by the same code? > > > > Each CMU_BUSx domain of Exynos5433 have different base address as following: > > - CMU_BUS0's base address and range : 0x1360_0000 ~ 0x1360_0b04 > > - CMU_BUS1's base address and range : 0x1480_0000 ~ 0x1480_0b04 > > - CMU_BUS2's base address and range : 0x1340_0000 ~ 0x1340_0b04 > > > > So, I implement CMU_BUSx domain which has each compatible string. But the base address is in the reg property, not in the compatible property. What I mean is to have multiple nodes like clock-controller@113600000 { reg = <0 0x113600000 0 0x1000>; compatible = "samsung,exynos5433-cmu"; #clock-cells = <1>; }; clock-controller@114800000 { reg = <0 0x114800000 0 0x1000>; compatible = "samsung,exynos5433-cmu"; #clock-cells = <1>; }; The code will just map the local registers for each instance and then provide the clocks of the right instance when asked for it. > You can always have multiple entries in the reg property. I've done > something like this for the exynos4415 CMU_ISPx units: > > cmu_isp: clock-controller@12060000 { > compatible = "samsung,exynos4415-cmu-isp"; > reg = <0x12060000 0xB10>, <0x12070000 0xB10>; > #clock-cells = <1>; > > assigned-clocks = <&cmu CLK_FOUT_ISP_PLL>; > assigned-clock-rates = <300000000>; > }; This is a different problem, this is a clock controller with multiple sets of registers that are all different. In case of the cmu, it seems that they are all the same, you just have multiple copies at different locations, and they are connected to different devices. Arnd
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From: arnd@arndb.de (Arnd Bergmann) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 11/19] clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains Date: Thu, 27 Nov 2014 13:35:29 +0100 [thread overview] Message-ID: <3556463.Me1EFEY7Zb@wuerfel> (raw) In-Reply-To: <54771518.1010004@samsung.com> On Thursday 27 November 2014 13:12:08 Sylwester Nawrocki wrote: > On 27/11/14 12:56, Chanwoo Choi wrote: > > On 11/27/2014 08:41 PM, Arnd Bergmann wrote: > >> > On Thursday 27 November 2014 16:35:08 Chanwoo Choi wrote: > >>> >> + - "samsung,exynos5433-cmu-bus0", "samsung,exynos5433-cmu-bus1" > >>> >> + and "samsung,exynos5433-cmu-bus2" - clock controller compatible for CMU_BUS > >>> >> + which generates global data buses clock and global peripheral buses clock. > >>> >> > >>> >> - reg: physical base address of the controller and length of memory mapped > >>> >> region. > >>> >> > >> > > >> > This looks like you are duplicating the bindings and the code, but > >> > it's really the same hardware multiple times with minor variations > >> > that you should be able to describe properly here. Why not make > >> > three nodes with the same compatible string and have them handled > >> > by the same code? > > > > Each CMU_BUSx domain of Exynos5433 have different base address as following: > > - CMU_BUS0's base address and range : 0x1360_0000 ~ 0x1360_0b04 > > - CMU_BUS1's base address and range : 0x1480_0000 ~ 0x1480_0b04 > > - CMU_BUS2's base address and range : 0x1340_0000 ~ 0x1340_0b04 > > > > So, I implement CMU_BUSx domain which has each compatible string. But the base address is in the reg property, not in the compatible property. What I mean is to have multiple nodes like clock-controller at 113600000 { reg = <0 0x113600000 0 0x1000>; compatible = "samsung,exynos5433-cmu"; #clock-cells = <1>; }; clock-controller at 114800000 { reg = <0 0x114800000 0 0x1000>; compatible = "samsung,exynos5433-cmu"; #clock-cells = <1>; }; The code will just map the local registers for each instance and then provide the clocks of the right instance when asked for it. > You can always have multiple entries in the reg property. I've done > something like this for the exynos4415 CMU_ISPx units: > > cmu_isp: clock-controller at 12060000 { > compatible = "samsung,exynos4415-cmu-isp"; > reg = <0x12060000 0xB10>, <0x12070000 0xB10>; > #clock-cells = <1>; > > assigned-clocks = <&cmu CLK_FOUT_ISP_PLL>; > assigned-clock-rates = <300000000>; > }; This is a different problem, this is a clock controller with multiple sets of registers that are all different. In case of the cmu, it seems that they are all the same, you just have multiple copies at different locations, and they are connected to different devices. Arnd
next prev parent reply other threads:[~2014-11-27 12:35 UTC|newest] Thread overview: 133+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-11-27 7:34 [PATCH 00/19] arm64: Add the support for new 64-bit Exynos5433 SoC Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi 2014-11-27 7:34 ` [PATCH 01/19] pinctrl: exynos: Add support for Exynos5433 Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi 2014-11-27 10:26 ` [01/19] " Pankaj Dubey 2014-11-27 10:26 ` Pankaj Dubey 2014-11-27 10:49 ` Chanwoo Choi 2014-11-27 10:49 ` Chanwoo Choi 2014-11-27 11:45 ` [PATCH 01/19] " Arnd Bergmann 2014-11-27 11:45 ` Arnd Bergmann 2014-11-27 12:14 ` Tomasz Figa 2014-11-27 12:14 ` Tomasz Figa 2014-11-27 12:14 ` Tomasz Figa 2014-11-27 12:36 ` Arnd Bergmann 2014-11-27 12:36 ` Arnd Bergmann 2014-11-27 12:36 ` Arnd Bergmann 2014-12-28 11:21 ` Tomasz Figa 2014-12-28 11:21 ` Tomasz Figa 2014-12-28 23:33 ` Chanwoo Choi 2014-12-28 23:33 ` Chanwoo Choi 2014-11-27 7:34 ` [PATCH 02/19] clk: samsung: Add binding documentation for Exynos5433 clock controller Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi 2014-11-27 11:21 ` Mark Rutland 2014-11-27 11:21 ` Mark Rutland 2014-11-27 11:21 ` Mark Rutland 2014-11-27 11:29 ` Chanwoo Choi 2014-11-27 11:29 ` Chanwoo Choi 2014-11-27 11:29 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 03/19] clk: samsung: exynos5433: Add clocks using common clock framework Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 11:48 ` [03/19] " Pankaj Dubey 2014-11-27 11:48 ` Pankaj Dubey 2014-11-27 12:53 ` Chanwoo Choi 2014-11-27 12:53 ` Chanwoo Choi 2014-11-28 1:57 ` Chanwoo Choi 2014-11-28 1:57 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 04/19] clk: samsung: exynos5433: Add MUX clocks of CMU_TOP domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 05/19] clk: samsung: exynos5433: Add clocks for CMU_PERIC domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 06/19] clk: samsung: exynos5433: Add clocks for CMU_PERIS domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 07/19] clk: samsung: exynos5433: Add clocks for CMU_G2D domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 08/19] clk: samsung: exynos5433: Add clocks for CMU_MIF domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 09/19] clk: samsung: exynos5433: Add clocks for CMU_DISP domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 10/19] clk: samsung: exynos5433: Add clocks for CMU_AUD domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 11/19] clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 11:41 ` Arnd Bergmann 2014-11-27 11:41 ` Arnd Bergmann 2014-11-27 11:56 ` Chanwoo Choi 2014-11-27 11:56 ` Chanwoo Choi 2014-11-27 12:12 ` Sylwester Nawrocki 2014-11-27 12:12 ` Sylwester Nawrocki 2014-11-27 12:12 ` Sylwester Nawrocki 2014-11-27 12:14 ` Chanwoo Choi 2014-11-27 12:14 ` Chanwoo Choi 2014-11-27 12:35 ` Arnd Bergmann [this message] 2014-11-27 12:35 ` Arnd Bergmann 2014-11-27 12:58 ` Chanwoo Choi 2014-11-27 12:58 ` Chanwoo Choi 2014-11-27 13:15 ` Arnd Bergmann 2014-11-27 13:15 ` Arnd Bergmann [not found] ` <CAGTfZH3KmwhJNFdmeWnujbbUbtLf5vSi6i2dbV62DeCtV7n4TQ@mail.gmail.com> 2014-11-27 14:02 ` Arnd Bergmann 2014-11-27 14:02 ` Arnd Bergmann 2014-11-27 14:02 ` Arnd Bergmann 2014-11-27 15:17 ` Chanwoo Choi 2014-11-27 15:17 ` Chanwoo Choi 2014-11-27 15:17 ` Chanwoo Choi 2014-11-27 15:33 ` Arnd Bergmann 2014-11-27 15:33 ` Arnd Bergmann 2014-11-27 15:33 ` Arnd Bergmann 2014-11-27 15:44 ` Chanwoo Choi 2014-11-27 15:44 ` Chanwoo Choi 2014-11-27 15:44 ` Chanwoo Choi 2014-11-27 15:51 ` Arnd Bergmann 2014-11-27 15:51 ` Arnd Bergmann 2014-11-27 15:51 ` Arnd Bergmann 2014-11-27 15:58 ` Chanwoo Choi 2014-11-27 15:58 ` Chanwoo Choi 2014-11-27 15:58 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 12/19] clk: samsung: exynos5433: Add missing clocks for CMU_FSYS domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 13/19] clk: samsung: exynos5433: Add clocks for CMU_G3D domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 14/19] clk: samsung: exynos5433: Add clocks for CMU_GSCL domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 15/19] arm64: exynos5433: Enable ARMv8-based Exynos5433 SoC support Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 11:18 ` Catalin Marinas 2014-11-27 11:18 ` Catalin Marinas 2014-11-27 11:18 ` Catalin Marinas 2014-11-27 11:22 ` Chanwoo Choi 2014-11-27 11:22 ` Chanwoo Choi 2014-11-27 11:22 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 16/19] arm64: dts: exynos: Add dts files for 64-bit Exynos5433 SoC Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 10:26 ` Marc Zyngier 2014-11-27 10:26 ` Marc Zyngier 2014-11-27 10:26 ` Marc Zyngier 2014-11-28 13:51 ` Chanwoo Choi 2014-11-28 13:51 ` Chanwoo Choi 2014-11-28 13:51 ` Chanwoo Choi 2014-11-27 11:18 ` Mark Rutland 2014-11-27 11:18 ` Mark Rutland 2014-11-27 11:18 ` Mark Rutland 2014-11-28 13:18 ` Chanwoo Choi 2014-11-28 13:18 ` Chanwoo Choi 2014-11-28 13:18 ` Chanwoo Choi 2014-11-28 14:00 ` Mark Rutland 2014-11-28 14:00 ` Mark Rutland 2014-11-28 14:00 ` Mark Rutland 2014-12-01 2:21 ` Chanwoo Choi 2014-12-01 2:21 ` Chanwoo Choi 2014-12-01 2:21 ` Chanwoo Choi 2014-12-02 10:42 ` Mark Rutland 2014-12-02 10:42 ` Mark Rutland 2014-12-02 10:42 ` Mark Rutland 2014-11-27 7:35 ` [PATCH 17/19] arm64: dts: exynos: Add MSHC dt node for Exynos5433 Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 18/19] arm64: dts: exynos: Add SPI/PDMA " Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 19/19] serial: samsung: Add the support for Exynos5433 SoC Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi
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