From: Alexander Stein <alexander.stein@ew.tq-group.com> To: Marek Vasut <marex@denx.de> Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Fabio Estevam <festevam@gmail.com>, Lucas Stach <l.stach@pengutronix.de>, Richard Zhu <hongxing.zhu@nxp.com>, Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>, linux-arm-kernel@lists.infradead.org, NXP Linux Team <linux-imx@nxp.com>, Marek Vasut <marex@denx.de> Subject: Re: [PATCH 2/3] dt-bindings: imx6q-pcie: Handle various PD configurations Date: Thu, 03 Nov 2022 09:29:42 +0100 [thread overview] Message-ID: <3645906.iIbC2pHGDl@steina-w> (raw) In-Reply-To: <20221102215729.147335-2-marex@denx.de> Hi Marek, Am Mittwoch, 2. November 2022, 22:57:28 CET schrieb Marek Vasut: > The i.MX SoCs have various power domain configurations routed into > the PCIe IP. MX6SX is the only one which contains 2 domains and also > uses power-domain-names. MX6QDL do not use any domains. All the rest > uses one domain and does not use power-domain-names anymore. > > Document all those configurations in the DT binding document. > > Signed-off-by: Marek Vasut <marex@denx.de> > --- > Cc: Fabio Estevam <festevam@gmail.com> > Cc: Lucas Stach <l.stach@pengutronix.de> > Cc: Richard Zhu <hongxing.zhu@nxp.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: linux-arm-kernel@lists.infradead.org > Cc: NXP Linux Team <linux-imx@nxp.com> > To: devicetree@vger.kernel.org > --- > .../bindings/pci/fsl,imx6q-pcie.yaml | 47 ++++++++++++++----- > 1 file changed, 34 insertions(+), 13 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index > 1cfea8ca72576..fc8d4d7b80b38 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > @@ -68,19 +68,6 @@ properties: > description: A phandle to an fsl,imx7d-pcie-phy node. Additional > required properties for imx7d-pcie and imx8mq-pcie. > > - power-domains: > - items: > - - description: The phandle pointing to the DISPLAY domain for > - imx6sx-pcie, to PCIE_PHY power domain for imx7d-pcie and > - imx8mq-pcie. > - - description: The phandle pointing to the PCIE_PHY power domains > - for imx6sx-pcie. > - > - power-domain-names: > - items: > - - const: pcie > - - const: pcie_phy > - > resets: > maxItems: 3 > description: Phandles to PCIe-related reset lines exposed by SRC > @@ -241,6 +228,40 @@ allOf: > - const: pcie_bus > - const: pcie_phy > > + - if: > + properties: > + compatible: > + contains: > + const: fsl,imx6sx-pcie > + then: > + properties: > + power-domains: > + items: > + - description: The phandle pointing to the DISPLAY domain for > + imx6sx-pcie, to PCIE_PHY power domain for imx7d-pcie and > + imx8mq-pcie. > + - description: The phandle pointing to the PCIE_PHY power > domains + for imx6sx-pcie. > + power-domain-names: > + items: > + - const: pcie > + - const: pcie_phy > + else: > + if: > + not: > + properties: > + compatible: > + contains: > + enum: > + - fsl,imx6q-pcie > + - fsl,imx6qp-pcie > + then: > + properties: > + power-domains: > + description: | > + The phandle pointing to the DISPLAY domain for imx6sx-pcie, > to + PCIE_PHY power domain for imx7d-pcie and imx8mq-pcie. + Doesn't it makes more sense to keep the power-domains descriptions in the common part on top, as before, but adjust minItems/maxItems for each compatible? Regards, Alexander > examples: > - | > #include <dt-bindings/clock/imx6qdl-clock.h>
WARNING: multiple messages have this Message-ID (diff)
From: Alexander Stein <alexander.stein@ew.tq-group.com> To: Marek Vasut <marex@denx.de> Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Fabio Estevam <festevam@gmail.com>, Lucas Stach <l.stach@pengutronix.de>, Richard Zhu <hongxing.zhu@nxp.com>, Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>, linux-arm-kernel@lists.infradead.org, NXP Linux Team <linux-imx@nxp.com>, Marek Vasut <marex@denx.de> Subject: Re: [PATCH 2/3] dt-bindings: imx6q-pcie: Handle various PD configurations Date: Thu, 03 Nov 2022 09:29:42 +0100 [thread overview] Message-ID: <3645906.iIbC2pHGDl@steina-w> (raw) In-Reply-To: <20221102215729.147335-2-marex@denx.de> Hi Marek, Am Mittwoch, 2. November 2022, 22:57:28 CET schrieb Marek Vasut: > The i.MX SoCs have various power domain configurations routed into > the PCIe IP. MX6SX is the only one which contains 2 domains and also > uses power-domain-names. MX6QDL do not use any domains. All the rest > uses one domain and does not use power-domain-names anymore. > > Document all those configurations in the DT binding document. > > Signed-off-by: Marek Vasut <marex@denx.de> > --- > Cc: Fabio Estevam <festevam@gmail.com> > Cc: Lucas Stach <l.stach@pengutronix.de> > Cc: Richard Zhu <hongxing.zhu@nxp.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: linux-arm-kernel@lists.infradead.org > Cc: NXP Linux Team <linux-imx@nxp.com> > To: devicetree@vger.kernel.org > --- > .../bindings/pci/fsl,imx6q-pcie.yaml | 47 ++++++++++++++----- > 1 file changed, 34 insertions(+), 13 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index > 1cfea8ca72576..fc8d4d7b80b38 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > @@ -68,19 +68,6 @@ properties: > description: A phandle to an fsl,imx7d-pcie-phy node. Additional > required properties for imx7d-pcie and imx8mq-pcie. > > - power-domains: > - items: > - - description: The phandle pointing to the DISPLAY domain for > - imx6sx-pcie, to PCIE_PHY power domain for imx7d-pcie and > - imx8mq-pcie. > - - description: The phandle pointing to the PCIE_PHY power domains > - for imx6sx-pcie. > - > - power-domain-names: > - items: > - - const: pcie > - - const: pcie_phy > - > resets: > maxItems: 3 > description: Phandles to PCIe-related reset lines exposed by SRC > @@ -241,6 +228,40 @@ allOf: > - const: pcie_bus > - const: pcie_phy > > + - if: > + properties: > + compatible: > + contains: > + const: fsl,imx6sx-pcie > + then: > + properties: > + power-domains: > + items: > + - description: The phandle pointing to the DISPLAY domain for > + imx6sx-pcie, to PCIE_PHY power domain for imx7d-pcie and > + imx8mq-pcie. > + - description: The phandle pointing to the PCIE_PHY power > domains + for imx6sx-pcie. > + power-domain-names: > + items: > + - const: pcie > + - const: pcie_phy > + else: > + if: > + not: > + properties: > + compatible: > + contains: > + enum: > + - fsl,imx6q-pcie > + - fsl,imx6qp-pcie > + then: > + properties: > + power-domains: > + description: | > + The phandle pointing to the DISPLAY domain for imx6sx-pcie, > to + PCIE_PHY power domain for imx7d-pcie and imx8mq-pcie. + Doesn't it makes more sense to keep the power-domains descriptions in the common part on top, as before, but adjust minItems/maxItems for each compatible? Regards, Alexander > examples: > - | > #include <dt-bindings/clock/imx6qdl-clock.h> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-11-03 8:29 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-11-02 21:57 [PATCH 1/3] dt-bindings: imx6q-pcie: Handle various clock configurations Marek Vasut 2022-11-02 21:57 ` Marek Vasut 2022-11-02 21:57 ` [PATCH 2/3] dt-bindings: imx6q-pcie: Handle various PD configurations Marek Vasut 2022-11-02 21:57 ` Marek Vasut 2022-11-03 3:24 ` Rob Herring 2022-11-03 3:24 ` Rob Herring 2022-11-03 8:29 ` Alexander Stein [this message] 2022-11-03 8:29 ` Alexander Stein 2022-11-03 12:32 ` Rob Herring 2022-11-03 12:32 ` Rob Herring 2022-11-03 16:25 ` Marek Vasut 2022-11-03 16:25 ` Marek Vasut 2022-11-04 7:19 ` Alexander Stein 2022-11-04 7:19 ` Alexander Stein 2022-11-04 11:41 ` Marek Vasut 2022-11-04 11:41 ` Marek Vasut 2022-11-02 21:57 ` [PATCH 3/3] dt-bindings: imx6q-pcie: Handle more resets on legacy platforms Marek Vasut 2022-11-02 21:57 ` Marek Vasut 2022-11-03 3:24 ` Rob Herring 2022-11-03 3:24 ` Rob Herring 2022-11-03 3:24 ` [PATCH 1/3] dt-bindings: imx6q-pcie: Handle various clock configurations Rob Herring 2022-11-03 3:24 ` Rob Herring 2022-11-03 16:07 ` Marek Vasut 2022-11-03 16:07 ` Marek Vasut 2022-11-03 8:25 ` Alexander Stein 2022-11-03 8:25 ` Alexander Stein
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