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From: <Conor.Dooley@microchip.com>
To: <sudeep.holla@arm.com>, <linux-kernel@vger.kernel.org>,
	<gregkh@linuxfoundation.org>, <Conor.Dooley@microchip.com>
Cc: <vincent.guittot@linaro.org>, <dietmar.eggemann@arm.com>,
	<ionela.voinescu@arm.com>, <pierre.gondois@arm.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH -next v2 1/2] cacheinfo: Use atomic allocation for percpu cache attributes
Date: Fri, 15 Jul 2022 10:33:17 +0000	[thread overview]
Message-ID: <388a12c8-7c8c-0a43-9b28-bbea880eea10@microchip.com> (raw)
In-Reply-To: <20220715102609.2160689-1-sudeep.holla@arm.com>

On 15/07/2022 11:26, Sudeep Holla wrote:
> On couple of architectures like RISC-V and ARM64, we need to detect
> cache attribues quite early during the boot when the secondary CPUs
> start. So we will call detect_cache_attributes in the atomic context
> and since use of normal allocation can sleep, we will end up getting
> "sleeping in the atomic context" bug splat.
> 
> In order avoid that, move the allocation to use atomic version in
> preparation to move the actual detection of cache attributes in the
> CPU hotplug path which is atomic.
> 
> Cc: Ionela Voinescu <ionela.voinescu@arm.com>
> Tested-by: Conor Dooley <conor.dooley@microchip.com>

Since this was a conversion from comments on the other series:
Acked-by: Conor Dooley <conor.dooley@microchip.com>

> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
> ---
>   drivers/base/cacheinfo.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> Hi Greg,
> 
> Can you apply these couple of patches directly if and when you are happy
> with them ?
> 
> Regards,
> Sudeep
> 
> v1->v2: This was added in v2
> 
> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> index 65d566ff24c4..4b5cd08c5a65 100644
> --- a/drivers/base/cacheinfo.c
> +++ b/drivers/base/cacheinfo.c
> @@ -356,7 +356,7 @@ int detect_cache_attributes(unsigned int cpu)
>   		return -ENOENT;
> 
>   	per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu),
> -					 sizeof(struct cacheinfo), GFP_KERNEL);
> +					 sizeof(struct cacheinfo), GFP_ATOMIC);
>   	if (per_cpu_cacheinfo(cpu) == NULL) {
>   		cache_leaves(cpu) = 0;
>   		return -ENOMEM;
> --
> 2.37.1
> 

WARNING: multiple messages have this Message-ID (diff)
From: <Conor.Dooley@microchip.com>
To: <sudeep.holla@arm.com>, <linux-kernel@vger.kernel.org>,
	<gregkh@linuxfoundation.org>, <Conor.Dooley@microchip.com>
Cc: <vincent.guittot@linaro.org>, <dietmar.eggemann@arm.com>,
	<ionela.voinescu@arm.com>, <pierre.gondois@arm.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH -next v2 1/2] cacheinfo: Use atomic allocation for percpu cache attributes
Date: Fri, 15 Jul 2022 10:33:17 +0000	[thread overview]
Message-ID: <388a12c8-7c8c-0a43-9b28-bbea880eea10@microchip.com> (raw)
In-Reply-To: <20220715102609.2160689-1-sudeep.holla@arm.com>

On 15/07/2022 11:26, Sudeep Holla wrote:
> On couple of architectures like RISC-V and ARM64, we need to detect
> cache attribues quite early during the boot when the secondary CPUs
> start. So we will call detect_cache_attributes in the atomic context
> and since use of normal allocation can sleep, we will end up getting
> "sleeping in the atomic context" bug splat.
> 
> In order avoid that, move the allocation to use atomic version in
> preparation to move the actual detection of cache attributes in the
> CPU hotplug path which is atomic.
> 
> Cc: Ionela Voinescu <ionela.voinescu@arm.com>
> Tested-by: Conor Dooley <conor.dooley@microchip.com>

Since this was a conversion from comments on the other series:
Acked-by: Conor Dooley <conor.dooley@microchip.com>

> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
> ---
>   drivers/base/cacheinfo.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> Hi Greg,
> 
> Can you apply these couple of patches directly if and when you are happy
> with them ?
> 
> Regards,
> Sudeep
> 
> v1->v2: This was added in v2
> 
> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> index 65d566ff24c4..4b5cd08c5a65 100644
> --- a/drivers/base/cacheinfo.c
> +++ b/drivers/base/cacheinfo.c
> @@ -356,7 +356,7 @@ int detect_cache_attributes(unsigned int cpu)
>   		return -ENOENT;
> 
>   	per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu),
> -					 sizeof(struct cacheinfo), GFP_KERNEL);
> +					 sizeof(struct cacheinfo), GFP_ATOMIC);
>   	if (per_cpu_cacheinfo(cpu) == NULL) {
>   		cache_leaves(cpu) = 0;
>   		return -ENOMEM;
> --
> 2.37.1
> 
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: <Conor.Dooley@microchip.com>
To: <sudeep.holla@arm.com>, <linux-kernel@vger.kernel.org>,
	<gregkh@linuxfoundation.org>, <Conor.Dooley@microchip.com>
Cc: <vincent.guittot@linaro.org>, <dietmar.eggemann@arm.com>,
	<ionela.voinescu@arm.com>, <pierre.gondois@arm.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH -next v2 1/2] cacheinfo: Use atomic allocation for percpu cache attributes
Date: Fri, 15 Jul 2022 10:33:17 +0000	[thread overview]
Message-ID: <388a12c8-7c8c-0a43-9b28-bbea880eea10@microchip.com> (raw)
In-Reply-To: <20220715102609.2160689-1-sudeep.holla@arm.com>

On 15/07/2022 11:26, Sudeep Holla wrote:
> On couple of architectures like RISC-V and ARM64, we need to detect
> cache attribues quite early during the boot when the secondary CPUs
> start. So we will call detect_cache_attributes in the atomic context
> and since use of normal allocation can sleep, we will end up getting
> "sleeping in the atomic context" bug splat.
> 
> In order avoid that, move the allocation to use atomic version in
> preparation to move the actual detection of cache attributes in the
> CPU hotplug path which is atomic.
> 
> Cc: Ionela Voinescu <ionela.voinescu@arm.com>
> Tested-by: Conor Dooley <conor.dooley@microchip.com>

Since this was a conversion from comments on the other series:
Acked-by: Conor Dooley <conor.dooley@microchip.com>

> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
> ---
>   drivers/base/cacheinfo.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> Hi Greg,
> 
> Can you apply these couple of patches directly if and when you are happy
> with them ?
> 
> Regards,
> Sudeep
> 
> v1->v2: This was added in v2
> 
> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> index 65d566ff24c4..4b5cd08c5a65 100644
> --- a/drivers/base/cacheinfo.c
> +++ b/drivers/base/cacheinfo.c
> @@ -356,7 +356,7 @@ int detect_cache_attributes(unsigned int cpu)
>   		return -ENOENT;
> 
>   	per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu),
> -					 sizeof(struct cacheinfo), GFP_KERNEL);
> +					 sizeof(struct cacheinfo), GFP_ATOMIC);
>   	if (per_cpu_cacheinfo(cpu) == NULL) {
>   		cache_leaves(cpu) = 0;
>   		return -ENOMEM;
> --
> 2.37.1
> 
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-07-15 10:33 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-15 10:26 [PATCH -next v2 1/2] cacheinfo: Use atomic allocation for percpu cache attributes Sudeep Holla
2022-07-15 10:26 ` Sudeep Holla
2022-07-15 10:26 ` Sudeep Holla
2022-07-15 10:26 ` [PATCH -next v2 2/2] arch_topology: Fix cache attributes detection in the CPU hotplug path Sudeep Holla
2022-07-15 10:26   ` Sudeep Holla
2022-07-15 10:26   ` Sudeep Holla
2022-07-19 15:24   ` Geert Uytterhoeven
2022-07-19 15:24     ` Geert Uytterhoeven
2022-07-19 15:24     ` Geert Uytterhoeven
2022-07-15 10:33 ` Conor.Dooley [this message]
2022-07-15 10:33   ` [PATCH -next v2 1/2] cacheinfo: Use atomic allocation for percpu cache attributes Conor.Dooley
2022-07-15 10:33   ` Conor.Dooley

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