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From: Heiko Stuebner <heiko@sntech.de>
To: djw@t-chip.com.cn
Cc: linux-rockchip@lists.infradead.org,
	Wayne Chou <zxf@t-chip.com.cn>, Simon Xue <xxm@rock-chips.com>,
	David Wu <david.wu@rock-chips.com>,
	Finley Xiao <finley.xiao@rock-chips.com>,
	devicetree@vger.kernel.org,
	Klaus Goger <klaus.goger@theobroma-systems.com>,
	Sugar Zhang <sugar.zhang@rock-chips.com>,
	linux-kernel@vger.kernel.org, Robin Murphy <robin.murphy@arm.com>,
	Rob Herring <robh+dt@kernel.org>,
	Rocky Hao <rocky.hao@rock-chips.com>,
	Will Deacon <will.deacon@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 2/4] arm64: dts: rockchip: add GRF GPIO controller to rk3328
Date: Sat, 04 Aug 2018 15:16:01 +0200	[thread overview]
Message-ID: <4016409.aba6YNvtTb@phil> (raw)
In-Reply-To: <1533016762-5268-3-git-send-email-djw@t-chip.com.cn>

Hi Levin,

Am Dienstag, 31. Juli 2018, 07:59:20 CEST schrieb djw@t-chip.com.cn:
> From: Levin Du <djw@t-chip.com.cn>
> 
> Adding a GRF GPIO controller labled "grf_gpio" to rk3328, currently
> providing access to the GPIO_MUTE pin, which is manupulated by the
> GRF_SOC_CON10 register.
> 
> The GPIO_MUTE pin is referred to as <&grf_gpio 0>.
> 
> Signed-off-by: Levin Du <djw@t-chip.com.cn>

applied to my dts64 branch, with 2 changes:
- reordered, please sort nodes without address alphabetically
- removed default disabled status
  The controlled pin is always present on the soc, so doesn't need
  to be enabled on a per-board level


Heiko



WARNING: multiple messages have this Message-ID (diff)
From: heiko@sntech.de (Heiko Stuebner)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 2/4] arm64: dts: rockchip: add GRF GPIO controller to rk3328
Date: Sat, 04 Aug 2018 15:16:01 +0200	[thread overview]
Message-ID: <4016409.aba6YNvtTb@phil> (raw)
In-Reply-To: <1533016762-5268-3-git-send-email-djw@t-chip.com.cn>

Hi Levin,

Am Dienstag, 31. Juli 2018, 07:59:20 CEST schrieb djw at t-chip.com.cn:
> From: Levin Du <djw@t-chip.com.cn>
> 
> Adding a GRF GPIO controller labled "grf_gpio" to rk3328, currently
> providing access to the GPIO_MUTE pin, which is manupulated by the
> GRF_SOC_CON10 register.
> 
> The GPIO_MUTE pin is referred to as <&grf_gpio 0>.
> 
> Signed-off-by: Levin Du <djw@t-chip.com.cn>

applied to my dts64 branch, with 2 changes:
- reordered, please sort nodes without address alphabetically
- removed default disabled status
  The controlled pin is always present on the soc, so doesn't need
  to be enabled on a per-board level


Heiko

  reply	other threads:[~2018-08-04 13:16 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-31  5:59 [PATCH v4 0/4] Add sdmmc UHS support to ROC-RK3328-CC board djw
2018-07-31  5:59 ` djw at t-chip.com.cn
2018-07-31  5:59 ` djw
2018-07-31  5:59 ` [PATCH v4 1/4] gpio: syscon: rockchip: add GRF GPIO support for rk3328 djw
2018-07-31  5:59   ` djw at t-chip.com.cn
2018-07-31 19:36   ` Rob Herring
2018-07-31 19:36     ` Rob Herring
2018-08-01 11:46   ` Heiko Stuebner
2018-08-01 11:46     ` Heiko Stuebner
2018-08-03 17:13   ` Linus Walleij
2018-08-03 17:13     ` Linus Walleij
2018-07-31  5:59 ` [PATCH v4 2/4] arm64: dts: rockchip: add GRF GPIO controller to rk3328 djw
2018-07-31  5:59   ` djw at t-chip.com.cn
2018-08-04 13:16   ` Heiko Stuebner [this message]
2018-08-04 13:16     ` Heiko Stuebner
2018-07-31  5:59 ` [PATCH v4 3/4] arm64: dts: rockchip: add io-domain to roc-rk3328-cc djw
2018-07-31  5:59   ` djw at t-chip.com.cn
2018-08-02 12:54   ` Heiko Stuebner
2018-08-02 12:54     ` Heiko Stuebner
2018-07-31  5:59 ` [PATCH v4 4/4] arm64: dts: rockchip: add sdmmc UHS support for roc-rk3328-cc djw
2018-07-31  5:59   ` djw at t-chip.com.cn
2018-08-04 13:18   ` Heiko Stuebner
2018-08-04 13:18     ` Heiko Stuebner

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